Zeroday Hong / mbed-dev

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Fork of mbed-dev by mbed official

targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/startup_NRF51822.S@162:16168a1438f3, 2017-04-08 (annotated)

Committer:
funshine
Date:
Sat Apr 08 17:03:55 2017 +0000
Revision:
162:16168a1438f3
Parent:
149:156823d33999 
add code to handle serial port rx error in uart_irq()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 Copyright (c) 2013, Nordic Semiconductor ASA
<> 144:ef7eb2e8f9f7 3 All rights reserved.
<> 144:ef7eb2e8f9f7 4
<> 144:ef7eb2e8f9f7 5 Redistribution and use in source and binary forms, with or without
<> 144:ef7eb2e8f9f7 6 modification, are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7
<> 144:ef7eb2e8f9f7 8 * Redistributions of source code must retain the above copyright notice, this
<> 144:ef7eb2e8f9f7 9 list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10
<> 144:ef7eb2e8f9f7 11 * Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 12 this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 13 and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14
<> 144:ef7eb2e8f9f7 15 * Neither the name of Nordic Semiconductor ASA nor the names of its
<> 144:ef7eb2e8f9f7 16 contributors may be used to endorse or promote products derived from
<> 144:ef7eb2e8f9f7 17 this software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18
<> 144:ef7eb2e8f9f7 19 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 20 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 21 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 23 FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 24 DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 25 SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 26 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 27 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 28 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 /*
<> 144:ef7eb2e8f9f7 32 NOTE: Template files (including this one) are application specific and therefore
<> 144:ef7eb2e8f9f7 33 expected to be copied into the application project folder prior to its use!
<> 144:ef7eb2e8f9f7 34 */
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 .syntax unified
<> 144:ef7eb2e8f9f7 37 .arch armv6-m
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 .section .stack
<> 144:ef7eb2e8f9f7 40 .align 3
<> 144:ef7eb2e8f9f7 41 #ifdef __STACK_SIZE
<> 144:ef7eb2e8f9f7 42 .equ Stack_Size, __STACK_SIZE
<> 144:ef7eb2e8f9f7 43 #else
<> 144:ef7eb2e8f9f7 44 .equ Stack_Size, 2048
<> 144:ef7eb2e8f9f7 45 #endif
<> 144:ef7eb2e8f9f7 46 .globl Stack_Size
<> 144:ef7eb2e8f9f7 47 .globl __StackTop
<> 144:ef7eb2e8f9f7 48 .globl __StackLimit
<> 144:ef7eb2e8f9f7 49 __StackLimit:
<> 144:ef7eb2e8f9f7 50 .space Stack_Size
<> 144:ef7eb2e8f9f7 51 .size __StackLimit, . - __StackLimit
<> 144:ef7eb2e8f9f7 52 __StackTop:
<> 144:ef7eb2e8f9f7 53 .size __StackTop, . - __StackTop
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 .section .heap
<> 144:ef7eb2e8f9f7 56 .align 3
<> 144:ef7eb2e8f9f7 57 .globl __HeapBase
<> 144:ef7eb2e8f9f7 58 .globl __HeapLimit
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 .section .Vectors
<> 144:ef7eb2e8f9f7 61 .align 2
<> 144:ef7eb2e8f9f7 62 .globl __Vectors
<> 144:ef7eb2e8f9f7 63 __Vectors:
<> 144:ef7eb2e8f9f7 64 .long __StackTop /* Top of Stack */
<> 144:ef7eb2e8f9f7 65 .long Reset_Handler /* Reset Handler */
<> 144:ef7eb2e8f9f7 66 .long NMI_Handler /* NMI Handler */
<> 144:ef7eb2e8f9f7 67 .long HardFault_Handler /* Hard Fault Handler */
<> 144:ef7eb2e8f9f7 68 .long 0 /* Reserved */
<> 144:ef7eb2e8f9f7 69 .long 0 /* Reserved */
<> 144:ef7eb2e8f9f7 70 .long 0 /* Reserved */
<> 144:ef7eb2e8f9f7 71 .long 0 /* Reserved */
<> 144:ef7eb2e8f9f7 72 .long 0 /* Reserved */
<> 144:ef7eb2e8f9f7 73 .long 0 /* Reserved */
<> 144:ef7eb2e8f9f7 74 .long 0 /* Reserved */
<> 144:ef7eb2e8f9f7 75 .long SVC_Handler /* SVCall Handler */
<> 144:ef7eb2e8f9f7 76 .long 0 /* Reserved */
<> 144:ef7eb2e8f9f7 77 .long 0 /* Reserved */
<> 144:ef7eb2e8f9f7 78 .long PendSV_Handler /* PendSV Handler */
<> 144:ef7eb2e8f9f7 79 .long SysTick_Handler /* SysTick Handler */
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 /* External Interrupts */
<> 144:ef7eb2e8f9f7 82 .long POWER_CLOCK_IRQHandler /*POWER_CLOCK */
<> 144:ef7eb2e8f9f7 83 .long RADIO_IRQHandler /*RADIO */
<> 144:ef7eb2e8f9f7 84 .long UART0_IRQHandler /*UART0 */
<> 144:ef7eb2e8f9f7 85 .long SPI0_TWI0_IRQHandler /*SPI0_TWI0 */
<> 144:ef7eb2e8f9f7 86 .long SPI1_TWI1_IRQHandler /*SPI1_TWI1 */
<> 144:ef7eb2e8f9f7 87 .long 0 /*Reserved */
<> 144:ef7eb2e8f9f7 88 .long GPIOTE_IRQHandler /*GPIOTE */
<> 144:ef7eb2e8f9f7 89 .long ADC_IRQHandler /*ADC */
<> 144:ef7eb2e8f9f7 90 .long TIMER0_IRQHandler /*TIMER0 */
<> 144:ef7eb2e8f9f7 91 .long TIMER1_IRQHandler /*TIMER1 */
<> 144:ef7eb2e8f9f7 92 .long TIMER2_IRQHandler /*TIMER2 */
<> 144:ef7eb2e8f9f7 93 .long RTC0_IRQHandler /*RTC0 */
<> 144:ef7eb2e8f9f7 94 .long TEMP_IRQHandler /*TEMP */
<> 144:ef7eb2e8f9f7 95 .long RNG_IRQHandler /*RNG */
<> 144:ef7eb2e8f9f7 96 .long ECB_IRQHandler /*ECB */
<> 144:ef7eb2e8f9f7 97 .long CCM_AAR_IRQHandler /*CCM_AAR */
<> 144:ef7eb2e8f9f7 98 .long WDT_IRQHandler /*WDT */
<> 144:ef7eb2e8f9f7 99 .long RTC1_IRQHandler /*RTC1 */
<> 144:ef7eb2e8f9f7 100 .long QDEC_IRQHandler /*QDEC */
<> 144:ef7eb2e8f9f7 101 .long LPCOMP_IRQHandler /*LPCOMP */
<> 144:ef7eb2e8f9f7 102 .long SWI0_IRQHandler /*SWI0 */
<> 144:ef7eb2e8f9f7 103 .long SWI1_IRQHandler /*SWI1 */
<> 144:ef7eb2e8f9f7 104 .long SWI2_IRQHandler /*SWI2 */
<> 144:ef7eb2e8f9f7 105 .long SWI3_IRQHandler /*SWI3 */
<> 144:ef7eb2e8f9f7 106 .long SWI4_IRQHandler /*SWI4 */
<> 144:ef7eb2e8f9f7 107 .long SWI5_IRQHandler /*SWI5 */
<> 144:ef7eb2e8f9f7 108 .long 0 /*Reserved */
<> 144:ef7eb2e8f9f7 109 .long 0 /*Reserved */
<> 144:ef7eb2e8f9f7 110 .long 0 /*Reserved */
<> 144:ef7eb2e8f9f7 111 .long 0 /*Reserved */
<> 144:ef7eb2e8f9f7 112 .long 0 /*Reserved */
<> 144:ef7eb2e8f9f7 113 .long 0 /*Reserved */
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116 .size __Vectors, . - __Vectors
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 /* Reset Handler */
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
<> 144:ef7eb2e8f9f7 121 .equ NRF_POWER_RAMON_RAMxON_ONMODE_Msk, 0x3
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 .text
<> 144:ef7eb2e8f9f7 124 .thumb
<> 144:ef7eb2e8f9f7 125 .thumb_func
<> 144:ef7eb2e8f9f7 126 .align 1
<> 144:ef7eb2e8f9f7 127 .globl Reset_Handler
<> 144:ef7eb2e8f9f7 128 .type Reset_Handler, %function
<> 144:ef7eb2e8f9f7 129 Reset_Handler:
<> 144:ef7eb2e8f9f7 130 .fnstart
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 /* Make sure ALL RAM banks are powered on */
<> 144:ef7eb2e8f9f7 133 LDR R0, =NRF_POWER_RAMON_ADDRESS
<> 144:ef7eb2e8f9f7 134 LDR R2, [R0]
<> 144:ef7eb2e8f9f7 135 MOVS R1, #NRF_POWER_RAMON_RAMxON_ONMODE_Msk
<> 144:ef7eb2e8f9f7 136 ORRS R2, R1
<> 144:ef7eb2e8f9f7 137 STR R2, [R0]
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 /* Loop to copy data from read only memory to RAM. The ranges
<> 144:ef7eb2e8f9f7 140 * of copy from/to are specified by following symbols evaluated in
<> 144:ef7eb2e8f9f7 141 * linker script.
<> 144:ef7eb2e8f9f7 142 * __etext: End of code section, i.e., begin of data sections to copy from.
<> 144:ef7eb2e8f9f7 143 * __data_start__/__data_end__: RAM address range that data should be
<> 144:ef7eb2e8f9f7 144 * copied to. Both must be aligned to 4 bytes boundary. */
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 ldr r1, =__etext
<> 144:ef7eb2e8f9f7 147 ldr r2, =__data_start__
<> 144:ef7eb2e8f9f7 148 ldr r3, =__data_end__
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 subs r3, r2
<> 144:ef7eb2e8f9f7 151 ble .LC0
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 .LC1:
<> 144:ef7eb2e8f9f7 154 subs r3, 4
<> 144:ef7eb2e8f9f7 155 ldr r0, [r1,r3]
<> 144:ef7eb2e8f9f7 156 str r0, [r2,r3]
<> 144:ef7eb2e8f9f7 157 bgt .LC1
<> 144:ef7eb2e8f9f7 158 .LC0:
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 LDR R0, =SystemInit
<> 144:ef7eb2e8f9f7 161 BLX R0
<> 144:ef7eb2e8f9f7 162 LDR R0, =_start
<> 144:ef7eb2e8f9f7 163 BX R0
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 .pool
<> 144:ef7eb2e8f9f7 166 .cantunwind
<> 144:ef7eb2e8f9f7 167 .fnend
<> 144:ef7eb2e8f9f7 168 .size Reset_Handler,.-Reset_Handler
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 .section ".text"
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172
<> 144:ef7eb2e8f9f7 173 /* Dummy Exception Handlers (infinite loops which can be modified) */
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 .weak NMI_Handler
<> 144:ef7eb2e8f9f7 176 .type NMI_Handler, %function
<> 144:ef7eb2e8f9f7 177 NMI_Handler:
<> 144:ef7eb2e8f9f7 178 B .
<> 144:ef7eb2e8f9f7 179 .size NMI_Handler, . - NMI_Handler
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 .weak HardFault_Handler
<> 144:ef7eb2e8f9f7 183 .type HardFault_Handler, %function
<> 144:ef7eb2e8f9f7 184 HardFault_Handler:
<> 144:ef7eb2e8f9f7 185 B .
<> 144:ef7eb2e8f9f7 186 .size HardFault_Handler, . - HardFault_Handler
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 .weak SVC_Handler
<> 144:ef7eb2e8f9f7 190 .type SVC_Handler, %function
<> 144:ef7eb2e8f9f7 191 SVC_Handler:
<> 144:ef7eb2e8f9f7 192 B .
<> 144:ef7eb2e8f9f7 193 .size SVC_Handler, . - SVC_Handler
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 .weak PendSV_Handler
<> 144:ef7eb2e8f9f7 197 .type PendSV_Handler, %function
<> 144:ef7eb2e8f9f7 198 PendSV_Handler:
<> 144:ef7eb2e8f9f7 199 B .
<> 144:ef7eb2e8f9f7 200 .size PendSV_Handler, . - PendSV_Handler
<> 144:ef7eb2e8f9f7 201
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 .weak SysTick_Handler
<> 144:ef7eb2e8f9f7 204 .type SysTick_Handler, %function
<> 144:ef7eb2e8f9f7 205 SysTick_Handler:
<> 144:ef7eb2e8f9f7 206 B .
<> 144:ef7eb2e8f9f7 207 .size SysTick_Handler, . - SysTick_Handler
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 /* IRQ Handlers */
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 .globl Default_Handler
<> 144:ef7eb2e8f9f7 213 .type Default_Handler, %function
<> 144:ef7eb2e8f9f7 214 Default_Handler:
<> 144:ef7eb2e8f9f7 215 B .
<> 144:ef7eb2e8f9f7 216 .size Default_Handler, . - Default_Handler
<> 144:ef7eb2e8f9f7 217
<> 144:ef7eb2e8f9f7 218 .macro IRQ handler
<> 144:ef7eb2e8f9f7 219 .weak \handler
<> 144:ef7eb2e8f9f7 220 .set \handler, Default_Handler
<> 144:ef7eb2e8f9f7 221 .endm
<> 144:ef7eb2e8f9f7 222
<> 144:ef7eb2e8f9f7 223 IRQ POWER_CLOCK_IRQHandler
<> 144:ef7eb2e8f9f7 224 IRQ RADIO_IRQHandler
<> 144:ef7eb2e8f9f7 225 IRQ UART0_IRQHandler
<> 144:ef7eb2e8f9f7 226 IRQ SPI0_TWI0_IRQHandler
<> 144:ef7eb2e8f9f7 227 IRQ SPI1_TWI1_IRQHandler
<> 144:ef7eb2e8f9f7 228 IRQ GPIOTE_IRQHandler
<> 144:ef7eb2e8f9f7 229 IRQ ADC_IRQHandler
<> 144:ef7eb2e8f9f7 230 IRQ TIMER0_IRQHandler
<> 144:ef7eb2e8f9f7 231 IRQ TIMER1_IRQHandler
<> 144:ef7eb2e8f9f7 232 IRQ TIMER2_IRQHandler
<> 144:ef7eb2e8f9f7 233 IRQ RTC0_IRQHandler
<> 144:ef7eb2e8f9f7 234 IRQ TEMP_IRQHandler
<> 144:ef7eb2e8f9f7 235 IRQ RNG_IRQHandler
<> 144:ef7eb2e8f9f7 236 IRQ ECB_IRQHandler
<> 144:ef7eb2e8f9f7 237 IRQ CCM_AAR_IRQHandler
<> 144:ef7eb2e8f9f7 238 IRQ WDT_IRQHandler
<> 144:ef7eb2e8f9f7 239 IRQ RTC1_IRQHandler
<> 144:ef7eb2e8f9f7 240 IRQ QDEC_IRQHandler
<> 144:ef7eb2e8f9f7 241 IRQ LPCOMP_IRQHandler
<> 144:ef7eb2e8f9f7 242 IRQ SWI0_IRQHandler
<> 144:ef7eb2e8f9f7 243 IRQ SWI1_IRQHandler
<> 144:ef7eb2e8f9f7 244 IRQ SWI2_IRQHandler
<> 144:ef7eb2e8f9f7 245 IRQ SWI3_IRQHandler
<> 144:ef7eb2e8f9f7 246 IRQ SWI4_IRQHandler
<> 144:ef7eb2e8f9f7 247 IRQ SWI5_IRQHandler
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 .end