Zeroday Hong / mbed-dev

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Fork of mbed-dev by mbed official

targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_rcm.h@154:37f96f9d4de2, 2017-01-04 (annotated)

Committer:
<>
Date:
Wed Jan 04 16:58:05 2017 +0000
Revision:
154:37f96f9d4de2
This updates the lib to the mbed lib v133

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /*
<> 154:37f96f9d4de2 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 154:37f96f9d4de2 3 * All rights reserved.
<> 154:37f96f9d4de2 4 *
<> 154:37f96f9d4de2 5 * Redistribution and use in source and binary forms, with or without modification,
<> 154:37f96f9d4de2 6 * are permitted provided that the following conditions are met:
<> 154:37f96f9d4de2 7 *
<> 154:37f96f9d4de2 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 154:37f96f9d4de2 9 * of conditions and the following disclaimer.
<> 154:37f96f9d4de2 10 *
<> 154:37f96f9d4de2 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 154:37f96f9d4de2 12 * list of conditions and the following disclaimer in the documentation and/or
<> 154:37f96f9d4de2 13 * other materials provided with the distribution.
<> 154:37f96f9d4de2 14 *
<> 154:37f96f9d4de2 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 154:37f96f9d4de2 16 * contributors may be used to endorse or promote products derived from this
<> 154:37f96f9d4de2 17 * software without specific prior written permission.
<> 154:37f96f9d4de2 18 *
<> 154:37f96f9d4de2 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 154:37f96f9d4de2 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 154:37f96f9d4de2 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 154:37f96f9d4de2 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 154:37f96f9d4de2 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 154:37f96f9d4de2 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 154:37f96f9d4de2 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 154:37f96f9d4de2 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 154:37f96f9d4de2 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 154:37f96f9d4de2 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 154:37f96f9d4de2 29 */
<> 154:37f96f9d4de2 30 #ifndef _FSL_RCM_H_
<> 154:37f96f9d4de2 31 #define _FSL_RCM_H_
<> 154:37f96f9d4de2 32
<> 154:37f96f9d4de2 33 #include "fsl_common.h"
<> 154:37f96f9d4de2 34
<> 154:37f96f9d4de2 35 /*! @addtogroup rcm */
<> 154:37f96f9d4de2 36 /*! @{*/
<> 154:37f96f9d4de2 37
<> 154:37f96f9d4de2 38
<> 154:37f96f9d4de2 39 /*******************************************************************************
<> 154:37f96f9d4de2 40 * Definitions
<> 154:37f96f9d4de2 41 ******************************************************************************/
<> 154:37f96f9d4de2 42
<> 154:37f96f9d4de2 43 /*! @name Driver version */
<> 154:37f96f9d4de2 44 /*@{*/
<> 154:37f96f9d4de2 45 /*! @brief RCM driver version 2.0.1. */
<> 154:37f96f9d4de2 46 #define FSL_RCM_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
<> 154:37f96f9d4de2 47 /*@}*/
<> 154:37f96f9d4de2 48
<> 154:37f96f9d4de2 49 /*!
<> 154:37f96f9d4de2 50 * @brief System Reset Source Name definitions
<> 154:37f96f9d4de2 51 */
<> 154:37f96f9d4de2 52 typedef enum _rcm_reset_source
<> 154:37f96f9d4de2 53 {
<> 154:37f96f9d4de2 54 #if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32))
<> 154:37f96f9d4de2 55 /* RCM register bit width is 32. */
<> 154:37f96f9d4de2 56 #if (defined(FSL_FEATURE_RCM_HAS_WAKEUP) && FSL_FEATURE_RCM_HAS_WAKEUP)
<> 154:37f96f9d4de2 57 kRCM_SourceWakeup = RCM_SRS_WAKEUP_MASK, /*!< Low-leakage wakeup reset */
<> 154:37f96f9d4de2 58 #endif
<> 154:37f96f9d4de2 59 kRCM_SourceLvd = RCM_SRS_LVD_MASK, /*!< Low-voltage detect reset */
<> 154:37f96f9d4de2 60 #if (defined(FSL_FEATURE_RCM_HAS_LOC) && FSL_FEATURE_RCM_HAS_LOC)
<> 154:37f96f9d4de2 61 kRCM_SourceLoc = RCM_SRS_LOC_MASK, /*!< Loss of clock reset */
<> 154:37f96f9d4de2 62 #endif /* FSL_FEATURE_RCM_HAS_LOC */
<> 154:37f96f9d4de2 63 #if (defined(FSL_FEATURE_RCM_HAS_LOL) && FSL_FEATURE_RCM_HAS_LOL)
<> 154:37f96f9d4de2 64 kRCM_SourceLol = RCM_SRS_LOL_MASK, /*!< Loss of lock reset */
<> 154:37f96f9d4de2 65 #endif /* FSL_FEATURE_RCM_HAS_LOL */
<> 154:37f96f9d4de2 66 kRCM_SourceWdog = RCM_SRS_WDOG_MASK, /*!< Watchdog reset */
<> 154:37f96f9d4de2 67 kRCM_SourcePin = RCM_SRS_PIN_MASK, /*!< External pin reset */
<> 154:37f96f9d4de2 68 kRCM_SourcePor = RCM_SRS_POR_MASK, /*!< Power on reset */
<> 154:37f96f9d4de2 69 #if (defined(FSL_FEATURE_RCM_HAS_JTAG) && FSL_FEATURE_RCM_HAS_JTAG)
<> 154:37f96f9d4de2 70 kRCM_SourceJtag = RCM_SRS_JTAG_MASK, /*!< JTAG generated reset */
<> 154:37f96f9d4de2 71 #endif /* FSL_FEATURE_RCM_HAS_JTAG */
<> 154:37f96f9d4de2 72 kRCM_SourceLockup = RCM_SRS_LOCKUP_MASK, /*!< Core lock up reset */
<> 154:37f96f9d4de2 73 kRCM_SourceSw = RCM_SRS_SW_MASK, /*!< Software reset */
<> 154:37f96f9d4de2 74 #if (defined(FSL_FEATURE_RCM_HAS_MDM_AP) && FSL_FEATURE_RCM_HAS_MDM_AP)
<> 154:37f96f9d4de2 75 kRCM_SourceMdmap = RCM_SRS_MDM_AP_MASK, /*!< MDM-AP system reset */
<> 154:37f96f9d4de2 76 #endif /* FSL_FEATURE_RCM_HAS_MDM_AP */
<> 154:37f96f9d4de2 77 #if (defined(FSL_FEATURE_RCM_HAS_EZPORT) && FSL_FEATURE_RCM_HAS_EZPORT)
<> 154:37f96f9d4de2 78 kRCM_SourceEzpt = RCM_SRS_EZPT_MASK, /*!< EzPort reset */
<> 154:37f96f9d4de2 79 #endif /* FSL_FEATURE_RCM_HAS_EZPORT */
<> 154:37f96f9d4de2 80 kRCM_SourceSackerr = RCM_SRS_SACKERR_MASK, /*!< Parameter could get all reset flags */
<> 154:37f96f9d4de2 81
<> 154:37f96f9d4de2 82 #else /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */
<> 154:37f96f9d4de2 83 /* RCM register bit width is 8. */
<> 154:37f96f9d4de2 84 #if (defined(FSL_FEATURE_RCM_HAS_WAKEUP) && FSL_FEATURE_RCM_HAS_WAKEUP)
<> 154:37f96f9d4de2 85 kRCM_SourceWakeup = RCM_SRS0_WAKEUP_MASK, /*!< Low-leakage wakeup reset */
<> 154:37f96f9d4de2 86 #endif
<> 154:37f96f9d4de2 87 kRCM_SourceLvd = RCM_SRS0_LVD_MASK, /*!< Low-voltage detect reset */
<> 154:37f96f9d4de2 88 #if (defined(FSL_FEATURE_RCM_HAS_LOC) && FSL_FEATURE_RCM_HAS_LOC)
<> 154:37f96f9d4de2 89 kRCM_SourceLoc = RCM_SRS0_LOC_MASK, /*!< Loss of clock reset */
<> 154:37f96f9d4de2 90 #endif /* FSL_FEATURE_RCM_HAS_LOC */
<> 154:37f96f9d4de2 91 #if (defined(FSL_FEATURE_RCM_HAS_LOL) && FSL_FEATURE_RCM_HAS_LOL)
<> 154:37f96f9d4de2 92 kRCM_SourceLol = RCM_SRS0_LOL_MASK, /*!< Loss of lock reset */
<> 154:37f96f9d4de2 93 #endif /* FSL_FEATURE_RCM_HAS_LOL */
<> 154:37f96f9d4de2 94 kRCM_SourceWdog = RCM_SRS0_WDOG_MASK, /*!< Watchdog reset */
<> 154:37f96f9d4de2 95 kRCM_SourcePin = RCM_SRS0_PIN_MASK, /*!< External pin reset */
<> 154:37f96f9d4de2 96 kRCM_SourcePor = RCM_SRS0_POR_MASK, /*!< Power on reset */
<> 154:37f96f9d4de2 97 #if (defined(FSL_FEATURE_RCM_HAS_JTAG) && FSL_FEATURE_RCM_HAS_JTAG)
<> 154:37f96f9d4de2 98 kRCM_SourceJtag = RCM_SRS1_JTAG_MASK << 8U, /*!< JTAG generated reset */
<> 154:37f96f9d4de2 99 #endif /* FSL_FEATURE_RCM_HAS_JTAG */
<> 154:37f96f9d4de2 100 kRCM_SourceLockup = RCM_SRS1_LOCKUP_MASK << 8U, /*!< Core lock up reset */
<> 154:37f96f9d4de2 101 kRCM_SourceSw = RCM_SRS1_SW_MASK << 8U, /*!< Software reset */
<> 154:37f96f9d4de2 102 #if (defined(FSL_FEATURE_RCM_HAS_MDM_AP) && FSL_FEATURE_RCM_HAS_MDM_AP)
<> 154:37f96f9d4de2 103 kRCM_SourceMdmap = RCM_SRS1_MDM_AP_MASK << 8U, /*!< MDM-AP system reset */
<> 154:37f96f9d4de2 104 #endif /* FSL_FEATURE_RCM_HAS_MDM_AP */
<> 154:37f96f9d4de2 105 #if (defined(FSL_FEATURE_RCM_HAS_EZPORT) && FSL_FEATURE_RCM_HAS_EZPORT)
<> 154:37f96f9d4de2 106 kRCM_SourceEzpt = RCM_SRS1_EZPT_MASK << 8U, /*!< EzPort reset */
<> 154:37f96f9d4de2 107 #endif /* FSL_FEATURE_RCM_HAS_EZPORT */
<> 154:37f96f9d4de2 108 kRCM_SourceSackerr = RCM_SRS1_SACKERR_MASK << 8U, /*!< Parameter could get all reset flags */
<> 154:37f96f9d4de2 109 #endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */
<> 154:37f96f9d4de2 110 kRCM_SourceAll = 0xffffffffU,
<> 154:37f96f9d4de2 111 } rcm_reset_source_t;
<> 154:37f96f9d4de2 112
<> 154:37f96f9d4de2 113 /*!
<> 154:37f96f9d4de2 114 * @brief Reset pin filter select in Run and Wait modes.
<> 154:37f96f9d4de2 115 */
<> 154:37f96f9d4de2 116 typedef enum _rcm_run_wait_filter_mode
<> 154:37f96f9d4de2 117 {
<> 154:37f96f9d4de2 118 kRCM_FilterDisable = 0U, /*!< All filtering disabled */
<> 154:37f96f9d4de2 119 kRCM_FilterBusClock = 1U, /*!< Bus clock filter enabled */
<> 154:37f96f9d4de2 120 kRCM_FilterLpoClock = 2U /*!< LPO clock filter enabled */
<> 154:37f96f9d4de2 121 } rcm_run_wait_filter_mode_t;
<> 154:37f96f9d4de2 122
<> 154:37f96f9d4de2 123 #if (defined(FSL_FEATURE_RCM_HAS_BOOTROM) && FSL_FEATURE_RCM_HAS_BOOTROM)
<> 154:37f96f9d4de2 124 /*!
<> 154:37f96f9d4de2 125 * @brief Boot from ROM configuration.
<> 154:37f96f9d4de2 126 */
<> 154:37f96f9d4de2 127 typedef enum _rcm_boot_rom_config
<> 154:37f96f9d4de2 128 {
<> 154:37f96f9d4de2 129 kRCM_BootFlash = 0U, /*!< Boot from flash */
<> 154:37f96f9d4de2 130 kRCM_BootRomCfg0 = 1U, /*!< Boot from boot ROM due to BOOTCFG0 */
<> 154:37f96f9d4de2 131 kRCM_BootRomFopt = 2U, /*!< Boot from boot ROM due to FOPT[7] */
<> 154:37f96f9d4de2 132 kRCM_BootRomBoth = 3U /*!< Boot from boot ROM due to both BOOTCFG0 and FOPT[7] */
<> 154:37f96f9d4de2 133 } rcm_boot_rom_config_t;
<> 154:37f96f9d4de2 134 #endif /* FSL_FEATURE_RCM_HAS_BOOTROM */
<> 154:37f96f9d4de2 135
<> 154:37f96f9d4de2 136 #if (defined(FSL_FEATURE_RCM_HAS_SRIE) && FSL_FEATURE_RCM_HAS_SRIE)
<> 154:37f96f9d4de2 137 /*!
<> 154:37f96f9d4de2 138 * @brief Maximum delay time from interrupt asserts to system reset.
<> 154:37f96f9d4de2 139 */
<> 154:37f96f9d4de2 140 typedef enum _rcm_reset_delay
<> 154:37f96f9d4de2 141 {
<> 154:37f96f9d4de2 142 kRCM_ResetDelay8Lpo = 0U, /*!< Delay 8 LPO cycles. */
<> 154:37f96f9d4de2 143 kRCM_ResetDelay32Lpo = 1U, /*!< Delay 32 LPO cycles. */
<> 154:37f96f9d4de2 144 kRCM_ResetDelay128Lpo = 2U, /*!< Delay 128 LPO cycles. */
<> 154:37f96f9d4de2 145 kRCM_ResetDelay512Lpo = 3U /*!< Delay 512 LPO cycles. */
<> 154:37f96f9d4de2 146 } rcm_reset_delay_t;
<> 154:37f96f9d4de2 147
<> 154:37f96f9d4de2 148 /*!
<> 154:37f96f9d4de2 149 * @brief System reset interrupt enable bit definitions.
<> 154:37f96f9d4de2 150 */
<> 154:37f96f9d4de2 151 typedef enum _rcm_interrupt_enable
<> 154:37f96f9d4de2 152 {
<> 154:37f96f9d4de2 153 kRCM_IntNone = 0U, /*!< No interrupt enabled. */
<> 154:37f96f9d4de2 154 kRCM_IntLossOfClk = RCM_SRIE_LOC_MASK, /*!< Loss of clock interrupt. */
<> 154:37f96f9d4de2 155 kRCM_IntLossOfLock = RCM_SRIE_LOL_MASK, /*!< Loss of lock interrupt. */
<> 154:37f96f9d4de2 156 kRCM_IntWatchDog = RCM_SRIE_WDOG_MASK, /*!< Watch dog interrupt. */
<> 154:37f96f9d4de2 157 kRCM_IntExternalPin = RCM_SRIE_PIN_MASK, /*!< External pin interrupt. */
<> 154:37f96f9d4de2 158 kRCM_IntGlobal = RCM_SRIE_GIE_MASK, /*!< Global interrupts. */
<> 154:37f96f9d4de2 159 kRCM_IntCoreLockup = RCM_SRIE_LOCKUP_MASK, /*!< Core lock up interrupt */
<> 154:37f96f9d4de2 160 kRCM_IntSoftware = RCM_SRIE_SW_MASK, /*!< software interrupt */
<> 154:37f96f9d4de2 161 kRCM_IntStopModeAckErr = RCM_SRIE_SACKERR_MASK, /*!< Stop mode ACK error interrupt. */
<> 154:37f96f9d4de2 162 #if (defined(FSL_FEATURE_RCM_HAS_CORE1) && FSL_FEATURE_RCM_HAS_CORE1)
<> 154:37f96f9d4de2 163 kRCM_IntCore1 = RCM_SRIE_CORE1_MASK, /*!< Core 1 interrupt. */
<> 154:37f96f9d4de2 164 #endif
<> 154:37f96f9d4de2 165 kRCM_IntAll = RCM_SRIE_LOC_MASK /*!< Enable all interrupts. */
<> 154:37f96f9d4de2 166 |
<> 154:37f96f9d4de2 167 RCM_SRIE_LOL_MASK | RCM_SRIE_WDOG_MASK | RCM_SRIE_PIN_MASK | RCM_SRIE_GIE_MASK |
<> 154:37f96f9d4de2 168 RCM_SRIE_LOCKUP_MASK | RCM_SRIE_SW_MASK | RCM_SRIE_SACKERR_MASK
<> 154:37f96f9d4de2 169 #if (defined(FSL_FEATURE_RCM_HAS_CORE1) && FSL_FEATURE_RCM_HAS_CORE1)
<> 154:37f96f9d4de2 170 |
<> 154:37f96f9d4de2 171 RCM_SRIE_CORE1_MASK
<> 154:37f96f9d4de2 172 #endif
<> 154:37f96f9d4de2 173 } rcm_interrupt_enable_t;
<> 154:37f96f9d4de2 174 #endif /* FSL_FEATURE_RCM_HAS_SRIE */
<> 154:37f96f9d4de2 175
<> 154:37f96f9d4de2 176 #if (defined(FSL_FEATURE_RCM_HAS_VERID) && FSL_FEATURE_RCM_HAS_VERID)
<> 154:37f96f9d4de2 177 /*!
<> 154:37f96f9d4de2 178 * @brief IP version ID definition.
<> 154:37f96f9d4de2 179 */
<> 154:37f96f9d4de2 180 typedef struct _rcm_version_id
<> 154:37f96f9d4de2 181 {
<> 154:37f96f9d4de2 182 uint16_t feature; /*!< Feature Specification Number. */
<> 154:37f96f9d4de2 183 uint8_t minor; /*!< Minor version number. */
<> 154:37f96f9d4de2 184 uint8_t major; /*!< Major version number. */
<> 154:37f96f9d4de2 185 } rcm_version_id_t;
<> 154:37f96f9d4de2 186 #endif
<> 154:37f96f9d4de2 187
<> 154:37f96f9d4de2 188 /*!
<> 154:37f96f9d4de2 189 * @brief Reset pin filter configuration.
<> 154:37f96f9d4de2 190 */
<> 154:37f96f9d4de2 191 typedef struct _rcm_reset_pin_filter_config
<> 154:37f96f9d4de2 192 {
<> 154:37f96f9d4de2 193 bool enableFilterInStop; /*!< Reset pin filter select in stop mode. */
<> 154:37f96f9d4de2 194 rcm_run_wait_filter_mode_t filterInRunWait; /*!< Reset pin filter in run/wait mode. */
<> 154:37f96f9d4de2 195 uint8_t busClockFilterCount; /*!< Reset pin bus clock filter width. */
<> 154:37f96f9d4de2 196 } rcm_reset_pin_filter_config_t;
<> 154:37f96f9d4de2 197
<> 154:37f96f9d4de2 198 /*******************************************************************************
<> 154:37f96f9d4de2 199 * API
<> 154:37f96f9d4de2 200 ******************************************************************************/
<> 154:37f96f9d4de2 201 #if defined(__cplusplus)
<> 154:37f96f9d4de2 202 extern "C" {
<> 154:37f96f9d4de2 203 #endif /* __cplusplus*/
<> 154:37f96f9d4de2 204
<> 154:37f96f9d4de2 205 /*! @name Reset Control Module APIs*/
<> 154:37f96f9d4de2 206 /*@{*/
<> 154:37f96f9d4de2 207
<> 154:37f96f9d4de2 208 #if (defined(FSL_FEATURE_RCM_HAS_VERID) && FSL_FEATURE_RCM_HAS_VERID)
<> 154:37f96f9d4de2 209 /*!
<> 154:37f96f9d4de2 210 * @brief Gets the RCM version ID.
<> 154:37f96f9d4de2 211 *
<> 154:37f96f9d4de2 212 * This function gets the RCM version ID including the major version number,
<> 154:37f96f9d4de2 213 * the minor version number, and the feature specification number.
<> 154:37f96f9d4de2 214 *
<> 154:37f96f9d4de2 215 * @param base RCM peripheral base address.
<> 154:37f96f9d4de2 216 * @param versionId Pointer to the version ID structure.
<> 154:37f96f9d4de2 217 */
<> 154:37f96f9d4de2 218 static inline void RCM_GetVersionId(RCM_Type *base, rcm_version_id_t *versionId)
<> 154:37f96f9d4de2 219 {
<> 154:37f96f9d4de2 220 *((uint32_t *)versionId) = base->VERID;
<> 154:37f96f9d4de2 221 }
<> 154:37f96f9d4de2 222 #endif
<> 154:37f96f9d4de2 223
<> 154:37f96f9d4de2 224 #if (defined(FSL_FEATURE_RCM_HAS_PARAM) && FSL_FEATURE_RCM_HAS_PARAM)
<> 154:37f96f9d4de2 225 /*!
<> 154:37f96f9d4de2 226 * @brief Gets the reset source implemented status.
<> 154:37f96f9d4de2 227 *
<> 154:37f96f9d4de2 228 * This function gets the RCM parameter that indicates whether the corresponding reset source is implemented.
<> 154:37f96f9d4de2 229 * Use source masks defined in the rcm_reset_source_t to get the desired source status.
<> 154:37f96f9d4de2 230 *
<> 154:37f96f9d4de2 231 * This is an example.
<> 154:37f96f9d4de2 232 @code
<> 154:37f96f9d4de2 233 uint32_t status;
<> 154:37f96f9d4de2 234
<> 154:37f96f9d4de2 235 // To test whether the MCU is reset using Watchdog.
<> 154:37f96f9d4de2 236 status = RCM_GetResetSourceImplementedStatus(RCM) & (kRCM_SourceWdog | kRCM_SourcePin);
<> 154:37f96f9d4de2 237 @endcode
<> 154:37f96f9d4de2 238 *
<> 154:37f96f9d4de2 239 * @param base RCM peripheral base address.
<> 154:37f96f9d4de2 240 * @return All reset source implemented status bit map.
<> 154:37f96f9d4de2 241 */
<> 154:37f96f9d4de2 242 static inline uint32_t RCM_GetResetSourceImplementedStatus(RCM_Type *base)
<> 154:37f96f9d4de2 243 {
<> 154:37f96f9d4de2 244 return base->PARAM;
<> 154:37f96f9d4de2 245 }
<> 154:37f96f9d4de2 246 #endif /* FSL_FEATURE_RCM_HAS_PARAM */
<> 154:37f96f9d4de2 247
<> 154:37f96f9d4de2 248 /*!
<> 154:37f96f9d4de2 249 * @brief Gets the reset source status which caused a previous reset.
<> 154:37f96f9d4de2 250 *
<> 154:37f96f9d4de2 251 * This function gets the current reset source status. Use source masks
<> 154:37f96f9d4de2 252 * defined in the rcm_reset_source_t to get the desired source status.
<> 154:37f96f9d4de2 253 *
<> 154:37f96f9d4de2 254 * This is an example.
<> 154:37f96f9d4de2 255 @code
<> 154:37f96f9d4de2 256 uint32_t resetStatus;
<> 154:37f96f9d4de2 257
<> 154:37f96f9d4de2 258 // To get all reset source statuses.
<> 154:37f96f9d4de2 259 resetStatus = RCM_GetPreviousResetSources(RCM) & kRCM_SourceAll;
<> 154:37f96f9d4de2 260
<> 154:37f96f9d4de2 261 // To test whether the MCU is reset using Watchdog.
<> 154:37f96f9d4de2 262 resetStatus = RCM_GetPreviousResetSources(RCM) & kRCM_SourceWdog;
<> 154:37f96f9d4de2 263
<> 154:37f96f9d4de2 264 // To test multiple reset sources.
<> 154:37f96f9d4de2 265 resetStatus = RCM_GetPreviousResetSources(RCM) & (kRCM_SourceWdog | kRCM_SourcePin);
<> 154:37f96f9d4de2 266 @endcode
<> 154:37f96f9d4de2 267 *
<> 154:37f96f9d4de2 268 * @param base RCM peripheral base address.
<> 154:37f96f9d4de2 269 * @return All reset source status bit map.
<> 154:37f96f9d4de2 270 */
<> 154:37f96f9d4de2 271 static inline uint32_t RCM_GetPreviousResetSources(RCM_Type *base)
<> 154:37f96f9d4de2 272 {
<> 154:37f96f9d4de2 273 #if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32))
<> 154:37f96f9d4de2 274 return base->SRS;
<> 154:37f96f9d4de2 275 #else
<> 154:37f96f9d4de2 276 return (uint32_t)((uint32_t)base->SRS0 | ((uint32_t)base->SRS1 << 8U));
<> 154:37f96f9d4de2 277 #endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */
<> 154:37f96f9d4de2 278 }
<> 154:37f96f9d4de2 279
<> 154:37f96f9d4de2 280 #if (defined(FSL_FEATURE_RCM_HAS_SSRS) && FSL_FEATURE_RCM_HAS_SSRS)
<> 154:37f96f9d4de2 281 /*!
<> 154:37f96f9d4de2 282 * @brief Gets the sticky reset source status.
<> 154:37f96f9d4de2 283 *
<> 154:37f96f9d4de2 284 * This function gets the current reset source status that has not been cleared
<> 154:37f96f9d4de2 285 * by software for a specific source.
<> 154:37f96f9d4de2 286 *
<> 154:37f96f9d4de2 287 * This is an example.
<> 154:37f96f9d4de2 288 @code
<> 154:37f96f9d4de2 289 uint32_t resetStatus;
<> 154:37f96f9d4de2 290
<> 154:37f96f9d4de2 291 // To get all reset source statuses.
<> 154:37f96f9d4de2 292 resetStatus = RCM_GetStickyResetSources(RCM) & kRCM_SourceAll;
<> 154:37f96f9d4de2 293
<> 154:37f96f9d4de2 294 // To test whether the MCU is reset using Watchdog.
<> 154:37f96f9d4de2 295 resetStatus = RCM_GetStickyResetSources(RCM) & kRCM_SourceWdog;
<> 154:37f96f9d4de2 296
<> 154:37f96f9d4de2 297 // To test multiple reset sources.
<> 154:37f96f9d4de2 298 resetStatus = RCM_GetStickyResetSources(RCM) & (kRCM_SourceWdog | kRCM_SourcePin);
<> 154:37f96f9d4de2 299 @endcode
<> 154:37f96f9d4de2 300 *
<> 154:37f96f9d4de2 301 * @param base RCM peripheral base address.
<> 154:37f96f9d4de2 302 * @return All reset source status bit map.
<> 154:37f96f9d4de2 303 */
<> 154:37f96f9d4de2 304 static inline uint32_t RCM_GetStickyResetSources(RCM_Type *base)
<> 154:37f96f9d4de2 305 {
<> 154:37f96f9d4de2 306 #if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32))
<> 154:37f96f9d4de2 307 return base->SSRS;
<> 154:37f96f9d4de2 308 #else
<> 154:37f96f9d4de2 309 return (base->SSRS0 | ((uint32_t)base->SSRS1 << 8U));
<> 154:37f96f9d4de2 310 #endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */
<> 154:37f96f9d4de2 311 }
<> 154:37f96f9d4de2 312
<> 154:37f96f9d4de2 313 /*!
<> 154:37f96f9d4de2 314 * @brief Clears the sticky reset source status.
<> 154:37f96f9d4de2 315 *
<> 154:37f96f9d4de2 316 * This function clears the sticky system reset flags indicated by source masks.
<> 154:37f96f9d4de2 317 *
<> 154:37f96f9d4de2 318 * This is an example.
<> 154:37f96f9d4de2 319 @code
<> 154:37f96f9d4de2 320 // Clears multiple reset sources.
<> 154:37f96f9d4de2 321 RCM_ClearStickyResetSources(kRCM_SourceWdog | kRCM_SourcePin);
<> 154:37f96f9d4de2 322 @endcode
<> 154:37f96f9d4de2 323 *
<> 154:37f96f9d4de2 324 * @param base RCM peripheral base address.
<> 154:37f96f9d4de2 325 * @param sourceMasks reset source status bit map
<> 154:37f96f9d4de2 326 */
<> 154:37f96f9d4de2 327 static inline void RCM_ClearStickyResetSources(RCM_Type *base, uint32_t sourceMasks)
<> 154:37f96f9d4de2 328 {
<> 154:37f96f9d4de2 329 #if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32))
<> 154:37f96f9d4de2 330 base->SSRS = sourceMasks;
<> 154:37f96f9d4de2 331 #else
<> 154:37f96f9d4de2 332 base->SSRS0 = (sourceMasks & 0xffU);
<> 154:37f96f9d4de2 333 base->SSRS1 = ((sourceMasks >> 8U) & 0xffU);
<> 154:37f96f9d4de2 334 #endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */
<> 154:37f96f9d4de2 335 }
<> 154:37f96f9d4de2 336 #endif /* FSL_FEATURE_RCM_HAS_SSRS */
<> 154:37f96f9d4de2 337
<> 154:37f96f9d4de2 338 /*!
<> 154:37f96f9d4de2 339 * @brief Configures the reset pin filter.
<> 154:37f96f9d4de2 340 *
<> 154:37f96f9d4de2 341 * This function sets the reset pin filter including the filter source, filter
<> 154:37f96f9d4de2 342 * width, and so on.
<> 154:37f96f9d4de2 343 *
<> 154:37f96f9d4de2 344 * @param base RCM peripheral base address.
<> 154:37f96f9d4de2 345 * @param config Pointer to the configuration structure.
<> 154:37f96f9d4de2 346 */
<> 154:37f96f9d4de2 347 void RCM_ConfigureResetPinFilter(RCM_Type *base, const rcm_reset_pin_filter_config_t *config);
<> 154:37f96f9d4de2 348
<> 154:37f96f9d4de2 349 #if (defined(FSL_FEATURE_RCM_HAS_EZPMS) && FSL_FEATURE_RCM_HAS_EZPMS)
<> 154:37f96f9d4de2 350 /*!
<> 154:37f96f9d4de2 351 * @brief Gets the EZP_MS_B pin assert status.
<> 154:37f96f9d4de2 352 *
<> 154:37f96f9d4de2 353 * This function gets the easy port mode status (EZP_MS_B) pin assert status.
<> 154:37f96f9d4de2 354 *
<> 154:37f96f9d4de2 355 * @param base RCM peripheral base address.
<> 154:37f96f9d4de2 356 * @return status true - asserted, false - reasserted
<> 154:37f96f9d4de2 357 */
<> 154:37f96f9d4de2 358 static inline bool RCM_GetEasyPortModePinStatus(RCM_Type *base)
<> 154:37f96f9d4de2 359 {
<> 154:37f96f9d4de2 360 return (bool)(base->MR & RCM_MR_EZP_MS_MASK);
<> 154:37f96f9d4de2 361 }
<> 154:37f96f9d4de2 362 #endif /* FSL_FEATURE_RCM_HAS_EZPMS */
<> 154:37f96f9d4de2 363
<> 154:37f96f9d4de2 364 #if (defined(FSL_FEATURE_RCM_HAS_BOOTROM) && FSL_FEATURE_RCM_HAS_BOOTROM)
<> 154:37f96f9d4de2 365 /*!
<> 154:37f96f9d4de2 366 * @brief Gets the ROM boot source.
<> 154:37f96f9d4de2 367 *
<> 154:37f96f9d4de2 368 * This function gets the ROM boot source during the last chip reset.
<> 154:37f96f9d4de2 369 *
<> 154:37f96f9d4de2 370 * @param base RCM peripheral base address.
<> 154:37f96f9d4de2 371 * @return The ROM boot source.
<> 154:37f96f9d4de2 372 */
<> 154:37f96f9d4de2 373 static inline rcm_boot_rom_config_t RCM_GetBootRomSource(RCM_Type *base)
<> 154:37f96f9d4de2 374 {
<> 154:37f96f9d4de2 375 return (rcm_boot_rom_config_t)((base->MR & RCM_MR_BOOTROM_MASK) >> RCM_MR_BOOTROM_SHIFT);
<> 154:37f96f9d4de2 376 }
<> 154:37f96f9d4de2 377
<> 154:37f96f9d4de2 378 /*!
<> 154:37f96f9d4de2 379 * @brief Clears the ROM boot source flag.
<> 154:37f96f9d4de2 380 *
<> 154:37f96f9d4de2 381 * This function clears the ROM boot source flag.
<> 154:37f96f9d4de2 382 *
<> 154:37f96f9d4de2 383 * @param base Register base address of RCM
<> 154:37f96f9d4de2 384 */
<> 154:37f96f9d4de2 385 static inline void RCM_ClearBootRomSource(RCM_Type *base)
<> 154:37f96f9d4de2 386 {
<> 154:37f96f9d4de2 387 base->MR |= RCM_MR_BOOTROM_MASK;
<> 154:37f96f9d4de2 388 }
<> 154:37f96f9d4de2 389
<> 154:37f96f9d4de2 390 /*!
<> 154:37f96f9d4de2 391 * @brief Forces the boot from ROM.
<> 154:37f96f9d4de2 392 *
<> 154:37f96f9d4de2 393 * This function forces booting from ROM during all subsequent system resets.
<> 154:37f96f9d4de2 394 *
<> 154:37f96f9d4de2 395 * @param base RCM peripheral base address.
<> 154:37f96f9d4de2 396 * @param config Boot configuration.
<> 154:37f96f9d4de2 397 */
<> 154:37f96f9d4de2 398 void RCM_SetForceBootRomSource(RCM_Type *base, rcm_boot_rom_config_t config);
<> 154:37f96f9d4de2 399 #endif /* FSL_FEATURE_RCM_HAS_BOOTROM */
<> 154:37f96f9d4de2 400
<> 154:37f96f9d4de2 401 #if (defined(FSL_FEATURE_RCM_HAS_SRIE) && FSL_FEATURE_RCM_HAS_SRIE)
<> 154:37f96f9d4de2 402 /*!
<> 154:37f96f9d4de2 403 * @brief Sets the system reset interrupt configuration.
<> 154:37f96f9d4de2 404 *
<> 154:37f96f9d4de2 405 * For a graceful shut down, the RCM supports delaying the assertion of the system
<> 154:37f96f9d4de2 406 * reset for a period of time when the reset interrupt is generated. This function
<> 154:37f96f9d4de2 407 * can be used to enable the interrupt and the delay period. The interrupts
<> 154:37f96f9d4de2 408 * are passed in as bit mask. See rcm_int_t for details. For example, to
<> 154:37f96f9d4de2 409 * delay a reset for 512 LPO cycles after the WDOG timeout or loss-of-clock occurs,
<> 154:37f96f9d4de2 410 * configure as follows:
<> 154:37f96f9d4de2 411 * RCM_SetSystemResetInterruptConfig(kRCM_IntWatchDog | kRCM_IntLossOfClk, kRCM_ResetDelay512Lpo);
<> 154:37f96f9d4de2 412 *
<> 154:37f96f9d4de2 413 * @param base RCM peripheral base address.
<> 154:37f96f9d4de2 414 * @param intMask Bit mask of the system reset interrupts to enable. See
<> 154:37f96f9d4de2 415 * rcm_interrupt_enable_t for details.
<> 154:37f96f9d4de2 416 * @param Delay Bit mask of the system reset interrupts to enable.
<> 154:37f96f9d4de2 417 */
<> 154:37f96f9d4de2 418 static inline void RCM_SetSystemResetInterruptConfig(RCM_Type *base, uint32_t intMask, rcm_reset_delay_t delay)
<> 154:37f96f9d4de2 419 {
<> 154:37f96f9d4de2 420 base->SRIE = (intMask | delay);
<> 154:37f96f9d4de2 421 }
<> 154:37f96f9d4de2 422 #endif /* FSL_FEATURE_RCM_HAS_SRIE */
<> 154:37f96f9d4de2 423 /*@}*/
<> 154:37f96f9d4de2 424
<> 154:37f96f9d4de2 425 #if defined(__cplusplus)
<> 154:37f96f9d4de2 426 }
<> 154:37f96f9d4de2 427 #endif /* __cplusplus*/
<> 154:37f96f9d4de2 428
<> 154:37f96f9d4de2 429 /*! @}*/
<> 154:37f96f9d4de2 430
<> 154:37f96f9d4de2 431 #endif /* _FSL_RCM_H_ */