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targets/TARGET_ONSEMI/TARGET_NCS36510/timer_map.h@162:16168a1438f3, 2017-04-08 (annotated)

Committer:
funshine
Date:
Sat Apr 08 17:03:55 2017 +0000
Revision:
162:16168a1438f3
Parent:
149:156823d33999 
add code to handle serial port rx error in uart_irq()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file timer_map.h
<> 149:156823d33999 4 * @brief Timer HW register map
<> 149:156823d33999 5 * @internal
<> 149:156823d33999 6 * @author ON Semiconductor
<> 149:156823d33999 7 * $Rev: 3423 $
<> 149:156823d33999 8 * $Date: 2015-06-09 11:16:49 +0530 (Tue, 09 Jun 2015) $
<> 149:156823d33999 9 ******************************************************************************
<> 149:156823d33999 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
<> 149:156823d33999 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
<> 149:156823d33999 12 * under limited terms and conditions. The terms and conditions pertaining to the software
<> 149:156823d33999 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
<> 149:156823d33999 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
<> 149:156823d33999 15 * if applicable the software license agreement. Do not use this software and/or
<> 149:156823d33999 16 * documentation unless you have carefully read and you agree to the limited terms and
<> 149:156823d33999 17 * conditions. By using this software and/or documentation, you agree to the limited
<> 149:156823d33999 18 * terms and conditions.
<> 149:156823d33999 19 *
<> 149:156823d33999 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 149:156823d33999 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 149:156823d33999 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 149:156823d33999 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 149:156823d33999 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 149:156823d33999 25 * @endinternal
<> 149:156823d33999 26 *
<> 149:156823d33999 27 * @ingroup timer
<> 149:156823d33999 28 *
<> 149:156823d33999 29 * @details
<> 149:156823d33999 30 * <p>
<> 149:156823d33999 31 * Timer HW register map description
<> 149:156823d33999 32 * </p>
<> 149:156823d33999 33 *
<> 149:156823d33999 34 * <h1> Reference document(s) </h1>
<> 149:156823d33999 35 * <p>
<> 149:156823d33999 36 * <a href="../pdf/IPC7200_Timer_APB_DS_v1P2.pdf" target="_blank">
<> 149:156823d33999 37 * IPC7200 APB Timer Design Specification v1.2</a>
<> 149:156823d33999 38 * </p>
<> 149:156823d33999 39 */
<> 149:156823d33999 40
<> 149:156823d33999 41 #ifndef TIMER_MAP_H_
<> 149:156823d33999 42 #define TIMER_MAP_H_
<> 149:156823d33999 43
<> 149:156823d33999 44 #ifdef __cplusplus
<> 149:156823d33999 45 extern "C" {
<> 149:156823d33999 46 #endif
<> 149:156823d33999 47
<> 149:156823d33999 48 #include "architecture.h"
<> 149:156823d33999 49
<> 149:156823d33999 50 /** Timer HW Structure Overlay */
<> 149:156823d33999 51 typedef struct {
<> 149:156823d33999 52 __IO uint32_t LOAD; /**< 16bit counter (re-)load value */
<> 149:156823d33999 53 __I uint32_t VALUE; /**< 16bit current counter value */
<> 149:156823d33999 54 union {
<> 149:156823d33999 55 struct {
<> 149:156823d33999 56 __IO uint32_t PAD0 :2; /**< Always reads 0 */
<> 149:156823d33999 57 __IO uint32_t PRESCALE :3; /**< 0:no division, 1..7: divide by 16, 256, 2, 8, 32, 128, 1024*/
<> 149:156823d33999 58 __IO uint32_t PAD1 :1; /**< Always reads 0 */
<> 149:156823d33999 59 __IO uint32_t MODE :1; /**< 0:free-run, 1:periodic */
<> 149:156823d33999 60 __IO uint32_t ENABLE :1; /**< 0: disable, 1:enable */
<> 149:156823d33999 61 __I uint32_t INT :1; /**< interrupt status */
<> 149:156823d33999 62 } BITS;
<> 149:156823d33999 63 __IO uint32_t WORD;
<> 149:156823d33999 64 } CONTROL;
<> 149:156823d33999 65 __O uint32_t CLEAR; /**< Write any value to clear the interrupt */
<> 149:156823d33999 66 } TimerReg_t, *TimerReg_pt;
<> 149:156823d33999 67
<> 149:156823d33999 68 #ifdef __cplusplus
<> 149:156823d33999 69 }
<> 149:156823d33999 70 #endif
<> 149:156823d33999 71
<> 149:156823d33999 72 #endif /* TIMER_MAP_H_ */