Kamil Górski / MAX31865

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MAX31865.cpp@2:b42b7148fbe0, 2019-03-29 (annotated)

Committer:
freakone
Date:
Fri Mar 29 14:09:06 2019 +0000
Revision:
2:b42b7148fbe0
new library content and calculations

Who changed what in which revision?

UserRevisionLine numberNew contents of line
freakone 2:b42b7148fbe0 1 #include "MAX31865.h"
freakone 2:b42b7148fbe0 2
freakone 2:b42b7148fbe0 3 MAX31865::MAX31865(SPI &_spi, PinName _ncs)
freakone 2:b42b7148fbe0 4 : spi(_spi), ncs(_ncs, 1), sensorPresent(false)
freakone 2:b42b7148fbe0 5 {
freakone 2:b42b7148fbe0 6 }
freakone 2:b42b7148fbe0 7
freakone 2:b42b7148fbe0 8 bool MAX31865::begin(max31865_numwires_t wires)
freakone 2:b42b7148fbe0 9 {
freakone 2:b42b7148fbe0 10 setWires(wires);
freakone 2:b42b7148fbe0 11 enableBias(true);
freakone 2:b42b7148fbe0 12 autoConvert(true);
freakone 2:b42b7148fbe0 13 clearFault();
freakone 2:b42b7148fbe0 14
freakone 2:b42b7148fbe0 15 return true;
freakone 2:b42b7148fbe0 16 }
freakone 2:b42b7148fbe0 17
freakone 2:b42b7148fbe0 18 uint8_t MAX31865::readFault(void)
freakone 2:b42b7148fbe0 19 {
freakone 2:b42b7148fbe0 20 return readRegister8(MAX31865_FAULTSTAT_REG);
freakone 2:b42b7148fbe0 21 }
freakone 2:b42b7148fbe0 22
freakone 2:b42b7148fbe0 23 void MAX31865::clearFault(void)
freakone 2:b42b7148fbe0 24 {
freakone 2:b42b7148fbe0 25 volatile uint8_t t = readRegister8(MAX31865_CONFIG_REG);
freakone 2:b42b7148fbe0 26 t &= ~0x2C;
freakone 2:b42b7148fbe0 27 t |= MAX31865_CONFIG_FAULTSTAT;
freakone 2:b42b7148fbe0 28 writeRegister8(MAX31865_CONFIG_REG, t);
freakone 2:b42b7148fbe0 29 }
freakone 2:b42b7148fbe0 30
freakone 2:b42b7148fbe0 31 void MAX31865::enableBias(bool b)
freakone 2:b42b7148fbe0 32 {
freakone 2:b42b7148fbe0 33 volatile uint8_t t = readRegister8(MAX31865_CONFIG_REG);
freakone 2:b42b7148fbe0 34 if (b)
freakone 2:b42b7148fbe0 35 {
freakone 2:b42b7148fbe0 36 t |= MAX31865_CONFIG_BIAS; // enable bias
freakone 2:b42b7148fbe0 37 }
freakone 2:b42b7148fbe0 38 else
freakone 2:b42b7148fbe0 39 {
freakone 2:b42b7148fbe0 40 t &= ~MAX31865_CONFIG_BIAS; // disable bias
freakone 2:b42b7148fbe0 41 }
freakone 2:b42b7148fbe0 42 writeRegister8(MAX31865_CONFIG_REG, t);
freakone 2:b42b7148fbe0 43 }
freakone 2:b42b7148fbe0 44
freakone 2:b42b7148fbe0 45 void MAX31865::autoConvert(bool b)
freakone 2:b42b7148fbe0 46 {
freakone 2:b42b7148fbe0 47 uint8_t t = readRegister8(MAX31865_CONFIG_REG);
freakone 2:b42b7148fbe0 48 if (b)
freakone 2:b42b7148fbe0 49 {
freakone 2:b42b7148fbe0 50 t |= MAX31865_CONFIG_MODEAUTO; // enable autoconvert
freakone 2:b42b7148fbe0 51 }
freakone 2:b42b7148fbe0 52 else
freakone 2:b42b7148fbe0 53 {
freakone 2:b42b7148fbe0 54 t &= ~MAX31865_CONFIG_MODEAUTO; // disable autoconvert
freakone 2:b42b7148fbe0 55 }
freakone 2:b42b7148fbe0 56 writeRegister8(MAX31865_CONFIG_REG, t);
freakone 2:b42b7148fbe0 57 }
freakone 2:b42b7148fbe0 58
freakone 2:b42b7148fbe0 59 void MAX31865::setWires(max31865_numwires_t wires)
freakone 2:b42b7148fbe0 60 {
freakone 2:b42b7148fbe0 61 uint8_t t = readRegister8(MAX31865_CONFIG_REG);
freakone 2:b42b7148fbe0 62 if (wires == MAX31865_3WIRE)
freakone 2:b42b7148fbe0 63 {
freakone 2:b42b7148fbe0 64 t |= MAX31865_CONFIG_3WIRE;
freakone 2:b42b7148fbe0 65 }
freakone 2:b42b7148fbe0 66 else
freakone 2:b42b7148fbe0 67 {
freakone 2:b42b7148fbe0 68 // 2 or 4 wire
freakone 2:b42b7148fbe0 69 t &= ~MAX31865_CONFIG_3WIRE;
freakone 2:b42b7148fbe0 70 }
freakone 2:b42b7148fbe0 71 writeRegister8(MAX31865_CONFIG_REG, t);
freakone 2:b42b7148fbe0 72 }
freakone 2:b42b7148fbe0 73
freakone 2:b42b7148fbe0 74 float MAX31865::temperature(float RTDnominal, float refResistor, uint16_t rtdVal)
freakone 2:b42b7148fbe0 75 {
freakone 2:b42b7148fbe0 76 // http://www.analog.com/media/en/technical-documentation/application-notes/AN709_0.pdf
freakone 2:b42b7148fbe0 77
freakone 2:b42b7148fbe0 78 float Z1, Z2, Z3, Z4, Rt, temp;
freakone 2:b42b7148fbe0 79
freakone 2:b42b7148fbe0 80 if (rtdVal == 0)
freakone 2:b42b7148fbe0 81 {
freakone 2:b42b7148fbe0 82 Rt = readRTD();
freakone 2:b42b7148fbe0 83
freakone 2:b42b7148fbe0 84 if (!sensorPresent)
freakone 2:b42b7148fbe0 85 {
freakone 2:b42b7148fbe0 86 return 0.0f;
freakone 2:b42b7148fbe0 87 }
freakone 2:b42b7148fbe0 88 }
freakone 2:b42b7148fbe0 89 else
freakone 2:b42b7148fbe0 90 {
freakone 2:b42b7148fbe0 91 Rt = rtdVal;
freakone 2:b42b7148fbe0 92 }
freakone 2:b42b7148fbe0 93 Rt /= 32768;
freakone 2:b42b7148fbe0 94 Rt *= refResistor;
freakone 2:b42b7148fbe0 95
freakone 2:b42b7148fbe0 96 Z1 = -RTD_A;
freakone 2:b42b7148fbe0 97 Z2 = RTD_A * RTD_A - (4 * RTD_B);
freakone 2:b42b7148fbe0 98 Z3 = (4 * RTD_B) / RTDnominal;
freakone 2:b42b7148fbe0 99 Z4 = 2 * RTD_B;
freakone 2:b42b7148fbe0 100
freakone 2:b42b7148fbe0 101 temp = Z2 + (Z3 * Rt);
freakone 2:b42b7148fbe0 102 temp = (sqrt(temp) + Z1) / Z4;
freakone 2:b42b7148fbe0 103
freakone 2:b42b7148fbe0 104 if (temp >= 0)
freakone 2:b42b7148fbe0 105 return temp;
freakone 2:b42b7148fbe0 106
freakone 2:b42b7148fbe0 107 // ugh.
freakone 2:b42b7148fbe0 108 float rpoly = Rt;
freakone 2:b42b7148fbe0 109
freakone 2:b42b7148fbe0 110 temp = -242.02f;
freakone 2:b42b7148fbe0 111 temp += 2.2228f * rpoly;
freakone 2:b42b7148fbe0 112 rpoly *= Rt; // square
freakone 2:b42b7148fbe0 113 temp += (float)2.5859e-3 * rpoly;
freakone 2:b42b7148fbe0 114 rpoly *= Rt; // ^3
freakone 2:b42b7148fbe0 115 temp -= (float)4.8260e-6 * rpoly;
freakone 2:b42b7148fbe0 116 rpoly *= Rt; // ^4
freakone 2:b42b7148fbe0 117 temp -= (float)2.8183e-8 * rpoly;
freakone 2:b42b7148fbe0 118 rpoly *= Rt; // ^5
freakone 2:b42b7148fbe0 119 temp += (float)1.5243e-10 * rpoly;
freakone 2:b42b7148fbe0 120
freakone 2:b42b7148fbe0 121 return temp;
freakone 2:b42b7148fbe0 122 }
freakone 2:b42b7148fbe0 123
freakone 2:b42b7148fbe0 124 uint16_t MAX31865::readRTD(void)
freakone 2:b42b7148fbe0 125 {
freakone 2:b42b7148fbe0 126 uint16_t rtd = readRegister16(MAX31865_RTDMSB_REG);
freakone 2:b42b7148fbe0 127 sensorPresent = readFault() == 0;
freakone 2:b42b7148fbe0 128 clearFault();
freakone 2:b42b7148fbe0 129
freakone 2:b42b7148fbe0 130 rtd >>= 1;
freakone 2:b42b7148fbe0 131
freakone 2:b42b7148fbe0 132 return rtd;
freakone 2:b42b7148fbe0 133 }
freakone 2:b42b7148fbe0 134
freakone 2:b42b7148fbe0 135 /**********************************************/
freakone 2:b42b7148fbe0 136
freakone 2:b42b7148fbe0 137 uint8_t MAX31865::readRegister8(uint8_t addr)
freakone 2:b42b7148fbe0 138 {
freakone 2:b42b7148fbe0 139 uint8_t ret[] = {0};
freakone 2:b42b7148fbe0 140 readRegisterN(addr, ret, 1);
freakone 2:b42b7148fbe0 141 return ret[0];
freakone 2:b42b7148fbe0 142 }
freakone 2:b42b7148fbe0 143
freakone 2:b42b7148fbe0 144 uint16_t MAX31865::readRegister16(uint8_t addr)
freakone 2:b42b7148fbe0 145 {
freakone 2:b42b7148fbe0 146 uint8_t buffer[2] = {0, 0};
freakone 2:b42b7148fbe0 147 readRegisterN(addr, buffer, 2);
freakone 2:b42b7148fbe0 148
freakone 2:b42b7148fbe0 149 uint16_t ret = buffer[0];
freakone 2:b42b7148fbe0 150 ret <<= 8;
freakone 2:b42b7148fbe0 151 ret |= buffer[1];
freakone 2:b42b7148fbe0 152
freakone 2:b42b7148fbe0 153 return ret;
freakone 2:b42b7148fbe0 154 }
freakone 2:b42b7148fbe0 155
freakone 2:b42b7148fbe0 156 void MAX31865::writeRegister8(uint8_t addr, uint8_t data)
freakone 2:b42b7148fbe0 157 {
freakone 2:b42b7148fbe0 158 ncs = 0; //select chip
freakone 2:b42b7148fbe0 159 spi.write(addr | 0x80); // make sure top bit is set
freakone 2:b42b7148fbe0 160 spi.write(data);
freakone 2:b42b7148fbe0 161 ncs = 1;
freakone 2:b42b7148fbe0 162 }
freakone 2:b42b7148fbe0 163
freakone 2:b42b7148fbe0 164 void MAX31865::readRegisterN(uint8_t address, uint8_t buffer[], uint8_t n)
freakone 2:b42b7148fbe0 165 {
freakone 2:b42b7148fbe0 166 address &= 0x7F; // make sure top bit is not set
freakone 2:b42b7148fbe0 167
freakone 2:b42b7148fbe0 168 ncs = 0;
freakone 2:b42b7148fbe0 169
freakone 2:b42b7148fbe0 170 spi.write(address);
freakone 2:b42b7148fbe0 171
freakone 2:b42b7148fbe0 172 for (uint8_t i = 0; i < n; i++)
freakone 2:b42b7148fbe0 173 {
freakone 2:b42b7148fbe0 174 buffer[i] = spi.write(0x00);
freakone 2:b42b7148fbe0 175 }
freakone 2:b42b7148fbe0 176
freakone 2:b42b7148fbe0 177 ncs = 1;
freakone 2:b42b7148fbe0 178 }
freakone 2:b42b7148fbe0 179