Frank 26080115
These are the examples provided for [[/users/frank26080115/libraries/LPC1700CMSIS_Lib/]] Note, the entire "program" is not compilable!
USBDEV/USBHID/usbreg.h@0:bf7b9fba3924, 2011-03-20 (annotated)
- Committer:
- frank26080115
- Date:
- Sun Mar 20 05:38:56 2011 +0000
- Revision:
- 0:bf7b9fba3924
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| frank26080115 | 0:bf7b9fba3924 | 1 | /*---------------------------------------------------------------------------- |
| frank26080115 | 0:bf7b9fba3924 | 2 | * U S B - K e r n e l |
| frank26080115 | 0:bf7b9fba3924 | 3 | *---------------------------------------------------------------------------- |
| frank26080115 | 0:bf7b9fba3924 | 4 | * Name: USBREG.H |
| frank26080115 | 0:bf7b9fba3924 | 5 | * Purpose: USB Hardware Layer Definitions for NXP Semiconductors LPC |
| frank26080115 | 0:bf7b9fba3924 | 6 | * family MCUs |
| frank26080115 | 0:bf7b9fba3924 | 7 | * Version: V1.10 |
| frank26080115 | 0:bf7b9fba3924 | 8 | *---------------------------------------------------------------------------- |
| frank26080115 | 0:bf7b9fba3924 | 9 | * This software is supplied "AS IS" without any warranties, express, |
| frank26080115 | 0:bf7b9fba3924 | 10 | * implied or statutory, including but not limited to the implied |
| frank26080115 | 0:bf7b9fba3924 | 11 | * warranties of fitness for purpose, satisfactory quality and |
| frank26080115 | 0:bf7b9fba3924 | 12 | * noninfringement. Keil extends you a royalty-free right to reproduce |
| frank26080115 | 0:bf7b9fba3924 | 13 | * and distribute executable files created using this software for use |
| frank26080115 | 0:bf7b9fba3924 | 14 | * on NXP Semiconductors LPC family microcontroller devices only. Nothing |
| frank26080115 | 0:bf7b9fba3924 | 15 | * else gives you the right to use this software. |
| frank26080115 | 0:bf7b9fba3924 | 16 | * |
| frank26080115 | 0:bf7b9fba3924 | 17 | * Copyright (c) 2005-2009 Keil Software. |
| frank26080115 | 0:bf7b9fba3924 | 18 | *---------------------------------------------------------------------------*/ |
| frank26080115 | 0:bf7b9fba3924 | 19 | |
| frank26080115 | 0:bf7b9fba3924 | 20 | #ifndef __USBREG_H |
| frank26080115 | 0:bf7b9fba3924 | 21 | #define __USBREG_H |
| frank26080115 | 0:bf7b9fba3924 | 22 | |
| frank26080115 | 0:bf7b9fba3924 | 23 | /* Device Interrupt Bit Definitions */ |
| frank26080115 | 0:bf7b9fba3924 | 24 | #define FRAME_INT 0x00000001 |
| frank26080115 | 0:bf7b9fba3924 | 25 | #define EP_FAST_INT 0x00000002 |
| frank26080115 | 0:bf7b9fba3924 | 26 | #define EP_SLOW_INT 0x00000004 |
| frank26080115 | 0:bf7b9fba3924 | 27 | #define DEV_STAT_INT 0x00000008 |
| frank26080115 | 0:bf7b9fba3924 | 28 | #define CCEMTY_INT 0x00000010 |
| frank26080115 | 0:bf7b9fba3924 | 29 | #define CDFULL_INT 0x00000020 |
| frank26080115 | 0:bf7b9fba3924 | 30 | #define RxENDPKT_INT 0x00000040 |
| frank26080115 | 0:bf7b9fba3924 | 31 | #define TxENDPKT_INT 0x00000080 |
| frank26080115 | 0:bf7b9fba3924 | 32 | #define EP_RLZED_INT 0x00000100 |
| frank26080115 | 0:bf7b9fba3924 | 33 | #define ERR_INT 0x00000200 |
| frank26080115 | 0:bf7b9fba3924 | 34 | |
| frank26080115 | 0:bf7b9fba3924 | 35 | /* Rx & Tx Packet Length Definitions */ |
| frank26080115 | 0:bf7b9fba3924 | 36 | #define PKT_LNGTH_MASK 0x000003FF |
| frank26080115 | 0:bf7b9fba3924 | 37 | #define PKT_DV 0x00000400 |
| frank26080115 | 0:bf7b9fba3924 | 38 | #define PKT_RDY 0x00000800 |
| frank26080115 | 0:bf7b9fba3924 | 39 | |
| frank26080115 | 0:bf7b9fba3924 | 40 | /* USB Control Definitions */ |
| frank26080115 | 0:bf7b9fba3924 | 41 | #define CTRL_RD_EN 0x00000001 |
| frank26080115 | 0:bf7b9fba3924 | 42 | #define CTRL_WR_EN 0x00000002 |
| frank26080115 | 0:bf7b9fba3924 | 43 | |
| frank26080115 | 0:bf7b9fba3924 | 44 | /* Command Codes */ |
| frank26080115 | 0:bf7b9fba3924 | 45 | #define CMD_SET_ADDR 0x00D00500 |
| frank26080115 | 0:bf7b9fba3924 | 46 | #define CMD_CFG_DEV 0x00D80500 |
| frank26080115 | 0:bf7b9fba3924 | 47 | #define CMD_SET_MODE 0x00F30500 |
| frank26080115 | 0:bf7b9fba3924 | 48 | #define CMD_RD_FRAME 0x00F50500 |
| frank26080115 | 0:bf7b9fba3924 | 49 | #define DAT_RD_FRAME 0x00F50200 |
| frank26080115 | 0:bf7b9fba3924 | 50 | #define CMD_RD_TEST 0x00FD0500 |
| frank26080115 | 0:bf7b9fba3924 | 51 | #define DAT_RD_TEST 0x00FD0200 |
| frank26080115 | 0:bf7b9fba3924 | 52 | #define CMD_SET_DEV_STAT 0x00FE0500 |
| frank26080115 | 0:bf7b9fba3924 | 53 | #define CMD_GET_DEV_STAT 0x00FE0500 |
| frank26080115 | 0:bf7b9fba3924 | 54 | #define DAT_GET_DEV_STAT 0x00FE0200 |
| frank26080115 | 0:bf7b9fba3924 | 55 | #define CMD_GET_ERR_CODE 0x00FF0500 |
| frank26080115 | 0:bf7b9fba3924 | 56 | #define DAT_GET_ERR_CODE 0x00FF0200 |
| frank26080115 | 0:bf7b9fba3924 | 57 | #define CMD_RD_ERR_STAT 0x00FB0500 |
| frank26080115 | 0:bf7b9fba3924 | 58 | #define DAT_RD_ERR_STAT 0x00FB0200 |
| frank26080115 | 0:bf7b9fba3924 | 59 | #define DAT_WR_BYTE(x) (0x00000100 | ((x) << 16)) |
| frank26080115 | 0:bf7b9fba3924 | 60 | #define CMD_SEL_EP(x) (0x00000500 | ((x) << 16)) |
| frank26080115 | 0:bf7b9fba3924 | 61 | #define DAT_SEL_EP(x) (0x00000200 | ((x) << 16)) |
| frank26080115 | 0:bf7b9fba3924 | 62 | #define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16)) |
| frank26080115 | 0:bf7b9fba3924 | 63 | #define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16)) |
| frank26080115 | 0:bf7b9fba3924 | 64 | #define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16)) |
| frank26080115 | 0:bf7b9fba3924 | 65 | #define CMD_CLR_BUF 0x00F20500 |
| frank26080115 | 0:bf7b9fba3924 | 66 | #define DAT_CLR_BUF 0x00F20200 |
| frank26080115 | 0:bf7b9fba3924 | 67 | #define CMD_VALID_BUF 0x00FA0500 |
| frank26080115 | 0:bf7b9fba3924 | 68 | |
| frank26080115 | 0:bf7b9fba3924 | 69 | /* Device Address Register Definitions */ |
| frank26080115 | 0:bf7b9fba3924 | 70 | #define DEV_ADDR_MASK 0x7F |
| frank26080115 | 0:bf7b9fba3924 | 71 | #define DEV_EN 0x80 |
| frank26080115 | 0:bf7b9fba3924 | 72 | |
| frank26080115 | 0:bf7b9fba3924 | 73 | /* Device Configure Register Definitions */ |
| frank26080115 | 0:bf7b9fba3924 | 74 | #define CONF_DVICE 0x01 |
| frank26080115 | 0:bf7b9fba3924 | 75 | |
| frank26080115 | 0:bf7b9fba3924 | 76 | /* Device Mode Register Definitions */ |
| frank26080115 | 0:bf7b9fba3924 | 77 | #define AP_CLK 0x01 |
| frank26080115 | 0:bf7b9fba3924 | 78 | #define INAK_CI 0x02 |
| frank26080115 | 0:bf7b9fba3924 | 79 | #define INAK_CO 0x04 |
| frank26080115 | 0:bf7b9fba3924 | 80 | #define INAK_II 0x08 |
| frank26080115 | 0:bf7b9fba3924 | 81 | #define INAK_IO 0x10 |
| frank26080115 | 0:bf7b9fba3924 | 82 | #define INAK_BI 0x20 |
| frank26080115 | 0:bf7b9fba3924 | 83 | #define INAK_BO 0x40 |
| frank26080115 | 0:bf7b9fba3924 | 84 | |
| frank26080115 | 0:bf7b9fba3924 | 85 | /* Device Status Register Definitions */ |
| frank26080115 | 0:bf7b9fba3924 | 86 | #define DEV_CON 0x01 |
| frank26080115 | 0:bf7b9fba3924 | 87 | #define DEV_CON_CH 0x02 |
| frank26080115 | 0:bf7b9fba3924 | 88 | #define DEV_SUS 0x04 |
| frank26080115 | 0:bf7b9fba3924 | 89 | #define DEV_SUS_CH 0x08 |
| frank26080115 | 0:bf7b9fba3924 | 90 | #define DEV_RST 0x10 |
| frank26080115 | 0:bf7b9fba3924 | 91 | |
| frank26080115 | 0:bf7b9fba3924 | 92 | /* Error Code Register Definitions */ |
| frank26080115 | 0:bf7b9fba3924 | 93 | #define ERR_EC_MASK 0x0F |
| frank26080115 | 0:bf7b9fba3924 | 94 | #define ERR_EA 0x10 |
| frank26080115 | 0:bf7b9fba3924 | 95 | |
| frank26080115 | 0:bf7b9fba3924 | 96 | /* Error Status Register Definitions */ |
| frank26080115 | 0:bf7b9fba3924 | 97 | #define ERR_PID 0x01 |
| frank26080115 | 0:bf7b9fba3924 | 98 | #define ERR_UEPKT 0x02 |
| frank26080115 | 0:bf7b9fba3924 | 99 | #define ERR_DCRC 0x04 |
| frank26080115 | 0:bf7b9fba3924 | 100 | #define ERR_TIMOUT 0x08 |
| frank26080115 | 0:bf7b9fba3924 | 101 | #define ERR_EOP 0x10 |
| frank26080115 | 0:bf7b9fba3924 | 102 | #define ERR_B_OVRN 0x20 |
| frank26080115 | 0:bf7b9fba3924 | 103 | #define ERR_BTSTF 0x40 |
| frank26080115 | 0:bf7b9fba3924 | 104 | #define ERR_TGL 0x80 |
| frank26080115 | 0:bf7b9fba3924 | 105 | |
| frank26080115 | 0:bf7b9fba3924 | 106 | /* Endpoint Select Register Definitions */ |
| frank26080115 | 0:bf7b9fba3924 | 107 | #define EP_SEL_F 0x01 |
| frank26080115 | 0:bf7b9fba3924 | 108 | #define EP_SEL_ST 0x02 |
| frank26080115 | 0:bf7b9fba3924 | 109 | #define EP_SEL_STP 0x04 |
| frank26080115 | 0:bf7b9fba3924 | 110 | #define EP_SEL_PO 0x08 |
| frank26080115 | 0:bf7b9fba3924 | 111 | #define EP_SEL_EPN 0x10 |
| frank26080115 | 0:bf7b9fba3924 | 112 | #define EP_SEL_B_1_FULL 0x20 |
| frank26080115 | 0:bf7b9fba3924 | 113 | #define EP_SEL_B_2_FULL 0x40 |
| frank26080115 | 0:bf7b9fba3924 | 114 | |
| frank26080115 | 0:bf7b9fba3924 | 115 | /* Endpoint Status Register Definitions */ |
| frank26080115 | 0:bf7b9fba3924 | 116 | #define EP_STAT_ST 0x01 |
| frank26080115 | 0:bf7b9fba3924 | 117 | #define EP_STAT_DA 0x20 |
| frank26080115 | 0:bf7b9fba3924 | 118 | #define EP_STAT_RF_MO 0x40 |
| frank26080115 | 0:bf7b9fba3924 | 119 | #define EP_STAT_CND_ST 0x80 |
| frank26080115 | 0:bf7b9fba3924 | 120 | |
| frank26080115 | 0:bf7b9fba3924 | 121 | /* Clear Buffer Register Definitions */ |
| frank26080115 | 0:bf7b9fba3924 | 122 | #define CLR_BUF_PO 0x01 |
| frank26080115 | 0:bf7b9fba3924 | 123 | |
| frank26080115 | 0:bf7b9fba3924 | 124 | |
| frank26080115 | 0:bf7b9fba3924 | 125 | /* DMA Interrupt Bit Definitions */ |
| frank26080115 | 0:bf7b9fba3924 | 126 | #define EOT_INT 0x01 |
| frank26080115 | 0:bf7b9fba3924 | 127 | #define NDD_REQ_INT 0x02 |
| frank26080115 | 0:bf7b9fba3924 | 128 | #define SYS_ERR_INT 0x04 |
| frank26080115 | 0:bf7b9fba3924 | 129 | |
| frank26080115 | 0:bf7b9fba3924 | 130 | |
| frank26080115 | 0:bf7b9fba3924 | 131 | #endif /* __USBREG_H */ |