Diff: source/ADC.cpp

Revision:

1:4403f2ed1c1f

Child:

2:7abdaa5a9209

diff -r c5607b31fb07 -r 4403f2ed1c1f source/ADC.cpp
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/source/ADC.cpp	Tue Oct 04 13:19:19 2016 +0000
@@ -0,0 +1,74 @@
+
+#include "ADC.h"
+#include "globals.h"
+#include "mbed.h"
+
+
+//#define DEBUG
+#define INFOMESSAGES
+#define WARNMESSAGES
+#define ERRMESSAGES
+#define FUNCNAME "ADC"
+#include "messages.h"
+
+
+void ConfigureADC(void){
+    
+    unsigned int value;
+    
+    // ensure power is turned on
+    // Grabbed from lines 54-57 of analogin_api.c
+    // This turns on the clock to Ports A, B, and C
+    RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_GPIOCEN;
+    // This turns on the clock to the ADC:
+    RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
+    
+    
+    // Turn on the ADC:
+    value = ADC_CR2_ADON;
+    ADC1->CR2 = value;
+    wait_us(100);
+    
+    // Turn on the internal temperature sensor:
+    ADC->CCR |= ADC_CCR_TSVREFE;
+    
+    // *** Control Register 1: CR1 ***
+    value = 0;
+    // [8] Set the SCAN Mode bit, to convert all registers when trigered:
+    value |= ADC_CR1_SCAN;
+    // [5] Set the JEOCIE bit, to trigger an interrupt when conversion ends.
+    value |= ADC_CR1_JEOCIE;
+    // Set the register:
+    ADC1->CR1 = value;
+    
+    // *** Control Register 2: CR2 ***
+    value = 0;
+    // [21:20] Set to 1, External trigger of injected channels triggered by positive edge.
+    value |= ADC_CR2_JEXTEN_0;
+    // Select the TIM1 TRGO and the external trigger:
+    value |= ADC_CR2_JEXTSEL_0;
+    // Set the register:
+    ADC1->CR2 |= value;
+    
+    // *** ADC injected sequence register: JSQR ***
+    value = 0;
+    // [21:20] JL bits, set to 0 for 1 total conversions to take place
+    // 
+    // [19:15] Convert CH16 first:
+    value |= ADC_JSQR_JSQ1_4;
+    // Save the register:
+    ADC1->JSQR = value;
+    
+    // Set the sample numbers (making this bigger samples more slowly):
+    ADC1->SMPR2 = ADC_SMPR2_SMP1_1 | ADC_SMPR2_SMP1_2;
+    
+    
+    INFO("ADC configuration complete!");
+    DBG("ADC Registers:\n\r");
+    DBG("The SR Register reads: %d\n\r", ADC1->SR);
+    DBG("The CR1 Register reads: %d\n\r", ADC1->CR1);
+    DBG("The CR2 Register reads: %d\n\r", ADC1->CR2);
+    DBG("The JSQR Register reads: %d\n\r", ADC1->JSQR);
+    
+    return;
+}
\ No newline at end of file