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mbed-stm32l0l1-src
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mbed-stm32l0l1-src-1
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lzbp li
targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_dma.c@489:119543c9f674, 2015-03-12 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Mar 12 14:30:49 2015 +0000
- Revision:
- 489:119543c9f674
- Parent:
- 387:643a59b3dbac
Synchronized with git revision 051854181516992fb498d51f9ee6e70cbad9e083
Full URL: https://github.com/mbedmicro/mbed/commit/051854181516992fb498d51f9ee6e70cbad9e083/
Fix ksdk mcu HAL - stopbit
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 376:cb4d9db17537 | 1 | /** |
| mbed_official | 376:cb4d9db17537 | 2 | ****************************************************************************** |
| mbed_official | 376:cb4d9db17537 | 3 | * @file stm32l0xx_hal_dma.c |
| mbed_official | 376:cb4d9db17537 | 4 | * @author MCD Application Team |
| mbed_official | 489:119543c9f674 | 5 | * @version V1.2.0 |
| mbed_official | 489:119543c9f674 | 6 | * @date 06-February-2015 |
| mbed_official | 376:cb4d9db17537 | 7 | * @brief DMA HAL module driver. |
| mbed_official | 376:cb4d9db17537 | 8 | * |
| mbed_official | 376:cb4d9db17537 | 9 | * This file provides firmware functions to manage the following |
| mbed_official | 376:cb4d9db17537 | 10 | * functionalities of the Direct Memory Access (DMA) peripheral: |
| mbed_official | 376:cb4d9db17537 | 11 | * + Initialization/de-initialization functions |
| mbed_official | 376:cb4d9db17537 | 12 | * + I/O operation functions |
| mbed_official | 376:cb4d9db17537 | 13 | * + Peripheral State functions |
| mbed_official | 376:cb4d9db17537 | 14 | * |
| mbed_official | 376:cb4d9db17537 | 15 | * |
| mbed_official | 376:cb4d9db17537 | 16 | @verbatim |
| mbed_official | 376:cb4d9db17537 | 17 | ============================================================================== |
| mbed_official | 376:cb4d9db17537 | 18 | ##### How to use this driver ##### |
| mbed_official | 376:cb4d9db17537 | 19 | ============================================================================== |
| mbed_official | 376:cb4d9db17537 | 20 | [..] |
| mbed_official | 376:cb4d9db17537 | 21 | (#) Enable and configure the peripheral to be connected to the DMA Channel |
| mbed_official | 376:cb4d9db17537 | 22 | (except for internal SRAM / FLASH memories: no initialization is |
| mbed_official | 376:cb4d9db17537 | 23 | necessary). |
| mbed_official | 376:cb4d9db17537 | 24 | |
| mbed_official | 376:cb4d9db17537 | 25 | (#) For a given Channel, program the required configuration through the following parameters: |
| mbed_official | 376:cb4d9db17537 | 26 | Channel request, Transfer Direction, Source and Destination data formats, |
| mbed_official | 376:cb4d9db17537 | 27 | Circular, Normal or peripheral flow control mode, Channel Priority level, |
| mbed_official | 376:cb4d9db17537 | 28 | Source and Destination Increment mode using HAL_DMA_Init() function. |
| mbed_official | 376:cb4d9db17537 | 29 | |
| mbed_official | 376:cb4d9db17537 | 30 | *** Polling mode IO operation *** |
| mbed_official | 376:cb4d9db17537 | 31 | ================================= |
| mbed_official | 376:cb4d9db17537 | 32 | [..] |
| mbed_official | 376:cb4d9db17537 | 33 | (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source |
| mbed_official | 376:cb4d9db17537 | 34 | address and destination address and the Length of data to be transferred |
| mbed_official | 376:cb4d9db17537 | 35 | (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this |
| mbed_official | 376:cb4d9db17537 | 36 | case a fixed Timeout can be configured by User depending from his application. |
| mbed_official | 376:cb4d9db17537 | 37 | |
| mbed_official | 376:cb4d9db17537 | 38 | *** Interrupt mode IO operation *** |
| mbed_official | 376:cb4d9db17537 | 39 | =================================== |
| mbed_official | 376:cb4d9db17537 | 40 | [..] |
| mbed_official | 376:cb4d9db17537 | 41 | (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority() |
| mbed_official | 376:cb4d9db17537 | 42 | (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() |
| mbed_official | 376:cb4d9db17537 | 43 | (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of |
| mbed_official | 376:cb4d9db17537 | 44 | Source address and destination address and the Length of data to be transferred. In this |
| mbed_official | 376:cb4d9db17537 | 45 | case the DMA interrupt is configured |
| mbed_official | 376:cb4d9db17537 | 46 | (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine |
| mbed_official | 376:cb4d9db17537 | 47 | (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can |
| mbed_official | 376:cb4d9db17537 | 48 | add his own function by customization of function pointer XferCpltCallback and |
| mbed_official | 376:cb4d9db17537 | 49 | XferErrorCallback (i.e a member of DMA handle structure). |
| mbed_official | 376:cb4d9db17537 | 50 | |
| mbed_official | 489:119543c9f674 | 51 | (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error |
| mbed_official | 489:119543c9f674 | 52 | detection. |
| mbed_official | 376:cb4d9db17537 | 53 | |
| mbed_official | 489:119543c9f674 | 54 | (#) Use HAL_DMA_Abort() function to abort the current transfer |
| mbed_official | 376:cb4d9db17537 | 55 | |
| mbed_official | 489:119543c9f674 | 56 | -@- In Memory-to-Memory transfer mode, Circular mode is not allowed. |
| mbed_official | 376:cb4d9db17537 | 57 | |
| mbed_official | 376:cb4d9db17537 | 58 | @endverbatim |
| mbed_official | 376:cb4d9db17537 | 59 | ****************************************************************************** |
| mbed_official | 376:cb4d9db17537 | 60 | * @attention |
| mbed_official | 376:cb4d9db17537 | 61 | * |
| mbed_official | 489:119543c9f674 | 62 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| mbed_official | 376:cb4d9db17537 | 63 | * |
| mbed_official | 376:cb4d9db17537 | 64 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 376:cb4d9db17537 | 65 | * are permitted provided that the following conditions are met: |
| mbed_official | 376:cb4d9db17537 | 66 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 376:cb4d9db17537 | 67 | * this list of conditions and the following disclaimer. |
| mbed_official | 376:cb4d9db17537 | 68 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 376:cb4d9db17537 | 69 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 376:cb4d9db17537 | 70 | * and/or other materials provided with the distribution. |
| mbed_official | 376:cb4d9db17537 | 71 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 376:cb4d9db17537 | 72 | * may be used to endorse or promote products derived from this software |
| mbed_official | 376:cb4d9db17537 | 73 | * without specific prior written permission. |
| mbed_official | 376:cb4d9db17537 | 74 | * |
| mbed_official | 376:cb4d9db17537 | 75 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 376:cb4d9db17537 | 76 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 376:cb4d9db17537 | 77 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 376:cb4d9db17537 | 78 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 376:cb4d9db17537 | 79 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 376:cb4d9db17537 | 80 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 376:cb4d9db17537 | 81 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 376:cb4d9db17537 | 82 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 376:cb4d9db17537 | 83 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 376:cb4d9db17537 | 84 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 376:cb4d9db17537 | 85 | * |
| mbed_official | 376:cb4d9db17537 | 86 | ****************************************************************************** |
| mbed_official | 376:cb4d9db17537 | 87 | */ |
| mbed_official | 376:cb4d9db17537 | 88 | |
| mbed_official | 376:cb4d9db17537 | 89 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 376:cb4d9db17537 | 90 | #include "stm32l0xx_hal.h" |
| mbed_official | 376:cb4d9db17537 | 91 | |
| mbed_official | 376:cb4d9db17537 | 92 | /** @addtogroup STM32L0xx_HAL_Driver |
| mbed_official | 376:cb4d9db17537 | 93 | * @{ |
| mbed_official | 376:cb4d9db17537 | 94 | */ |
| mbed_official | 376:cb4d9db17537 | 95 | |
| mbed_official | 489:119543c9f674 | 96 | /** @addtogroup DMA DMA |
| mbed_official | 376:cb4d9db17537 | 97 | * @brief DMA HAL module driver |
| mbed_official | 376:cb4d9db17537 | 98 | * @{ |
| mbed_official | 376:cb4d9db17537 | 99 | */ |
| mbed_official | 376:cb4d9db17537 | 100 | |
| mbed_official | 376:cb4d9db17537 | 101 | #ifdef HAL_DMA_MODULE_ENABLED |
| mbed_official | 376:cb4d9db17537 | 102 | |
| mbed_official | 489:119543c9f674 | 103 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 104 | /** @defgroup DMA_Private_Types DMA Private Types |
| mbed_official | 489:119543c9f674 | 105 | * |
| mbed_official | 489:119543c9f674 | 106 | * @{ |
| mbed_official | 489:119543c9f674 | 107 | */ |
| mbed_official | 376:cb4d9db17537 | 108 | #define HAL_TIMEOUT_DMA_ABORT ((uint32_t)1000) /* 1s */ |
| mbed_official | 489:119543c9f674 | 109 | |
| mbed_official | 489:119543c9f674 | 110 | /** |
| mbed_official | 489:119543c9f674 | 111 | * @} |
| mbed_official | 489:119543c9f674 | 112 | */ |
| mbed_official | 489:119543c9f674 | 113 | |
| mbed_official | 489:119543c9f674 | 114 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 115 | /** @defgroup DMA_Private_Functions DMA Private Functions |
| mbed_official | 489:119543c9f674 | 116 | * @{ |
| mbed_official | 489:119543c9f674 | 117 | */ |
| mbed_official | 376:cb4d9db17537 | 118 | static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); |
| mbed_official | 489:119543c9f674 | 119 | /** |
| mbed_official | 489:119543c9f674 | 120 | * @} |
| mbed_official | 489:119543c9f674 | 121 | */ |
| mbed_official | 376:cb4d9db17537 | 122 | |
| mbed_official | 489:119543c9f674 | 123 | /** @addtogroup DMA_Exported_Functions DMA Exported Functions |
| mbed_official | 376:cb4d9db17537 | 124 | * @{ |
| mbed_official | 376:cb4d9db17537 | 125 | */ |
| mbed_official | 376:cb4d9db17537 | 126 | |
| mbed_official | 489:119543c9f674 | 127 | /** @addtogroup DMA_Exported_Functions_Group1 |
| mbed_official | 376:cb4d9db17537 | 128 | * @brief Initialization/de-initialization functions |
| mbed_official | 376:cb4d9db17537 | 129 | * |
| mbed_official | 376:cb4d9db17537 | 130 | @verbatim |
| mbed_official | 376:cb4d9db17537 | 131 | =============================================================================== |
| mbed_official | 376:cb4d9db17537 | 132 | ##### Initialization and de-initialization functions ##### |
| mbed_official | 376:cb4d9db17537 | 133 | =============================================================================== |
| mbed_official | 376:cb4d9db17537 | 134 | [..] This section provides functions allowing to: |
| mbed_official | 376:cb4d9db17537 | 135 | (+) Initialize and configure the DMA |
| mbed_official | 376:cb4d9db17537 | 136 | (+) De-Initialize the DMA |
| mbed_official | 376:cb4d9db17537 | 137 | |
| mbed_official | 376:cb4d9db17537 | 138 | @endverbatim |
| mbed_official | 376:cb4d9db17537 | 139 | * @{ |
| mbed_official | 376:cb4d9db17537 | 140 | */ |
| mbed_official | 376:cb4d9db17537 | 141 | |
| mbed_official | 376:cb4d9db17537 | 142 | /** |
| mbed_official | 376:cb4d9db17537 | 143 | * @brief Initializes the DMA according to the specified |
| mbed_official | 376:cb4d9db17537 | 144 | * parameters in the DMA_InitTypeDef and create the associated handle. |
| mbed_official | 376:cb4d9db17537 | 145 | * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 376:cb4d9db17537 | 146 | * the configuration information for the specified DMA Channel. |
| mbed_official | 376:cb4d9db17537 | 147 | * @retval HAL status |
| mbed_official | 376:cb4d9db17537 | 148 | */ |
| mbed_official | 376:cb4d9db17537 | 149 | HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) |
| mbed_official | 376:cb4d9db17537 | 150 | { |
| mbed_official | 376:cb4d9db17537 | 151 | uint32_t tmp = 0; |
| mbed_official | 376:cb4d9db17537 | 152 | |
| mbed_official | 376:cb4d9db17537 | 153 | /* Check the DMA peripheral state */ |
| mbed_official | 489:119543c9f674 | 154 | if(hdma == NULL) |
| mbed_official | 376:cb4d9db17537 | 155 | { |
| mbed_official | 376:cb4d9db17537 | 156 | return HAL_ERROR; |
| mbed_official | 376:cb4d9db17537 | 157 | } |
| mbed_official | 376:cb4d9db17537 | 158 | |
| mbed_official | 376:cb4d9db17537 | 159 | /* Check the parameters */ |
| mbed_official | 376:cb4d9db17537 | 160 | assert_param(IS_DMA_ALL_PERIPH(hdma->Instance)); |
| mbed_official | 376:cb4d9db17537 | 161 | assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request)); |
| mbed_official | 376:cb4d9db17537 | 162 | assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); |
| mbed_official | 376:cb4d9db17537 | 163 | assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); |
| mbed_official | 376:cb4d9db17537 | 164 | assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); |
| mbed_official | 376:cb4d9db17537 | 165 | assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); |
| mbed_official | 376:cb4d9db17537 | 166 | assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); |
| mbed_official | 376:cb4d9db17537 | 167 | assert_param(IS_DMA_MODE(hdma->Init.Mode)); |
| mbed_official | 376:cb4d9db17537 | 168 | assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); |
| mbed_official | 376:cb4d9db17537 | 169 | |
| mbed_official | 376:cb4d9db17537 | 170 | /* Change DMA peripheral state */ |
| mbed_official | 376:cb4d9db17537 | 171 | hdma->State = HAL_DMA_STATE_BUSY; |
| mbed_official | 376:cb4d9db17537 | 172 | |
| mbed_official | 376:cb4d9db17537 | 173 | /* Get the CR register value */ |
| mbed_official | 376:cb4d9db17537 | 174 | tmp = hdma->Instance->CCR; |
| mbed_official | 376:cb4d9db17537 | 175 | |
| mbed_official | 376:cb4d9db17537 | 176 | /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */ |
| mbed_official | 376:cb4d9db17537 | 177 | tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ |
| mbed_official | 376:cb4d9db17537 | 178 | DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ |
| mbed_official | 376:cb4d9db17537 | 179 | DMA_CCR_DIR)); |
| mbed_official | 376:cb4d9db17537 | 180 | |
| mbed_official | 376:cb4d9db17537 | 181 | /* Prepare the DMA Channel configuration */ |
| mbed_official | 376:cb4d9db17537 | 182 | tmp |= hdma->Init.Direction | |
| mbed_official | 376:cb4d9db17537 | 183 | hdma->Init.PeriphInc | hdma->Init.MemInc | |
| mbed_official | 376:cb4d9db17537 | 184 | hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | |
| mbed_official | 376:cb4d9db17537 | 185 | hdma->Init.Mode | hdma->Init.Priority; |
| mbed_official | 376:cb4d9db17537 | 186 | |
| mbed_official | 376:cb4d9db17537 | 187 | /* Write to DMA Channel CR register */ |
| mbed_official | 376:cb4d9db17537 | 188 | hdma->Instance->CCR = tmp; |
| mbed_official | 376:cb4d9db17537 | 189 | |
| mbed_official | 376:cb4d9db17537 | 190 | /* Write to DMA channel selection register */ |
| mbed_official | 376:cb4d9db17537 | 191 | if (hdma->Instance == DMA1_Channel1) |
| mbed_official | 376:cb4d9db17537 | 192 | { |
| mbed_official | 376:cb4d9db17537 | 193 | /*Reset request selection for DMA1 Channel1*/ |
| mbed_official | 376:cb4d9db17537 | 194 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C1S; |
| mbed_official | 376:cb4d9db17537 | 195 | |
| mbed_official | 376:cb4d9db17537 | 196 | /* Configure request selection for DMA1 Channel1 */ |
| mbed_official | 376:cb4d9db17537 | 197 | DMA1_CSELR->CSELR |= hdma->Init.Request; |
| mbed_official | 376:cb4d9db17537 | 198 | } |
| mbed_official | 376:cb4d9db17537 | 199 | else if (hdma->Instance == DMA1_Channel2) |
| mbed_official | 376:cb4d9db17537 | 200 | { |
| mbed_official | 376:cb4d9db17537 | 201 | /*Reset request selection for DMA1 Channel2*/ |
| mbed_official | 376:cb4d9db17537 | 202 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C2S; |
| mbed_official | 376:cb4d9db17537 | 203 | |
| mbed_official | 376:cb4d9db17537 | 204 | /* Configure request selection for DMA1 Channel2 */ |
| mbed_official | 376:cb4d9db17537 | 205 | DMA1_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << 4); |
| mbed_official | 376:cb4d9db17537 | 206 | } |
| mbed_official | 376:cb4d9db17537 | 207 | else if (hdma->Instance == DMA1_Channel3) |
| mbed_official | 376:cb4d9db17537 | 208 | { |
| mbed_official | 376:cb4d9db17537 | 209 | /*Reset request selection for DMA1 Channel3*/ |
| mbed_official | 376:cb4d9db17537 | 210 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C3S; |
| mbed_official | 376:cb4d9db17537 | 211 | |
| mbed_official | 376:cb4d9db17537 | 212 | /* Configure request selection for DMA1 Channel3 */ |
| mbed_official | 376:cb4d9db17537 | 213 | DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 8); |
| mbed_official | 376:cb4d9db17537 | 214 | } |
| mbed_official | 376:cb4d9db17537 | 215 | else if (hdma->Instance == DMA1_Channel4) |
| mbed_official | 376:cb4d9db17537 | 216 | { |
| mbed_official | 376:cb4d9db17537 | 217 | /*Reset request selection for DMA1 Channel4*/ |
| mbed_official | 376:cb4d9db17537 | 218 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C4S; |
| mbed_official | 376:cb4d9db17537 | 219 | |
| mbed_official | 376:cb4d9db17537 | 220 | /* Configure request selection for DMA1 Channel4 */ |
| mbed_official | 376:cb4d9db17537 | 221 | DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 12); |
| mbed_official | 376:cb4d9db17537 | 222 | } |
| mbed_official | 376:cb4d9db17537 | 223 | else if (hdma->Instance == DMA1_Channel5) |
| mbed_official | 376:cb4d9db17537 | 224 | { |
| mbed_official | 376:cb4d9db17537 | 225 | /*Reset request selection for DMA1 Channel5*/ |
| mbed_official | 376:cb4d9db17537 | 226 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C5S; |
| mbed_official | 376:cb4d9db17537 | 227 | |
| mbed_official | 376:cb4d9db17537 | 228 | /* Configure request selection for DMA1 Channel5 */ |
| mbed_official | 376:cb4d9db17537 | 229 | DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 16); |
| mbed_official | 376:cb4d9db17537 | 230 | } |
| mbed_official | 376:cb4d9db17537 | 231 | else if (hdma->Instance == DMA1_Channel6) |
| mbed_official | 376:cb4d9db17537 | 232 | { |
| mbed_official | 376:cb4d9db17537 | 233 | /*Reset request selection for DMA1 Channel6*/ |
| mbed_official | 376:cb4d9db17537 | 234 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C6S; |
| mbed_official | 376:cb4d9db17537 | 235 | |
| mbed_official | 376:cb4d9db17537 | 236 | /* Configure request selection for DMA1 Channel6 */ |
| mbed_official | 376:cb4d9db17537 | 237 | DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 20); |
| mbed_official | 376:cb4d9db17537 | 238 | } |
| mbed_official | 376:cb4d9db17537 | 239 | else if (hdma->Instance == DMA1_Channel7) |
| mbed_official | 376:cb4d9db17537 | 240 | { |
| mbed_official | 376:cb4d9db17537 | 241 | /*Reset request selection for DMA1 Channel7*/ |
| mbed_official | 376:cb4d9db17537 | 242 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C7S; |
| mbed_official | 376:cb4d9db17537 | 243 | |
| mbed_official | 376:cb4d9db17537 | 244 | /* Configure request selection for DMA1 Channel7 */ |
| mbed_official | 376:cb4d9db17537 | 245 | DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 24); |
| mbed_official | 376:cb4d9db17537 | 246 | } |
| mbed_official | 376:cb4d9db17537 | 247 | |
| mbed_official | 376:cb4d9db17537 | 248 | /* Initialize the DMA state*/ |
| mbed_official | 376:cb4d9db17537 | 249 | hdma->State = HAL_DMA_STATE_READY; |
| mbed_official | 376:cb4d9db17537 | 250 | |
| mbed_official | 376:cb4d9db17537 | 251 | return HAL_OK; |
| mbed_official | 376:cb4d9db17537 | 252 | } |
| mbed_official | 376:cb4d9db17537 | 253 | |
| mbed_official | 376:cb4d9db17537 | 254 | /** |
| mbed_official | 376:cb4d9db17537 | 255 | * @brief DeInitializes the DMA peripheral |
| mbed_official | 376:cb4d9db17537 | 256 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 376:cb4d9db17537 | 257 | * the configuration information for the specified DMA Channel. |
| mbed_official | 376:cb4d9db17537 | 258 | * @retval HAL status |
| mbed_official | 376:cb4d9db17537 | 259 | */ |
| mbed_official | 376:cb4d9db17537 | 260 | HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) |
| mbed_official | 376:cb4d9db17537 | 261 | { |
| mbed_official | 376:cb4d9db17537 | 262 | /* Check the DMA peripheral state */ |
| mbed_official | 489:119543c9f674 | 263 | if(hdma == NULL) |
| mbed_official | 376:cb4d9db17537 | 264 | { |
| mbed_official | 376:cb4d9db17537 | 265 | return HAL_ERROR; |
| mbed_official | 376:cb4d9db17537 | 266 | } |
| mbed_official | 376:cb4d9db17537 | 267 | |
| mbed_official | 376:cb4d9db17537 | 268 | /* Check the DMA peripheral state */ |
| mbed_official | 376:cb4d9db17537 | 269 | if(hdma->State == HAL_DMA_STATE_BUSY) |
| mbed_official | 376:cb4d9db17537 | 270 | { |
| mbed_official | 376:cb4d9db17537 | 271 | return HAL_ERROR; |
| mbed_official | 376:cb4d9db17537 | 272 | } |
| mbed_official | 376:cb4d9db17537 | 273 | |
| mbed_official | 376:cb4d9db17537 | 274 | /* Disable the selected DMA Channelx */ |
| mbed_official | 376:cb4d9db17537 | 275 | __HAL_DMA_DISABLE(hdma); |
| mbed_official | 376:cb4d9db17537 | 276 | |
| mbed_official | 376:cb4d9db17537 | 277 | /* Reset DMA Channel control register */ |
| mbed_official | 376:cb4d9db17537 | 278 | hdma->Instance->CCR = 0; |
| mbed_official | 376:cb4d9db17537 | 279 | |
| mbed_official | 376:cb4d9db17537 | 280 | /* Reset DMA Channel Number of Data to Transfer register */ |
| mbed_official | 376:cb4d9db17537 | 281 | hdma->Instance->CNDTR = 0; |
| mbed_official | 376:cb4d9db17537 | 282 | |
| mbed_official | 376:cb4d9db17537 | 283 | /* Reset DMA Channel peripheral address register */ |
| mbed_official | 376:cb4d9db17537 | 284 | hdma->Instance->CPAR = 0; |
| mbed_official | 376:cb4d9db17537 | 285 | |
| mbed_official | 376:cb4d9db17537 | 286 | /* Reset DMA Channel memory address register */ |
| mbed_official | 376:cb4d9db17537 | 287 | hdma->Instance->CMAR = 0; |
| mbed_official | 376:cb4d9db17537 | 288 | |
| mbed_official | 376:cb4d9db17537 | 289 | /* Clear all flags */ |
| mbed_official | 376:cb4d9db17537 | 290 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); |
| mbed_official | 376:cb4d9db17537 | 291 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); |
| mbed_official | 376:cb4d9db17537 | 292 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); |
| mbed_official | 376:cb4d9db17537 | 293 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); |
| mbed_official | 376:cb4d9db17537 | 294 | |
| mbed_official | 376:cb4d9db17537 | 295 | /* Reset DMA channel selection register */ |
| mbed_official | 376:cb4d9db17537 | 296 | if (hdma->Instance == DMA1_Channel1) |
| mbed_official | 376:cb4d9db17537 | 297 | { |
| mbed_official | 376:cb4d9db17537 | 298 | /*Reset DMA request*/ |
| mbed_official | 376:cb4d9db17537 | 299 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C1S; |
| mbed_official | 376:cb4d9db17537 | 300 | } |
| mbed_official | 376:cb4d9db17537 | 301 | else if (hdma->Instance == DMA1_Channel2) |
| mbed_official | 376:cb4d9db17537 | 302 | { |
| mbed_official | 376:cb4d9db17537 | 303 | /*Reset DMA request*/ |
| mbed_official | 376:cb4d9db17537 | 304 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C2S; |
| mbed_official | 376:cb4d9db17537 | 305 | } |
| mbed_official | 376:cb4d9db17537 | 306 | else if (hdma->Instance == DMA1_Channel3) |
| mbed_official | 376:cb4d9db17537 | 307 | { |
| mbed_official | 376:cb4d9db17537 | 308 | /*Reset DMA request*/ |
| mbed_official | 376:cb4d9db17537 | 309 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C3S; |
| mbed_official | 376:cb4d9db17537 | 310 | } |
| mbed_official | 376:cb4d9db17537 | 311 | else if (hdma->Instance == DMA1_Channel4) |
| mbed_official | 376:cb4d9db17537 | 312 | { |
| mbed_official | 376:cb4d9db17537 | 313 | /*Reset DMA request*/ |
| mbed_official | 376:cb4d9db17537 | 314 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C4S; |
| mbed_official | 376:cb4d9db17537 | 315 | } |
| mbed_official | 376:cb4d9db17537 | 316 | else if (hdma->Instance == DMA1_Channel5) |
| mbed_official | 376:cb4d9db17537 | 317 | { |
| mbed_official | 376:cb4d9db17537 | 318 | /*Reset DMA request*/ |
| mbed_official | 376:cb4d9db17537 | 319 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C5S; |
| mbed_official | 376:cb4d9db17537 | 320 | } |
| mbed_official | 376:cb4d9db17537 | 321 | else if (hdma->Instance == DMA1_Channel6) |
| mbed_official | 376:cb4d9db17537 | 322 | { |
| mbed_official | 376:cb4d9db17537 | 323 | /*Reset DMA request*/ |
| mbed_official | 376:cb4d9db17537 | 324 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C6S; |
| mbed_official | 376:cb4d9db17537 | 325 | } |
| mbed_official | 376:cb4d9db17537 | 326 | else if (hdma->Instance == DMA1_Channel7) |
| mbed_official | 376:cb4d9db17537 | 327 | { |
| mbed_official | 376:cb4d9db17537 | 328 | /*Reset DMA request*/ |
| mbed_official | 376:cb4d9db17537 | 329 | DMA1_CSELR->CSELR &= ~DMA_CSELR_C7S; |
| mbed_official | 376:cb4d9db17537 | 330 | } |
| mbed_official | 376:cb4d9db17537 | 331 | |
| mbed_official | 376:cb4d9db17537 | 332 | /* Initialise the error code */ |
| mbed_official | 376:cb4d9db17537 | 333 | hdma->ErrorCode = HAL_DMA_ERROR_NONE; |
| mbed_official | 376:cb4d9db17537 | 334 | |
| mbed_official | 376:cb4d9db17537 | 335 | /* Initialize the DMA state */ |
| mbed_official | 376:cb4d9db17537 | 336 | hdma->State = HAL_DMA_STATE_RESET; |
| mbed_official | 376:cb4d9db17537 | 337 | |
| mbed_official | 376:cb4d9db17537 | 338 | /* Release Lock */ |
| mbed_official | 376:cb4d9db17537 | 339 | __HAL_UNLOCK(hdma); |
| mbed_official | 376:cb4d9db17537 | 340 | |
| mbed_official | 376:cb4d9db17537 | 341 | return HAL_OK; |
| mbed_official | 376:cb4d9db17537 | 342 | } |
| mbed_official | 376:cb4d9db17537 | 343 | |
| mbed_official | 376:cb4d9db17537 | 344 | /** |
| mbed_official | 376:cb4d9db17537 | 345 | * @} |
| mbed_official | 376:cb4d9db17537 | 346 | */ |
| mbed_official | 376:cb4d9db17537 | 347 | |
| mbed_official | 489:119543c9f674 | 348 | /** @addtogroup DMA_Exported_Functions_Group2 |
| mbed_official | 376:cb4d9db17537 | 349 | * @brief I/O operation functions |
| mbed_official | 376:cb4d9db17537 | 350 | * |
| mbed_official | 376:cb4d9db17537 | 351 | @verbatim |
| mbed_official | 376:cb4d9db17537 | 352 | =============================================================================== |
| mbed_official | 376:cb4d9db17537 | 353 | ##### IO operation functions ##### |
| mbed_official | 376:cb4d9db17537 | 354 | =============================================================================== |
| mbed_official | 376:cb4d9db17537 | 355 | [..] This section provides functions allowing to: |
| mbed_official | 376:cb4d9db17537 | 356 | (+) Configure the source, destination address and data length and Start DMA transfer |
| mbed_official | 376:cb4d9db17537 | 357 | (+) Configure the source, destination address and data length and |
| mbed_official | 376:cb4d9db17537 | 358 | Start DMA transfer with interrupt |
| mbed_official | 376:cb4d9db17537 | 359 | (+) Abort DMA transfer |
| mbed_official | 376:cb4d9db17537 | 360 | (+) Poll for transfer complete |
| mbed_official | 376:cb4d9db17537 | 361 | (+) Handle DMA interrupt request |
| mbed_official | 376:cb4d9db17537 | 362 | |
| mbed_official | 376:cb4d9db17537 | 363 | @endverbatim |
| mbed_official | 376:cb4d9db17537 | 364 | * @{ |
| mbed_official | 376:cb4d9db17537 | 365 | */ |
| mbed_official | 376:cb4d9db17537 | 366 | |
| mbed_official | 376:cb4d9db17537 | 367 | /** |
| mbed_official | 376:cb4d9db17537 | 368 | * @brief Starts the DMA Transfer. |
| mbed_official | 376:cb4d9db17537 | 369 | * @param hdma : pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 376:cb4d9db17537 | 370 | * the configuration information for the specified DMA Channel. |
| mbed_official | 376:cb4d9db17537 | 371 | * @param SrcAddress: The source memory Buffer address |
| mbed_official | 376:cb4d9db17537 | 372 | * @param DstAddress: The destination memory Buffer address |
| mbed_official | 376:cb4d9db17537 | 373 | * @param DataLength: The length of data to be transferred from source to destination |
| mbed_official | 376:cb4d9db17537 | 374 | * @retval HAL status |
| mbed_official | 376:cb4d9db17537 | 375 | */ |
| mbed_official | 376:cb4d9db17537 | 376 | HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) |
| mbed_official | 376:cb4d9db17537 | 377 | { |
| mbed_official | 376:cb4d9db17537 | 378 | /* Process locked */ |
| mbed_official | 376:cb4d9db17537 | 379 | __HAL_LOCK(hdma); |
| mbed_official | 376:cb4d9db17537 | 380 | |
| mbed_official | 376:cb4d9db17537 | 381 | /* Change DMA peripheral state */ |
| mbed_official | 376:cb4d9db17537 | 382 | hdma->State = HAL_DMA_STATE_BUSY; |
| mbed_official | 376:cb4d9db17537 | 383 | |
| mbed_official | 376:cb4d9db17537 | 384 | /* Check the parameters */ |
| mbed_official | 376:cb4d9db17537 | 385 | assert_param(IS_DMA_BUFFER_SIZE(DataLength)); |
| mbed_official | 376:cb4d9db17537 | 386 | |
| mbed_official | 376:cb4d9db17537 | 387 | /* Disable the peripheral */ |
| mbed_official | 376:cb4d9db17537 | 388 | __HAL_DMA_DISABLE(hdma); |
| mbed_official | 376:cb4d9db17537 | 389 | |
| mbed_official | 376:cb4d9db17537 | 390 | /* Configure the source, destination address and the data length */ |
| mbed_official | 376:cb4d9db17537 | 391 | DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); |
| mbed_official | 376:cb4d9db17537 | 392 | |
| mbed_official | 376:cb4d9db17537 | 393 | /* Enable the Peripheral */ |
| mbed_official | 376:cb4d9db17537 | 394 | __HAL_DMA_ENABLE(hdma); |
| mbed_official | 376:cb4d9db17537 | 395 | |
| mbed_official | 376:cb4d9db17537 | 396 | return HAL_OK; |
| mbed_official | 376:cb4d9db17537 | 397 | } |
| mbed_official | 376:cb4d9db17537 | 398 | |
| mbed_official | 376:cb4d9db17537 | 399 | /** |
| mbed_official | 376:cb4d9db17537 | 400 | * @brief Start the DMA Transfer with interrupt enabled. |
| mbed_official | 376:cb4d9db17537 | 401 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 376:cb4d9db17537 | 402 | * the configuration information for the specified DMA Channel. |
| mbed_official | 376:cb4d9db17537 | 403 | * @param SrcAddress: The source memory Buffer address |
| mbed_official | 376:cb4d9db17537 | 404 | * @param DstAddress: The destination memory Buffer address |
| mbed_official | 376:cb4d9db17537 | 405 | * @param DataLength: The length of data to be transferred from source to destination |
| mbed_official | 376:cb4d9db17537 | 406 | * @retval HAL status |
| mbed_official | 376:cb4d9db17537 | 407 | */ |
| mbed_official | 376:cb4d9db17537 | 408 | HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) |
| mbed_official | 376:cb4d9db17537 | 409 | { |
| mbed_official | 376:cb4d9db17537 | 410 | /* Process locked */ |
| mbed_official | 376:cb4d9db17537 | 411 | __HAL_LOCK(hdma); |
| mbed_official | 376:cb4d9db17537 | 412 | |
| mbed_official | 376:cb4d9db17537 | 413 | /* Change DMA peripheral state */ |
| mbed_official | 376:cb4d9db17537 | 414 | hdma->State = HAL_DMA_STATE_BUSY; |
| mbed_official | 376:cb4d9db17537 | 415 | |
| mbed_official | 376:cb4d9db17537 | 416 | /* Check the parameters */ |
| mbed_official | 376:cb4d9db17537 | 417 | assert_param(IS_DMA_BUFFER_SIZE(DataLength)); |
| mbed_official | 376:cb4d9db17537 | 418 | |
| mbed_official | 376:cb4d9db17537 | 419 | /* Disable the peripheral */ |
| mbed_official | 376:cb4d9db17537 | 420 | __HAL_DMA_DISABLE(hdma); |
| mbed_official | 376:cb4d9db17537 | 421 | |
| mbed_official | 376:cb4d9db17537 | 422 | /* Configure the source, destination address and the data length */ |
| mbed_official | 376:cb4d9db17537 | 423 | DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); |
| mbed_official | 376:cb4d9db17537 | 424 | |
| mbed_official | 376:cb4d9db17537 | 425 | /* Enable the transfer complete interrupt */ |
| mbed_official | 376:cb4d9db17537 | 426 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC); |
| mbed_official | 376:cb4d9db17537 | 427 | |
| mbed_official | 376:cb4d9db17537 | 428 | /* Enable the Half transfer complete interrupt */ |
| mbed_official | 376:cb4d9db17537 | 429 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT); |
| mbed_official | 376:cb4d9db17537 | 430 | |
| mbed_official | 376:cb4d9db17537 | 431 | /* Enable the transfer Error interrupt */ |
| mbed_official | 376:cb4d9db17537 | 432 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE); |
| mbed_official | 376:cb4d9db17537 | 433 | |
| mbed_official | 376:cb4d9db17537 | 434 | /* Enable the Peripheral */ |
| mbed_official | 376:cb4d9db17537 | 435 | __HAL_DMA_ENABLE(hdma); |
| mbed_official | 376:cb4d9db17537 | 436 | |
| mbed_official | 376:cb4d9db17537 | 437 | return HAL_OK; |
| mbed_official | 376:cb4d9db17537 | 438 | } |
| mbed_official | 376:cb4d9db17537 | 439 | |
| mbed_official | 376:cb4d9db17537 | 440 | /** |
| mbed_official | 376:cb4d9db17537 | 441 | * @brief Aborts the DMA Transfer. |
| mbed_official | 376:cb4d9db17537 | 442 | * @param hdma : pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 376:cb4d9db17537 | 443 | * the configuration information for the specified DMA Channel. |
| mbed_official | 376:cb4d9db17537 | 444 | * @param Timeout: Timeout duration |
| mbed_official | 376:cb4d9db17537 | 445 | * @retval HAL status |
| mbed_official | 376:cb4d9db17537 | 446 | */ |
| mbed_official | 376:cb4d9db17537 | 447 | HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) |
| mbed_official | 376:cb4d9db17537 | 448 | { |
| mbed_official | 376:cb4d9db17537 | 449 | uint32_t tickstart = 0; |
| mbed_official | 376:cb4d9db17537 | 450 | |
| mbed_official | 376:cb4d9db17537 | 451 | /* Disable the channel */ |
| mbed_official | 376:cb4d9db17537 | 452 | __HAL_DMA_DISABLE(hdma); |
| mbed_official | 376:cb4d9db17537 | 453 | |
| mbed_official | 376:cb4d9db17537 | 454 | /* Get timeout */ |
| mbed_official | 376:cb4d9db17537 | 455 | tickstart = HAL_GetTick(); |
| mbed_official | 376:cb4d9db17537 | 456 | |
| mbed_official | 376:cb4d9db17537 | 457 | /* Check if the DMA Channel is effectively disabled */ |
| mbed_official | 376:cb4d9db17537 | 458 | while((hdma->Instance->CCR & DMA_CCR_EN) != 0) |
| mbed_official | 376:cb4d9db17537 | 459 | { |
| mbed_official | 376:cb4d9db17537 | 460 | /* Check for the Timeout */ |
| mbed_official | 376:cb4d9db17537 | 461 | if( (HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT) |
| mbed_official | 376:cb4d9db17537 | 462 | { |
| mbed_official | 376:cb4d9db17537 | 463 | /* Update error code */ |
| mbed_official | 376:cb4d9db17537 | 464 | hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT; |
| mbed_official | 376:cb4d9db17537 | 465 | |
| mbed_official | 376:cb4d9db17537 | 466 | /* Process Unlocked */ |
| mbed_official | 376:cb4d9db17537 | 467 | __HAL_UNLOCK(hdma); |
| mbed_official | 376:cb4d9db17537 | 468 | |
| mbed_official | 376:cb4d9db17537 | 469 | /* Change the DMA state */ |
| mbed_official | 376:cb4d9db17537 | 470 | hdma->State = HAL_DMA_STATE_TIMEOUT; |
| mbed_official | 376:cb4d9db17537 | 471 | |
| mbed_official | 376:cb4d9db17537 | 472 | return HAL_TIMEOUT; |
| mbed_official | 376:cb4d9db17537 | 473 | } |
| mbed_official | 376:cb4d9db17537 | 474 | } |
| mbed_official | 376:cb4d9db17537 | 475 | /* Process Unlocked */ |
| mbed_official | 376:cb4d9db17537 | 476 | __HAL_UNLOCK(hdma); |
| mbed_official | 376:cb4d9db17537 | 477 | |
| mbed_official | 376:cb4d9db17537 | 478 | /* Change the DMA state*/ |
| mbed_official | 376:cb4d9db17537 | 479 | hdma->State = HAL_DMA_STATE_READY; |
| mbed_official | 376:cb4d9db17537 | 480 | |
| mbed_official | 376:cb4d9db17537 | 481 | return HAL_OK; |
| mbed_official | 376:cb4d9db17537 | 482 | } |
| mbed_official | 376:cb4d9db17537 | 483 | |
| mbed_official | 376:cb4d9db17537 | 484 | /** |
| mbed_official | 376:cb4d9db17537 | 485 | * @brief Polling for transfer complete. |
| mbed_official | 376:cb4d9db17537 | 486 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 376:cb4d9db17537 | 487 | * the configuration information for the specified DMA Channel. |
| mbed_official | 376:cb4d9db17537 | 488 | * @param CompleteLevel: Specifies the DMA level complete. |
| mbed_official | 376:cb4d9db17537 | 489 | * @param Timeout: Timeout duration. |
| mbed_official | 376:cb4d9db17537 | 490 | * @retval HAL status |
| mbed_official | 376:cb4d9db17537 | 491 | */ |
| mbed_official | 376:cb4d9db17537 | 492 | HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout) |
| mbed_official | 376:cb4d9db17537 | 493 | { |
| mbed_official | 376:cb4d9db17537 | 494 | uint32_t temp; |
| mbed_official | 376:cb4d9db17537 | 495 | uint32_t tickstart = 0; |
| mbed_official | 376:cb4d9db17537 | 496 | |
| mbed_official | 376:cb4d9db17537 | 497 | /* Get the level transfer complete flag */ |
| mbed_official | 376:cb4d9db17537 | 498 | if(CompleteLevel == HAL_DMA_FULL_TRANSFER) |
| mbed_official | 376:cb4d9db17537 | 499 | { |
| mbed_official | 376:cb4d9db17537 | 500 | /* Transfer Complete flag */ |
| mbed_official | 376:cb4d9db17537 | 501 | temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma); |
| mbed_official | 376:cb4d9db17537 | 502 | } |
| mbed_official | 376:cb4d9db17537 | 503 | else |
| mbed_official | 376:cb4d9db17537 | 504 | { |
| mbed_official | 376:cb4d9db17537 | 505 | /* Half Transfer Complete flag */ |
| mbed_official | 376:cb4d9db17537 | 506 | temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma); |
| mbed_official | 376:cb4d9db17537 | 507 | } |
| mbed_official | 376:cb4d9db17537 | 508 | |
| mbed_official | 376:cb4d9db17537 | 509 | /* Get timeout */ |
| mbed_official | 376:cb4d9db17537 | 510 | tickstart = HAL_GetTick(); |
| mbed_official | 376:cb4d9db17537 | 511 | |
| mbed_official | 376:cb4d9db17537 | 512 | while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET) |
| mbed_official | 376:cb4d9db17537 | 513 | { |
| mbed_official | 376:cb4d9db17537 | 514 | if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)) |
| mbed_official | 376:cb4d9db17537 | 515 | { |
| mbed_official | 376:cb4d9db17537 | 516 | /* Clear the transfer error flags */ |
| mbed_official | 376:cb4d9db17537 | 517 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); |
| mbed_official | 376:cb4d9db17537 | 518 | |
| mbed_official | 376:cb4d9db17537 | 519 | /* Update error code */ |
| mbed_official | 376:cb4d9db17537 | 520 | SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TE); |
| mbed_official | 376:cb4d9db17537 | 521 | |
| mbed_official | 376:cb4d9db17537 | 522 | /* Change the DMA state */ |
| mbed_official | 376:cb4d9db17537 | 523 | hdma->State= HAL_DMA_STATE_ERROR; |
| mbed_official | 376:cb4d9db17537 | 524 | |
| mbed_official | 376:cb4d9db17537 | 525 | /* Process Unlocked */ |
| mbed_official | 376:cb4d9db17537 | 526 | __HAL_UNLOCK(hdma); |
| mbed_official | 376:cb4d9db17537 | 527 | |
| mbed_official | 376:cb4d9db17537 | 528 | return HAL_ERROR; |
| mbed_official | 376:cb4d9db17537 | 529 | } |
| mbed_official | 376:cb4d9db17537 | 530 | /* Check for the Timeout */ |
| mbed_official | 376:cb4d9db17537 | 531 | if(Timeout != HAL_MAX_DELAY) |
| mbed_official | 376:cb4d9db17537 | 532 | { |
| mbed_official | 376:cb4d9db17537 | 533 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
| mbed_official | 376:cb4d9db17537 | 534 | { |
| mbed_official | 376:cb4d9db17537 | 535 | /* Update error code */ |
| mbed_official | 376:cb4d9db17537 | 536 | SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TIMEOUT); |
| mbed_official | 376:cb4d9db17537 | 537 | |
| mbed_official | 376:cb4d9db17537 | 538 | /* Change the DMA state */ |
| mbed_official | 376:cb4d9db17537 | 539 | hdma->State= HAL_DMA_STATE_TIMEOUT; |
| mbed_official | 376:cb4d9db17537 | 540 | |
| mbed_official | 376:cb4d9db17537 | 541 | /* Process Unlocked */ |
| mbed_official | 376:cb4d9db17537 | 542 | __HAL_UNLOCK(hdma); |
| mbed_official | 376:cb4d9db17537 | 543 | |
| mbed_official | 376:cb4d9db17537 | 544 | return HAL_TIMEOUT; |
| mbed_official | 376:cb4d9db17537 | 545 | } |
| mbed_official | 376:cb4d9db17537 | 546 | } |
| mbed_official | 376:cb4d9db17537 | 547 | } |
| mbed_official | 376:cb4d9db17537 | 548 | |
| mbed_official | 376:cb4d9db17537 | 549 | if(CompleteLevel == HAL_DMA_FULL_TRANSFER) |
| mbed_official | 376:cb4d9db17537 | 550 | { |
| mbed_official | 376:cb4d9db17537 | 551 | /* Clear the transfer complete flag */ |
| mbed_official | 376:cb4d9db17537 | 552 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); |
| mbed_official | 376:cb4d9db17537 | 553 | |
| mbed_official | 376:cb4d9db17537 | 554 | /* The selected Channelx EN bit is cleared (DMA is disabled and |
| mbed_official | 376:cb4d9db17537 | 555 | all transfers are complete) */ |
| mbed_official | 376:cb4d9db17537 | 556 | hdma->State = HAL_DMA_STATE_READY; |
| mbed_official | 376:cb4d9db17537 | 557 | |
| mbed_official | 376:cb4d9db17537 | 558 | /* Process unlocked */ |
| mbed_official | 376:cb4d9db17537 | 559 | __HAL_UNLOCK(hdma); |
| mbed_official | 376:cb4d9db17537 | 560 | } |
| mbed_official | 376:cb4d9db17537 | 561 | else |
| mbed_official | 376:cb4d9db17537 | 562 | { |
| mbed_official | 376:cb4d9db17537 | 563 | /* Clear the half transfer complete flag */ |
| mbed_official | 376:cb4d9db17537 | 564 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); |
| mbed_official | 376:cb4d9db17537 | 565 | |
| mbed_official | 376:cb4d9db17537 | 566 | /* The selected Channelx EN bit is cleared (DMA is disabled and |
| mbed_official | 376:cb4d9db17537 | 567 | all transfers are complete) */ |
| mbed_official | 376:cb4d9db17537 | 568 | hdma->State = HAL_DMA_STATE_READY_HALF; |
| mbed_official | 376:cb4d9db17537 | 569 | |
| mbed_official | 376:cb4d9db17537 | 570 | /* Process unlocked */ |
| mbed_official | 376:cb4d9db17537 | 571 | __HAL_UNLOCK(hdma); |
| mbed_official | 376:cb4d9db17537 | 572 | } |
| mbed_official | 376:cb4d9db17537 | 573 | |
| mbed_official | 376:cb4d9db17537 | 574 | return HAL_OK; |
| mbed_official | 376:cb4d9db17537 | 575 | } |
| mbed_official | 376:cb4d9db17537 | 576 | /** |
| mbed_official | 376:cb4d9db17537 | 577 | * @brief Handles DMA interrupt request. |
| mbed_official | 376:cb4d9db17537 | 578 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 376:cb4d9db17537 | 579 | * the configuration information for the specified DMA Channel. |
| mbed_official | 376:cb4d9db17537 | 580 | * @retval None |
| mbed_official | 376:cb4d9db17537 | 581 | */ |
| mbed_official | 376:cb4d9db17537 | 582 | void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) |
| mbed_official | 376:cb4d9db17537 | 583 | { |
| mbed_official | 376:cb4d9db17537 | 584 | /* Transfer Error Interrupt management ***************************************/ |
| mbed_official | 376:cb4d9db17537 | 585 | if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET) |
| mbed_official | 376:cb4d9db17537 | 586 | { |
| mbed_official | 376:cb4d9db17537 | 587 | if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET) |
| mbed_official | 376:cb4d9db17537 | 588 | { |
| mbed_official | 376:cb4d9db17537 | 589 | /* Disable the transfer error interrupt */ |
| mbed_official | 376:cb4d9db17537 | 590 | __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE); |
| mbed_official | 376:cb4d9db17537 | 591 | |
| mbed_official | 376:cb4d9db17537 | 592 | /* Clear the transfer error flag */ |
| mbed_official | 376:cb4d9db17537 | 593 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); |
| mbed_official | 376:cb4d9db17537 | 594 | |
| mbed_official | 376:cb4d9db17537 | 595 | /* Update error code */ |
| mbed_official | 376:cb4d9db17537 | 596 | hdma->ErrorCode |= HAL_DMA_ERROR_TE; |
| mbed_official | 376:cb4d9db17537 | 597 | |
| mbed_official | 376:cb4d9db17537 | 598 | /* Change the DMA state */ |
| mbed_official | 376:cb4d9db17537 | 599 | hdma->State = HAL_DMA_STATE_ERROR; |
| mbed_official | 376:cb4d9db17537 | 600 | |
| mbed_official | 376:cb4d9db17537 | 601 | /* Process Unlocked */ |
| mbed_official | 376:cb4d9db17537 | 602 | __HAL_UNLOCK(hdma); |
| mbed_official | 376:cb4d9db17537 | 603 | |
| mbed_official | 489:119543c9f674 | 604 | if (hdma->XferErrorCallback != NULL) |
| mbed_official | 376:cb4d9db17537 | 605 | { |
| mbed_official | 376:cb4d9db17537 | 606 | /* Transfer error callback */ |
| mbed_official | 376:cb4d9db17537 | 607 | hdma->XferErrorCallback(hdma); |
| mbed_official | 376:cb4d9db17537 | 608 | } |
| mbed_official | 376:cb4d9db17537 | 609 | } |
| mbed_official | 376:cb4d9db17537 | 610 | } |
| mbed_official | 376:cb4d9db17537 | 611 | |
| mbed_official | 376:cb4d9db17537 | 612 | /* Half Transfer Complete Interrupt management ******************************/ |
| mbed_official | 376:cb4d9db17537 | 613 | if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET) |
| mbed_official | 376:cb4d9db17537 | 614 | { |
| mbed_official | 376:cb4d9db17537 | 615 | if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET) |
| mbed_official | 376:cb4d9db17537 | 616 | { |
| mbed_official | 376:cb4d9db17537 | 617 | /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ |
| mbed_official | 376:cb4d9db17537 | 618 | if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) |
| mbed_official | 376:cb4d9db17537 | 619 | { |
| mbed_official | 376:cb4d9db17537 | 620 | /* Disable the half transfer interrupt */ |
| mbed_official | 376:cb4d9db17537 | 621 | __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); |
| mbed_official | 376:cb4d9db17537 | 622 | } |
| mbed_official | 376:cb4d9db17537 | 623 | /* Clear the half transfer complete flag */ |
| mbed_official | 376:cb4d9db17537 | 624 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); |
| mbed_official | 376:cb4d9db17537 | 625 | |
| mbed_official | 376:cb4d9db17537 | 626 | /* Change DMA peripheral state */ |
| mbed_official | 376:cb4d9db17537 | 627 | hdma->State = HAL_DMA_STATE_READY_HALF; |
| mbed_official | 376:cb4d9db17537 | 628 | |
| mbed_official | 489:119543c9f674 | 629 | if(hdma->XferHalfCpltCallback != NULL) |
| mbed_official | 376:cb4d9db17537 | 630 | { |
| mbed_official | 376:cb4d9db17537 | 631 | /* Half transfer callback */ |
| mbed_official | 376:cb4d9db17537 | 632 | hdma->XferHalfCpltCallback(hdma); |
| mbed_official | 376:cb4d9db17537 | 633 | } |
| mbed_official | 376:cb4d9db17537 | 634 | } |
| mbed_official | 376:cb4d9db17537 | 635 | } |
| mbed_official | 376:cb4d9db17537 | 636 | |
| mbed_official | 376:cb4d9db17537 | 637 | /* Transfer Complete Interrupt management ***********************************/ |
| mbed_official | 376:cb4d9db17537 | 638 | if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET) |
| mbed_official | 376:cb4d9db17537 | 639 | { |
| mbed_official | 376:cb4d9db17537 | 640 | if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET) |
| mbed_official | 376:cb4d9db17537 | 641 | { |
| mbed_official | 376:cb4d9db17537 | 642 | if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) |
| mbed_official | 376:cb4d9db17537 | 643 | { |
| mbed_official | 376:cb4d9db17537 | 644 | /* Disable the transfer complete interrupt */ |
| mbed_official | 376:cb4d9db17537 | 645 | __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC); |
| mbed_official | 376:cb4d9db17537 | 646 | } |
| mbed_official | 376:cb4d9db17537 | 647 | /* Clear the transfer complete flag */ |
| mbed_official | 376:cb4d9db17537 | 648 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); |
| mbed_official | 376:cb4d9db17537 | 649 | |
| mbed_official | 376:cb4d9db17537 | 650 | /* Update error code */ |
| mbed_official | 376:cb4d9db17537 | 651 | hdma->ErrorCode |= HAL_DMA_ERROR_NONE; |
| mbed_official | 376:cb4d9db17537 | 652 | |
| mbed_official | 376:cb4d9db17537 | 653 | /* Change the DMA state */ |
| mbed_official | 376:cb4d9db17537 | 654 | hdma->State = HAL_DMA_STATE_READY; |
| mbed_official | 376:cb4d9db17537 | 655 | |
| mbed_official | 376:cb4d9db17537 | 656 | /* Process Unlocked */ |
| mbed_official | 376:cb4d9db17537 | 657 | __HAL_UNLOCK(hdma); |
| mbed_official | 376:cb4d9db17537 | 658 | |
| mbed_official | 489:119543c9f674 | 659 | if(hdma->XferCpltCallback != NULL) |
| mbed_official | 376:cb4d9db17537 | 660 | { |
| mbed_official | 376:cb4d9db17537 | 661 | /* Transfer complete callback */ |
| mbed_official | 376:cb4d9db17537 | 662 | hdma->XferCpltCallback(hdma); |
| mbed_official | 376:cb4d9db17537 | 663 | } |
| mbed_official | 376:cb4d9db17537 | 664 | } |
| mbed_official | 376:cb4d9db17537 | 665 | } |
| mbed_official | 376:cb4d9db17537 | 666 | } |
| mbed_official | 376:cb4d9db17537 | 667 | |
| mbed_official | 376:cb4d9db17537 | 668 | /** |
| mbed_official | 376:cb4d9db17537 | 669 | * @} |
| mbed_official | 376:cb4d9db17537 | 670 | */ |
| mbed_official | 376:cb4d9db17537 | 671 | |
| mbed_official | 489:119543c9f674 | 672 | /** @addtogroup DMA_Exported_Functions_Group3 |
| mbed_official | 376:cb4d9db17537 | 673 | * @brief Peripheral State functions |
| mbed_official | 376:cb4d9db17537 | 674 | * |
| mbed_official | 376:cb4d9db17537 | 675 | @verbatim |
| mbed_official | 376:cb4d9db17537 | 676 | =============================================================================== |
| mbed_official | 376:cb4d9db17537 | 677 | ##### Peripheral State functions ##### |
| mbed_official | 376:cb4d9db17537 | 678 | =============================================================================== |
| mbed_official | 376:cb4d9db17537 | 679 | [..] |
| mbed_official | 376:cb4d9db17537 | 680 | This subsection provides functions allowing to |
| mbed_official | 376:cb4d9db17537 | 681 | (+) Check the DMA state |
| mbed_official | 376:cb4d9db17537 | 682 | (+) Get error code |
| mbed_official | 376:cb4d9db17537 | 683 | |
| mbed_official | 376:cb4d9db17537 | 684 | @endverbatim |
| mbed_official | 376:cb4d9db17537 | 685 | * @{ |
| mbed_official | 376:cb4d9db17537 | 686 | */ |
| mbed_official | 376:cb4d9db17537 | 687 | |
| mbed_official | 376:cb4d9db17537 | 688 | /** |
| mbed_official | 376:cb4d9db17537 | 689 | * @brief Returns the DMA state. |
| mbed_official | 376:cb4d9db17537 | 690 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 376:cb4d9db17537 | 691 | * the configuration information for the specified DMA Channel. |
| mbed_official | 376:cb4d9db17537 | 692 | * @retval HAL state |
| mbed_official | 376:cb4d9db17537 | 693 | */ |
| mbed_official | 376:cb4d9db17537 | 694 | HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) |
| mbed_official | 376:cb4d9db17537 | 695 | { |
| mbed_official | 376:cb4d9db17537 | 696 | return hdma->State; |
| mbed_official | 376:cb4d9db17537 | 697 | } |
| mbed_official | 376:cb4d9db17537 | 698 | |
| mbed_official | 376:cb4d9db17537 | 699 | /** |
| mbed_official | 376:cb4d9db17537 | 700 | * @brief Return the DMA error code |
| mbed_official | 376:cb4d9db17537 | 701 | * @param hdma : pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 376:cb4d9db17537 | 702 | * the configuration information for the specified DMA Channel. |
| mbed_official | 376:cb4d9db17537 | 703 | * @retval DMA Error Code |
| mbed_official | 376:cb4d9db17537 | 704 | */ |
| mbed_official | 376:cb4d9db17537 | 705 | uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) |
| mbed_official | 376:cb4d9db17537 | 706 | { |
| mbed_official | 376:cb4d9db17537 | 707 | return hdma->ErrorCode; |
| mbed_official | 376:cb4d9db17537 | 708 | } |
| mbed_official | 376:cb4d9db17537 | 709 | |
| mbed_official | 376:cb4d9db17537 | 710 | /** |
| mbed_official | 376:cb4d9db17537 | 711 | * @} |
| mbed_official | 376:cb4d9db17537 | 712 | */ |
| mbed_official | 376:cb4d9db17537 | 713 | |
| mbed_official | 376:cb4d9db17537 | 714 | /** |
| mbed_official | 489:119543c9f674 | 715 | * @} |
| mbed_official | 489:119543c9f674 | 716 | */ |
| mbed_official | 489:119543c9f674 | 717 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 718 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 719 | |
| mbed_official | 489:119543c9f674 | 720 | |
| mbed_official | 489:119543c9f674 | 721 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 722 | /** @addtogroup DMA_Private_Functions DMA Private Functions |
| mbed_official | 489:119543c9f674 | 723 | * @{ |
| mbed_official | 489:119543c9f674 | 724 | */ |
| mbed_official | 489:119543c9f674 | 725 | |
| mbed_official | 489:119543c9f674 | 726 | /* |
| mbed_official | 376:cb4d9db17537 | 727 | * @brief Sets the DMA Transfer parameter. |
| mbed_official | 376:cb4d9db17537 | 728 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 376:cb4d9db17537 | 729 | * the configuration information for the specified DMA Channel. |
| mbed_official | 376:cb4d9db17537 | 730 | * @param SrcAddress: The source memory Buffer address |
| mbed_official | 376:cb4d9db17537 | 731 | * @param DstAddress: The destination memory Buffer address |
| mbed_official | 376:cb4d9db17537 | 732 | * @param DataLength: The length of data to be transferred from source to destination |
| mbed_official | 376:cb4d9db17537 | 733 | * @retval HAL status |
| mbed_official | 376:cb4d9db17537 | 734 | */ |
| mbed_official | 376:cb4d9db17537 | 735 | static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) |
| mbed_official | 376:cb4d9db17537 | 736 | { |
| mbed_official | 376:cb4d9db17537 | 737 | /* Configure DMA Channel data length */ |
| mbed_official | 376:cb4d9db17537 | 738 | hdma->Instance->CNDTR = DataLength; |
| mbed_official | 376:cb4d9db17537 | 739 | |
| mbed_official | 376:cb4d9db17537 | 740 | /* Peripheral to Memory */ |
| mbed_official | 376:cb4d9db17537 | 741 | if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) |
| mbed_official | 376:cb4d9db17537 | 742 | { |
| mbed_official | 376:cb4d9db17537 | 743 | /* Configure DMA Channel destination address */ |
| mbed_official | 376:cb4d9db17537 | 744 | hdma->Instance->CPAR = DstAddress; |
| mbed_official | 376:cb4d9db17537 | 745 | |
| mbed_official | 376:cb4d9db17537 | 746 | /* Configure DMA Channel source address */ |
| mbed_official | 376:cb4d9db17537 | 747 | hdma->Instance->CMAR = SrcAddress; |
| mbed_official | 376:cb4d9db17537 | 748 | } |
| mbed_official | 376:cb4d9db17537 | 749 | /* Memory to Peripheral */ |
| mbed_official | 376:cb4d9db17537 | 750 | else |
| mbed_official | 376:cb4d9db17537 | 751 | { |
| mbed_official | 376:cb4d9db17537 | 752 | /* Configure DMA Channel source address */ |
| mbed_official | 376:cb4d9db17537 | 753 | hdma->Instance->CPAR = SrcAddress; |
| mbed_official | 376:cb4d9db17537 | 754 | |
| mbed_official | 376:cb4d9db17537 | 755 | /* Configure DMA Channel destination address */ |
| mbed_official | 376:cb4d9db17537 | 756 | hdma->Instance->CMAR = DstAddress; |
| mbed_official | 376:cb4d9db17537 | 757 | } |
| mbed_official | 376:cb4d9db17537 | 758 | } |
| mbed_official | 376:cb4d9db17537 | 759 | /** |
| mbed_official | 376:cb4d9db17537 | 760 | * @} |
| mbed_official | 376:cb4d9db17537 | 761 | */ |
| mbed_official | 376:cb4d9db17537 | 762 | |
| mbed_official | 376:cb4d9db17537 | 763 | #endif /* HAL_DMA_MODULE_ENABLED */ |
| mbed_official | 376:cb4d9db17537 | 764 | /** |
| mbed_official | 376:cb4d9db17537 | 765 | * @} |
| mbed_official | 376:cb4d9db17537 | 766 | */ |
| mbed_official | 376:cb4d9db17537 | 767 | |
| mbed_official | 376:cb4d9db17537 | 768 | /** |
| mbed_official | 376:cb4d9db17537 | 769 | * @} |
| mbed_official | 376:cb4d9db17537 | 770 | */ |
| mbed_official | 376:cb4d9db17537 | 771 | |
| mbed_official | 376:cb4d9db17537 | 772 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| mbed_official | 489:119543c9f674 | 773 |