AnalogIn_Diff.cpp

00001 /* mbed Microcontroller Library
00002  * Copyright (c) 2006-2013 ARM Limited
00003  *
00004  * Licensed under the Apache License, Version 2.0 (the "License");
00005  * you may not use this file except in compliance with the License.
00006  * You may obtain a copy of the License at
00007  *
00008  *     http://www.apache.org/licenses/LICENSE-2.0
00009  *
00010  * Unless required by applicable law or agreed to in writing, software
00011  * distributed under the License is distributed on an "AS IS" BASIS,
00012  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00013  * See the License for the specific language governing permissions and
00014  * limitations under the License.
00015  */
00016 
00017 #include "AnalogIn_Diff.h"
00018 
00019 #if FSL_FEATURE_ADC_HAS_DIFF_MODE
00020 
00021 
00022 
00023 AnalogIn_Diff::AnalogIn_Diff(int adc_ch)
00024 {
00025     
00026     const uint32_t temp[] = ADC_BASE_ADDRS;
00027     for (int i = 0; i < sizeof(temp) / sizeof(temp[0]); i++)
00028         adc_addrs[i] = temp[i];
00029 
00030     
00031     instance=(adc_ch>>1)&1;
00032     chnNum=(adc_ch>>0)&1;
00033           
00034     
00035     CLOCK_SYS_EnableAdcClock(instance);
00036 
00037     uint32_t bus_clock;
00038     CLOCK_SYS_GetFreq(kBusClock, &bus_clock);
00039     uint32_t clkdiv;
00040     for (clkdiv = 0; clkdiv < 4; clkdiv++) {
00041         if ((bus_clock >> clkdiv) <= MAX_FADC)
00042             break;
00043     }
00044     if (clkdiv == 4) {
00045         clkdiv = 0x3; //Set max div
00046     }
00047 
00048     /* adc is enabled/triggered when reading. */
00049 
00050     ADC_HAL_Init(adc_addrs[instance]);
00051     ADC_HAL_SetClkSrcMode(adc_addrs[instance], kAdcClkSrcOfBusClk);
00052     ADC_HAL_SetClkDividerMode(adc_addrs[instance], (adc_clk_divider_mode_t)(clkdiv & 0x3));
00053     ADC_HAL_SetRefVoltSrcMode(adc_addrs[instance], kAdcRefVoltSrcOfVref);
00054     ADC_HAL_SetResolutionMode(adc_addrs[instance], kAdcResolutionBitOfDiffModeAs16);
00055     ADC_HAL_SetContinuousConvCmd(adc_addrs[instance], false);//false
00056     ADC_HAL_SetHwTriggerCmd(adc_addrs[instance], false); /* sw trigger */
00057     ADC_HAL_SetHwAverageCmd(adc_addrs[instance], false); /*Average*/
00058     //ADC_HAL_SetHwAverageCmd(adc_addrs[instance], true);
00059     //ADC_HAL_SetHwAverageMode(adc_addrs[instance], kAdcHwAverageCountOf32);
00060     ADC_HAL_SetChnMuxMode(adc_addrs[instance], kAdcChnMuxOfB); /* only B channels are avail */
00061     
00062 
00063 
00064 }
00065 
00066 AnalogIn_Diff::~AnalogIn_Diff() { }
00067 
00068 
00069 
00070 
00071 int16_t AnalogIn_Diff::read_raws16()    // Returns a 16bit signed integer
00072 {
00073     /* sw trigger (SC1A) */
00074     ADC_HAL_ConfigChn(adc_addrs[instance], 0, false, true, chnNum); //baseAddr, chnGroup,  intEnable, diffEnable,  chnNum
00075     while (!ADC_HAL_GetChnConvCompletedCmd(adc_addrs[instance], 0));
00076    return ADC_HAL_GetChnConvValueRAW(adc_addrs[instance], 0);
00077 
00078 }
00079 
00080 
00081 float AnalogIn_Diff::read()
00082 {
00083     int16_t value = read_raws16();
00084     return (float)value * (1.0f / (float)0xFFFF);
00085 }
00086 
00087 #endif // FSL_FEATURE_ADC_HAS_DIFF_MODE