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scmRTOS/scmRTOS_TARGET_CFG.h@0:96cf274f19bc, 2011-05-23 (annotated)
- Committer:
- etudiant12
- Date:
- Mon May 23 05:40:11 2011 +0000
- Revision:
- 0:96cf274f19bc
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
etudiant12 | 0:96cf274f19bc | 1 | //****************************************************************************** |
etudiant12 | 0:96cf274f19bc | 2 | //* |
etudiant12 | 0:96cf274f19bc | 3 | //* FULLNAME: Single-Chip Microcontroller Real-Time Operating System |
etudiant12 | 0:96cf274f19bc | 4 | //* |
etudiant12 | 0:96cf274f19bc | 5 | //* NICKNAME: scmRTOS |
etudiant12 | 0:96cf274f19bc | 6 | //* |
etudiant12 | 0:96cf274f19bc | 7 | //* PROCESSOR: ARM Cortex-M3 |
etudiant12 | 0:96cf274f19bc | 8 | //* |
etudiant12 | 0:96cf274f19bc | 9 | //* TOOLKIT: EWARM (IAR Systems) |
etudiant12 | 0:96cf274f19bc | 10 | //* |
etudiant12 | 0:96cf274f19bc | 11 | //* PURPOSE: Project Level Target Extensions Config |
etudiant12 | 0:96cf274f19bc | 12 | //* |
etudiant12 | 0:96cf274f19bc | 13 | //* Version: 3.10 |
etudiant12 | 0:96cf274f19bc | 14 | //* |
etudiant12 | 0:96cf274f19bc | 15 | //* $Revision: 196 $ |
etudiant12 | 0:96cf274f19bc | 16 | //* $Date:: 2008-06-19 #$ |
etudiant12 | 0:96cf274f19bc | 17 | //* |
etudiant12 | 0:96cf274f19bc | 18 | //* Copyright (c) 2003-2010, Harry E. Zhurov |
etudiant12 | 0:96cf274f19bc | 19 | //* |
etudiant12 | 0:96cf274f19bc | 20 | //* Permission is hereby granted, free of charge, to any person |
etudiant12 | 0:96cf274f19bc | 21 | //* obtaining a copy of this software and associated documentation |
etudiant12 | 0:96cf274f19bc | 22 | //* files (the "Software"), to deal in the Software without restriction, |
etudiant12 | 0:96cf274f19bc | 23 | //* including without limitation the rights to use, copy, modify, merge, |
etudiant12 | 0:96cf274f19bc | 24 | //* publish, distribute, sublicense, and/or sell copies of the Software, |
etudiant12 | 0:96cf274f19bc | 25 | //* and to permit persons to whom the Software is furnished to do so, |
etudiant12 | 0:96cf274f19bc | 26 | //* subject to the following conditions: |
etudiant12 | 0:96cf274f19bc | 27 | //* |
etudiant12 | 0:96cf274f19bc | 28 | //* The above copyright notice and this permission notice shall be included |
etudiant12 | 0:96cf274f19bc | 29 | //* in all copies or substantial portions of the Software. |
etudiant12 | 0:96cf274f19bc | 30 | //* |
etudiant12 | 0:96cf274f19bc | 31 | //* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
etudiant12 | 0:96cf274f19bc | 32 | //* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
etudiant12 | 0:96cf274f19bc | 33 | //* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
etudiant12 | 0:96cf274f19bc | 34 | //* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY |
etudiant12 | 0:96cf274f19bc | 35 | //* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
etudiant12 | 0:96cf274f19bc | 36 | //* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH |
etudiant12 | 0:96cf274f19bc | 37 | //* THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
etudiant12 | 0:96cf274f19bc | 38 | //* |
etudiant12 | 0:96cf274f19bc | 39 | //* ================================================================= |
etudiant12 | 0:96cf274f19bc | 40 | //* See http://scmrtos.sourceforge.net for documentation, latest |
etudiant12 | 0:96cf274f19bc | 41 | //* information, license and contact details. |
etudiant12 | 0:96cf274f19bc | 42 | //* ================================================================= |
etudiant12 | 0:96cf274f19bc | 43 | //* |
etudiant12 | 0:96cf274f19bc | 44 | //****************************************************************************** |
etudiant12 | 0:96cf274f19bc | 45 | //* mbed port by Igor Skochinsky |
etudiant12 | 0:96cf274f19bc | 46 | |
etudiant12 | 0:96cf274f19bc | 47 | #ifndef scmRTOS_TARGET_CFG_H |
etudiant12 | 0:96cf274f19bc | 48 | #define scmRTOS_TARGET_CFG_H |
etudiant12 | 0:96cf274f19bc | 49 | |
etudiant12 | 0:96cf274f19bc | 50 | #include "device.h" |
etudiant12 | 0:96cf274f19bc | 51 | |
etudiant12 | 0:96cf274f19bc | 52 | // Define SysTick clock frequency and its interrupt rate in Hz. |
etudiant12 | 0:96cf274f19bc | 53 | #define SYSTICKFREQ 100000000 |
etudiant12 | 0:96cf274f19bc | 54 | #define SYSTICKINTRATE 1000 |
etudiant12 | 0:96cf274f19bc | 55 | |
etudiant12 | 0:96cf274f19bc | 56 | //------------------------------------------------------------------------------ |
etudiant12 | 0:96cf274f19bc | 57 | // |
etudiant12 | 0:96cf274f19bc | 58 | // System Timer stuff |
etudiant12 | 0:96cf274f19bc | 59 | // |
etudiant12 | 0:96cf274f19bc | 60 | // |
etudiant12 | 0:96cf274f19bc | 61 | namespace OS |
etudiant12 | 0:96cf274f19bc | 62 | { |
etudiant12 | 0:96cf274f19bc | 63 | extern "C" void SysTick_Handler(); |
etudiant12 | 0:96cf274f19bc | 64 | } |
etudiant12 | 0:96cf274f19bc | 65 | |
etudiant12 | 0:96cf274f19bc | 66 | #define LOCK_SYSTEM_TIMER() ( *CPU_SYSTICKCSR &= ~CPU_SYSTICKCSR_EINT ) |
etudiant12 | 0:96cf274f19bc | 67 | #define UNLOCK_SYSTEM_TIMER() ( *CPU_SYSTICKCSR |= CPU_SYSTICKCSR_EINT ) |
etudiant12 | 0:96cf274f19bc | 68 | |
etudiant12 | 0:96cf274f19bc | 69 | //------------------------------------------------------------------------------ |
etudiant12 | 0:96cf274f19bc | 70 | // |
etudiant12 | 0:96cf274f19bc | 71 | // Context Switch ISR stuff |
etudiant12 | 0:96cf274f19bc | 72 | // |
etudiant12 | 0:96cf274f19bc | 73 | // |
etudiant12 | 0:96cf274f19bc | 74 | namespace OS |
etudiant12 | 0:96cf274f19bc | 75 | { |
etudiant12 | 0:96cf274f19bc | 76 | #if scmRTOS_IDLE_HOOK_ENABLE == 1 |
etudiant12 | 0:96cf274f19bc | 77 | void IdleProcessUserHook(); |
etudiant12 | 0:96cf274f19bc | 78 | #endif |
etudiant12 | 0:96cf274f19bc | 79 | |
etudiant12 | 0:96cf274f19bc | 80 | #if scmRTOS_CONTEXT_SWITCH_SCHEME == 1 |
etudiant12 | 0:96cf274f19bc | 81 | |
etudiant12 | 0:96cf274f19bc | 82 | INLINE inline void RaiseContextSwitch() { *CPU_ICSR |= 0x10000000; } |
etudiant12 | 0:96cf274f19bc | 83 | |
etudiant12 | 0:96cf274f19bc | 84 | #define ENABLE_NESTED_INTERRUPTS() |
etudiant12 | 0:96cf274f19bc | 85 | |
etudiant12 | 0:96cf274f19bc | 86 | #if scmRTOS_SYSTIMER_NEST_INTS_ENABLE == 0 |
etudiant12 | 0:96cf274f19bc | 87 | #define DISABLE_NESTED_INTERRUPTS() TCritSect cs |
etudiant12 | 0:96cf274f19bc | 88 | #else |
etudiant12 | 0:96cf274f19bc | 89 | #define DISABLE_NESTED_INTERRUPTS() |
etudiant12 | 0:96cf274f19bc | 90 | #endif |
etudiant12 | 0:96cf274f19bc | 91 | |
etudiant12 | 0:96cf274f19bc | 92 | #else |
etudiant12 | 0:96cf274f19bc | 93 | #error "Cortex-M3 port supports software interrupt switch method only!" |
etudiant12 | 0:96cf274f19bc | 94 | |
etudiant12 | 0:96cf274f19bc | 95 | #endif // scmRTOS_CONTEXT_SWITCH_SCHEME |
etudiant12 | 0:96cf274f19bc | 96 | |
etudiant12 | 0:96cf274f19bc | 97 | } |
etudiant12 | 0:96cf274f19bc | 98 | //----------------------------------------------------------------------------- |
etudiant12 | 0:96cf274f19bc | 99 | |
etudiant12 | 0:96cf274f19bc | 100 | #endif // scmRTOS_TARGET_CFG_H |
etudiant12 | 0:96cf274f19bc | 101 | //----------------------------------------------------------------------------- |
etudiant12 | 0:96cf274f19bc | 102 |