Thomas Byrne
/
mbed-src-stm32f030k6
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mbed official
targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_gpio.c@489:119543c9f674, 2015-03-12 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Mar 12 14:30:49 2015 +0000
- Revision:
- 489:119543c9f674
Synchronized with git revision 051854181516992fb498d51f9ee6e70cbad9e083
Full URL: https://github.com/mbedmicro/mbed/commit/051854181516992fb498d51f9ee6e70cbad9e083/
Fix ksdk mcu HAL - stopbit
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 489:119543c9f674 | 1 | /** |
| mbed_official | 489:119543c9f674 | 2 | ****************************************************************************** |
| mbed_official | 489:119543c9f674 | 3 | * @file stm32f1xx_hal_gpio.c |
| mbed_official | 489:119543c9f674 | 4 | * @author MCD Application Team |
| mbed_official | 489:119543c9f674 | 5 | * @version V1.0.0 |
| mbed_official | 489:119543c9f674 | 6 | * @date 15-December-2014 |
| mbed_official | 489:119543c9f674 | 7 | * @brief GPIO HAL module driver. |
| mbed_official | 489:119543c9f674 | 8 | * This file provides firmware functions to manage the following |
| mbed_official | 489:119543c9f674 | 9 | * functionalities of the General Purpose Input/Output (GPIO) peripheral: |
| mbed_official | 489:119543c9f674 | 10 | * + Initialization and de-initialization functions |
| mbed_official | 489:119543c9f674 | 11 | * + IO operation functions |
| mbed_official | 489:119543c9f674 | 12 | * |
| mbed_official | 489:119543c9f674 | 13 | @verbatim |
| mbed_official | 489:119543c9f674 | 14 | ============================================================================== |
| mbed_official | 489:119543c9f674 | 15 | ##### GPIO Peripheral features ##### |
| mbed_official | 489:119543c9f674 | 16 | ============================================================================== |
| mbed_official | 489:119543c9f674 | 17 | [..] |
| mbed_official | 489:119543c9f674 | 18 | Subject to the specific hardware characteristics of each I/O port listed in the datasheet, each |
| mbed_official | 489:119543c9f674 | 19 | port bit of the General Purpose IO (GPIO) Ports, can be individually configured by software |
| mbed_official | 489:119543c9f674 | 20 | in several modes: |
| mbed_official | 489:119543c9f674 | 21 | (+) Input mode |
| mbed_official | 489:119543c9f674 | 22 | (+) Analog mode |
| mbed_official | 489:119543c9f674 | 23 | (+) Output mode |
| mbed_official | 489:119543c9f674 | 24 | (+) Alternate function mode |
| mbed_official | 489:119543c9f674 | 25 | (+) External interrupt/event lines |
| mbed_official | 489:119543c9f674 | 26 | |
| mbed_official | 489:119543c9f674 | 27 | [..] |
| mbed_official | 489:119543c9f674 | 28 | During and just after reset, the alternate functions and external interrupt |
| mbed_official | 489:119543c9f674 | 29 | lines are not active and the I/O ports are configured in input floating mode. |
| mbed_official | 489:119543c9f674 | 30 | |
| mbed_official | 489:119543c9f674 | 31 | [..] |
| mbed_official | 489:119543c9f674 | 32 | All GPIO pins have weak internal pull-up and pull-down resistors, which can be |
| mbed_official | 489:119543c9f674 | 33 | activated or not. |
| mbed_official | 489:119543c9f674 | 34 | |
| mbed_official | 489:119543c9f674 | 35 | [..] |
| mbed_official | 489:119543c9f674 | 36 | In Output or Alternate mode, each IO can be configured on open-drain or push-pull |
| mbed_official | 489:119543c9f674 | 37 | type and the IO speed can be selected depending on the VDD value. |
| mbed_official | 489:119543c9f674 | 38 | |
| mbed_official | 489:119543c9f674 | 39 | [..] |
| mbed_official | 489:119543c9f674 | 40 | All ports have external interrupt/event capability. To use external interrupt |
| mbed_official | 489:119543c9f674 | 41 | lines, the port must be configured in input mode. All available GPIO pins are |
| mbed_official | 489:119543c9f674 | 42 | connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. |
| mbed_official | 489:119543c9f674 | 43 | |
| mbed_official | 489:119543c9f674 | 44 | [..] |
| mbed_official | 489:119543c9f674 | 45 | The external interrupt/event controller consists of up to 20 edge detectors in connectivity |
| mbed_official | 489:119543c9f674 | 46 | line devices, or 19 edge detectors in other devices for generating event/interrupt requests. |
| mbed_official | 489:119543c9f674 | 47 | Each input line can be independently configured to select the type (event or interrupt) and |
| mbed_official | 489:119543c9f674 | 48 | the corresponding trigger event (rising or falling or both). Each line can also masked |
| mbed_official | 489:119543c9f674 | 49 | independently. A pending register maintains the status line of the interrupt requests |
| mbed_official | 489:119543c9f674 | 50 | |
| mbed_official | 489:119543c9f674 | 51 | ##### How to use this driver ##### |
| mbed_official | 489:119543c9f674 | 52 | ============================================================================== |
| mbed_official | 489:119543c9f674 | 53 | [..] |
| mbed_official | 489:119543c9f674 | 54 | (#) Enable the GPIO APB2 clock using the following function : __HAL_GPIOx_CLK_ENABLE(). |
| mbed_official | 489:119543c9f674 | 55 | |
| mbed_official | 489:119543c9f674 | 56 | (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). |
| mbed_official | 489:119543c9f674 | 57 | (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure |
| mbed_official | 489:119543c9f674 | 58 | (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef |
| mbed_official | 489:119543c9f674 | 59 | structure. |
| mbed_official | 489:119543c9f674 | 60 | (++) In case of Output or alternate function mode selection: the speed is |
| mbed_official | 489:119543c9f674 | 61 | configured through "Speed" member from GPIO_InitTypeDef structure |
| mbed_official | 489:119543c9f674 | 62 | (++) Analog mode is required when a pin is to be used as ADC channel |
| mbed_official | 489:119543c9f674 | 63 | or DAC output. |
| mbed_official | 489:119543c9f674 | 64 | (++) In case of external interrupt/event selection the "Mode" member from |
| mbed_official | 489:119543c9f674 | 65 | GPIO_InitTypeDef structure select the type (interrupt or event) and |
| mbed_official | 489:119543c9f674 | 66 | the corresponding trigger event (rising or falling or both). |
| mbed_official | 489:119543c9f674 | 67 | |
| mbed_official | 489:119543c9f674 | 68 | (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority |
| mbed_official | 489:119543c9f674 | 69 | mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using |
| mbed_official | 489:119543c9f674 | 70 | HAL_NVIC_EnableIRQ(). |
| mbed_official | 489:119543c9f674 | 71 | |
| mbed_official | 489:119543c9f674 | 72 | (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). |
| mbed_official | 489:119543c9f674 | 73 | |
| mbed_official | 489:119543c9f674 | 74 | (#) To set/reset the level of a pin configured in output mode use |
| mbed_official | 489:119543c9f674 | 75 | HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). |
| mbed_official | 489:119543c9f674 | 76 | |
| mbed_official | 489:119543c9f674 | 77 | (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). |
| mbed_official | 489:119543c9f674 | 78 | |
| mbed_official | 489:119543c9f674 | 79 | (#) During and just after reset, the alternate functions are not |
| mbed_official | 489:119543c9f674 | 80 | active and the GPIO pins are configured in input floating mode (except JTAG |
| mbed_official | 489:119543c9f674 | 81 | pins). |
| mbed_official | 489:119543c9f674 | 82 | |
| mbed_official | 489:119543c9f674 | 83 | (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose |
| mbed_official | 489:119543c9f674 | 84 | (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has |
| mbed_official | 489:119543c9f674 | 85 | priority over the GPIO function. |
| mbed_official | 489:119543c9f674 | 86 | |
| mbed_official | 489:119543c9f674 | 87 | (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as |
| mbed_official | 489:119543c9f674 | 88 | general purpose PD0 and PD1, respectively, when the HSE oscillator is off. |
| mbed_official | 489:119543c9f674 | 89 | The HSE has priority over the GPIO function. |
| mbed_official | 489:119543c9f674 | 90 | |
| mbed_official | 489:119543c9f674 | 91 | @endverbatim |
| mbed_official | 489:119543c9f674 | 92 | ****************************************************************************** |
| mbed_official | 489:119543c9f674 | 93 | * @attention |
| mbed_official | 489:119543c9f674 | 94 | * |
| mbed_official | 489:119543c9f674 | 95 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 489:119543c9f674 | 96 | * |
| mbed_official | 489:119543c9f674 | 97 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 489:119543c9f674 | 98 | * are permitted provided that the following conditions are met: |
| mbed_official | 489:119543c9f674 | 99 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 489:119543c9f674 | 100 | * this list of conditions and the following disclaimer. |
| mbed_official | 489:119543c9f674 | 101 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 489:119543c9f674 | 102 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 489:119543c9f674 | 103 | * and/or other materials provided with the distribution. |
| mbed_official | 489:119543c9f674 | 104 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 489:119543c9f674 | 105 | * may be used to endorse or promote products derived from this software |
| mbed_official | 489:119543c9f674 | 106 | * without specific prior written permission. |
| mbed_official | 489:119543c9f674 | 107 | * |
| mbed_official | 489:119543c9f674 | 108 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 489:119543c9f674 | 109 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 489:119543c9f674 | 110 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 489:119543c9f674 | 111 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 489:119543c9f674 | 112 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 489:119543c9f674 | 113 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 489:119543c9f674 | 114 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 489:119543c9f674 | 115 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 489:119543c9f674 | 116 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 489:119543c9f674 | 117 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 489:119543c9f674 | 118 | * |
| mbed_official | 489:119543c9f674 | 119 | ****************************************************************************** |
| mbed_official | 489:119543c9f674 | 120 | */ |
| mbed_official | 489:119543c9f674 | 121 | |
| mbed_official | 489:119543c9f674 | 122 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 123 | #include "stm32f1xx_hal.h" |
| mbed_official | 489:119543c9f674 | 124 | |
| mbed_official | 489:119543c9f674 | 125 | /** @addtogroup STM32F1xx_HAL_Driver |
| mbed_official | 489:119543c9f674 | 126 | * @{ |
| mbed_official | 489:119543c9f674 | 127 | */ |
| mbed_official | 489:119543c9f674 | 128 | |
| mbed_official | 489:119543c9f674 | 129 | /** @defgroup GPIO GPIO |
| mbed_official | 489:119543c9f674 | 130 | * @brief GPIO HAL module driver |
| mbed_official | 489:119543c9f674 | 131 | * @{ |
| mbed_official | 489:119543c9f674 | 132 | */ |
| mbed_official | 489:119543c9f674 | 133 | |
| mbed_official | 489:119543c9f674 | 134 | #ifdef HAL_GPIO_MODULE_ENABLED |
| mbed_official | 489:119543c9f674 | 135 | |
| mbed_official | 489:119543c9f674 | 136 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 137 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 138 | /** @defgroup GPIO_Private_Constants GPIO Private Constants |
| mbed_official | 489:119543c9f674 | 139 | * @{ |
| mbed_official | 489:119543c9f674 | 140 | */ |
| mbed_official | 489:119543c9f674 | 141 | |
| mbed_official | 489:119543c9f674 | 142 | #define GPIO_MODE ((uint32_t)0x00000003) |
| mbed_official | 489:119543c9f674 | 143 | #define EXTI_MODE ((uint32_t)0x10000000) |
| mbed_official | 489:119543c9f674 | 144 | #define GPIO_MODE_IT ((uint32_t)0x00010000) |
| mbed_official | 489:119543c9f674 | 145 | #define GPIO_MODE_EVT ((uint32_t)0x00020000) |
| mbed_official | 489:119543c9f674 | 146 | #define RISING_EDGE ((uint32_t)0x00100000) |
| mbed_official | 489:119543c9f674 | 147 | #define FALLING_EDGE ((uint32_t)0x00200000) |
| mbed_official | 489:119543c9f674 | 148 | #define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010) |
| mbed_official | 489:119543c9f674 | 149 | #define GPIO_NUMBER ((uint32_t)16) |
| mbed_official | 489:119543c9f674 | 150 | |
| mbed_official | 489:119543c9f674 | 151 | /* Definitions for bit manipulation of CRL and CRH register */ |
| mbed_official | 489:119543c9f674 | 152 | #define GPIO_CR_MODE_INPUT ((uint32_t)0x00000000) /*!< 00: Input mode (reset state) */ |
| mbed_official | 489:119543c9f674 | 153 | #define GPIO_CR_CNF_ANALOG ((uint32_t)0x00000000) /*!< 00: Analog mode */ |
| mbed_official | 489:119543c9f674 | 154 | #define GPIO_CR_CNF_INPUT_FLOATING ((uint32_t)0x00000004) /*!< 01: Floating input (reset state) */ |
| mbed_official | 489:119543c9f674 | 155 | #define GPIO_CR_CNF_INPUT_PU_PD ((uint32_t)0x00000008) /*!< 10: Input with pull-up / pull-down */ |
| mbed_official | 489:119543c9f674 | 156 | #define GPIO_CR_CNF_GP_OUTPUT_PP ((uint32_t)0x00000000) /*!< 00: General purpose output push-pull */ |
| mbed_official | 489:119543c9f674 | 157 | #define GPIO_CR_CNF_GP_OUTPUT_OD ((uint32_t)0x00000004) /*!< 01: General purpose output Open-drain */ |
| mbed_official | 489:119543c9f674 | 158 | #define GPIO_CR_CNF_AF_OUTPUT_PP ((uint32_t)0x00000008) /*!< 10: Alternate function output Push-pull */ |
| mbed_official | 489:119543c9f674 | 159 | #define GPIO_CR_CNF_AF_OUTPUT_OD ((uint32_t)0x0000000C) /*!< 11: Alternate function output Open-drain */ |
| mbed_official | 489:119543c9f674 | 160 | |
| mbed_official | 489:119543c9f674 | 161 | /** |
| mbed_official | 489:119543c9f674 | 162 | * @} |
| mbed_official | 489:119543c9f674 | 163 | */ |
| mbed_official | 489:119543c9f674 | 164 | |
| mbed_official | 489:119543c9f674 | 165 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 166 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 167 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 168 | /* Private functions ---------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 169 | |
| mbed_official | 489:119543c9f674 | 170 | /** @defgroup GPIO_Exported_Functions GPIO Exported Functions |
| mbed_official | 489:119543c9f674 | 171 | * @{ |
| mbed_official | 489:119543c9f674 | 172 | */ |
| mbed_official | 489:119543c9f674 | 173 | |
| mbed_official | 489:119543c9f674 | 174 | /** @defgroup GPIO_Exported_Functions_Group1 Initialization and deinitialization functions |
| mbed_official | 489:119543c9f674 | 175 | * @brief Initialization and Configuration functions |
| mbed_official | 489:119543c9f674 | 176 | * |
| mbed_official | 489:119543c9f674 | 177 | @verbatim |
| mbed_official | 489:119543c9f674 | 178 | =============================================================================== |
| mbed_official | 489:119543c9f674 | 179 | ##### Initialization and deinitialization functions ##### |
| mbed_official | 489:119543c9f674 | 180 | =============================================================================== |
| mbed_official | 489:119543c9f674 | 181 | [..] |
| mbed_official | 489:119543c9f674 | 182 | This section provides functions allowing to initialize and de-initialize the GPIOs |
| mbed_official | 489:119543c9f674 | 183 | to be ready for use. |
| mbed_official | 489:119543c9f674 | 184 | |
| mbed_official | 489:119543c9f674 | 185 | @endverbatim |
| mbed_official | 489:119543c9f674 | 186 | * @{ |
| mbed_official | 489:119543c9f674 | 187 | */ |
| mbed_official | 489:119543c9f674 | 188 | |
| mbed_official | 489:119543c9f674 | 189 | /** |
| mbed_official | 489:119543c9f674 | 190 | * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init. |
| mbed_official | 489:119543c9f674 | 191 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral |
| mbed_official | 489:119543c9f674 | 192 | * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 193 | * the configuration information for the specified GPIO peripheral. |
| mbed_official | 489:119543c9f674 | 194 | * @retval None |
| mbed_official | 489:119543c9f674 | 195 | */ |
| mbed_official | 489:119543c9f674 | 196 | void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) |
| mbed_official | 489:119543c9f674 | 197 | { |
| mbed_official | 489:119543c9f674 | 198 | uint32_t position; |
| mbed_official | 489:119543c9f674 | 199 | uint32_t ioposition = 0x00; |
| mbed_official | 489:119543c9f674 | 200 | uint32_t iocurrent = 0x00; |
| mbed_official | 489:119543c9f674 | 201 | uint32_t temp = 0x00; |
| mbed_official | 489:119543c9f674 | 202 | uint32_t config = 0x00; |
| mbed_official | 489:119543c9f674 | 203 | __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */ |
| mbed_official | 489:119543c9f674 | 204 | uint32_t registeroffset = 0; /* offset used during computation of CNF and MODE bits placement inside CRL or CRH register */ |
| mbed_official | 489:119543c9f674 | 205 | |
| mbed_official | 489:119543c9f674 | 206 | /* Check the parameters */ |
| mbed_official | 489:119543c9f674 | 207 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
| mbed_official | 489:119543c9f674 | 208 | assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); |
| mbed_official | 489:119543c9f674 | 209 | assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); |
| mbed_official | 489:119543c9f674 | 210 | assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); |
| mbed_official | 489:119543c9f674 | 211 | |
| mbed_official | 489:119543c9f674 | 212 | /* Configure the port pins */ |
| mbed_official | 489:119543c9f674 | 213 | for (position = 0; position < GPIO_NUMBER; position++) |
| mbed_official | 489:119543c9f674 | 214 | { |
| mbed_official | 489:119543c9f674 | 215 | /* Get the IO position */ |
| mbed_official | 489:119543c9f674 | 216 | ioposition = ((uint32_t)0x01) << position; |
| mbed_official | 489:119543c9f674 | 217 | |
| mbed_official | 489:119543c9f674 | 218 | /* Get the current IO position */ |
| mbed_official | 489:119543c9f674 | 219 | iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; |
| mbed_official | 489:119543c9f674 | 220 | |
| mbed_official | 489:119543c9f674 | 221 | if (iocurrent == ioposition) |
| mbed_official | 489:119543c9f674 | 222 | { |
| mbed_official | 489:119543c9f674 | 223 | /* Check the Alternate function parameters */ |
| mbed_official | 489:119543c9f674 | 224 | assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); |
| mbed_official | 489:119543c9f674 | 225 | |
| mbed_official | 489:119543c9f674 | 226 | /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ |
| mbed_official | 489:119543c9f674 | 227 | switch (GPIO_Init->Mode) |
| mbed_official | 489:119543c9f674 | 228 | { |
| mbed_official | 489:119543c9f674 | 229 | /* If we are configuring the pin in OUTPUT push-pull mode */ |
| mbed_official | 489:119543c9f674 | 230 | case GPIO_MODE_OUTPUT_PP: |
| mbed_official | 489:119543c9f674 | 231 | /* Check the GPIO speed parameter */ |
| mbed_official | 489:119543c9f674 | 232 | assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); |
| mbed_official | 489:119543c9f674 | 233 | config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; |
| mbed_official | 489:119543c9f674 | 234 | break; |
| mbed_official | 489:119543c9f674 | 235 | |
| mbed_official | 489:119543c9f674 | 236 | /* If we are configuring the pin in OUTPUT open-drain mode */ |
| mbed_official | 489:119543c9f674 | 237 | case GPIO_MODE_OUTPUT_OD: |
| mbed_official | 489:119543c9f674 | 238 | /* Check the GPIO speed parameter */ |
| mbed_official | 489:119543c9f674 | 239 | assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); |
| mbed_official | 489:119543c9f674 | 240 | config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; |
| mbed_official | 489:119543c9f674 | 241 | break; |
| mbed_official | 489:119543c9f674 | 242 | |
| mbed_official | 489:119543c9f674 | 243 | /* If we are configuring the pin in ALTERNATE FUNCTION push-pull mode */ |
| mbed_official | 489:119543c9f674 | 244 | case GPIO_MODE_AF_PP: |
| mbed_official | 489:119543c9f674 | 245 | /* Check the GPIO speed parameter */ |
| mbed_official | 489:119543c9f674 | 246 | assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); |
| mbed_official | 489:119543c9f674 | 247 | config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; |
| mbed_official | 489:119543c9f674 | 248 | break; |
| mbed_official | 489:119543c9f674 | 249 | |
| mbed_official | 489:119543c9f674 | 250 | /* If we are configuring the pin in ALTERNATE FUNCTION open-drain mode */ |
| mbed_official | 489:119543c9f674 | 251 | case GPIO_MODE_AF_OD: |
| mbed_official | 489:119543c9f674 | 252 | /* Check the GPIO speed parameter */ |
| mbed_official | 489:119543c9f674 | 253 | assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); |
| mbed_official | 489:119543c9f674 | 254 | config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; |
| mbed_official | 489:119543c9f674 | 255 | break; |
| mbed_official | 489:119543c9f674 | 256 | |
| mbed_official | 489:119543c9f674 | 257 | /* If we are configuring the pin in INPUT (also applicable to EVENT and IT mode) */ |
| mbed_official | 489:119543c9f674 | 258 | case GPIO_MODE_INPUT: |
| mbed_official | 489:119543c9f674 | 259 | case GPIO_MODE_IT_RISING: |
| mbed_official | 489:119543c9f674 | 260 | case GPIO_MODE_IT_FALLING: |
| mbed_official | 489:119543c9f674 | 261 | case GPIO_MODE_IT_RISING_FALLING: |
| mbed_official | 489:119543c9f674 | 262 | case GPIO_MODE_EVT_RISING: |
| mbed_official | 489:119543c9f674 | 263 | case GPIO_MODE_EVT_FALLING: |
| mbed_official | 489:119543c9f674 | 264 | case GPIO_MODE_EVT_RISING_FALLING: |
| mbed_official | 489:119543c9f674 | 265 | /* Check the GPIO pull parameter */ |
| mbed_official | 489:119543c9f674 | 266 | assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); |
| mbed_official | 489:119543c9f674 | 267 | if(GPIO_Init->Pull == GPIO_NOPULL) |
| mbed_official | 489:119543c9f674 | 268 | { |
| mbed_official | 489:119543c9f674 | 269 | config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; |
| mbed_official | 489:119543c9f674 | 270 | } |
| mbed_official | 489:119543c9f674 | 271 | else if(GPIO_Init->Pull == GPIO_PULLUP) |
| mbed_official | 489:119543c9f674 | 272 | { |
| mbed_official | 489:119543c9f674 | 273 | config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; |
| mbed_official | 489:119543c9f674 | 274 | |
| mbed_official | 489:119543c9f674 | 275 | /* Set the corresponding ODR bit */ |
| mbed_official | 489:119543c9f674 | 276 | GPIOx->BSRR = ioposition; |
| mbed_official | 489:119543c9f674 | 277 | } |
| mbed_official | 489:119543c9f674 | 278 | else /* GPIO_PULLDOWN */ |
| mbed_official | 489:119543c9f674 | 279 | { |
| mbed_official | 489:119543c9f674 | 280 | config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; |
| mbed_official | 489:119543c9f674 | 281 | |
| mbed_official | 489:119543c9f674 | 282 | /* Reset the corresponding ODR bit */ |
| mbed_official | 489:119543c9f674 | 283 | GPIOx->BRR = ioposition; |
| mbed_official | 489:119543c9f674 | 284 | } |
| mbed_official | 489:119543c9f674 | 285 | break; |
| mbed_official | 489:119543c9f674 | 286 | |
| mbed_official | 489:119543c9f674 | 287 | /* If we are configuring the pin in INPUT analog mode */ |
| mbed_official | 489:119543c9f674 | 288 | case GPIO_MODE_ANALOG: |
| mbed_official | 489:119543c9f674 | 289 | config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; |
| mbed_official | 489:119543c9f674 | 290 | break; |
| mbed_official | 489:119543c9f674 | 291 | |
| mbed_official | 489:119543c9f674 | 292 | /* Parameters are checked with assert_param */ |
| mbed_official | 489:119543c9f674 | 293 | default: |
| mbed_official | 489:119543c9f674 | 294 | break; |
| mbed_official | 489:119543c9f674 | 295 | } |
| mbed_official | 489:119543c9f674 | 296 | |
| mbed_official | 489:119543c9f674 | 297 | /* Check if the current bit belongs to first half or last half of the pin count number |
| mbed_official | 489:119543c9f674 | 298 | in order to address CRH or CRL register*/ |
| mbed_official | 489:119543c9f674 | 299 | configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; |
| mbed_official | 489:119543c9f674 | 300 | registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2) : ((position - 8) << 2); |
| mbed_official | 489:119543c9f674 | 301 | |
| mbed_official | 489:119543c9f674 | 302 | /* Apply the new configuration of the pin to the register */ |
| mbed_official | 489:119543c9f674 | 303 | MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset ), (config << registeroffset)); |
| mbed_official | 489:119543c9f674 | 304 | |
| mbed_official | 489:119543c9f674 | 305 | /*--------------------- EXTI Mode Configuration ------------------------*/ |
| mbed_official | 489:119543c9f674 | 306 | /* Configure the External Interrupt or event for the current IO */ |
| mbed_official | 489:119543c9f674 | 307 | if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) |
| mbed_official | 489:119543c9f674 | 308 | { |
| mbed_official | 489:119543c9f674 | 309 | /* Enable AFIO Clock */ |
| mbed_official | 489:119543c9f674 | 310 | __HAL_RCC_AFIO_CLK_ENABLE(); |
| mbed_official | 489:119543c9f674 | 311 | temp = AFIO->EXTICR[position >> 2]; |
| mbed_official | 489:119543c9f674 | 312 | CLEAR_BIT(temp, ((uint32_t)0x0F) << (4 * (position & 0x03))); |
| mbed_official | 489:119543c9f674 | 313 | SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))); |
| mbed_official | 489:119543c9f674 | 314 | AFIO->EXTICR[position >> 2] = temp; |
| mbed_official | 489:119543c9f674 | 315 | |
| mbed_official | 489:119543c9f674 | 316 | |
| mbed_official | 489:119543c9f674 | 317 | /* Configure the interrupt mask */ |
| mbed_official | 489:119543c9f674 | 318 | if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) |
| mbed_official | 489:119543c9f674 | 319 | { |
| mbed_official | 489:119543c9f674 | 320 | SET_BIT(EXTI->IMR, iocurrent); |
| mbed_official | 489:119543c9f674 | 321 | } |
| mbed_official | 489:119543c9f674 | 322 | else |
| mbed_official | 489:119543c9f674 | 323 | { |
| mbed_official | 489:119543c9f674 | 324 | CLEAR_BIT(EXTI->IMR, iocurrent); |
| mbed_official | 489:119543c9f674 | 325 | } |
| mbed_official | 489:119543c9f674 | 326 | |
| mbed_official | 489:119543c9f674 | 327 | /* Configure the event mask */ |
| mbed_official | 489:119543c9f674 | 328 | if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) |
| mbed_official | 489:119543c9f674 | 329 | { |
| mbed_official | 489:119543c9f674 | 330 | SET_BIT(EXTI->EMR, iocurrent); |
| mbed_official | 489:119543c9f674 | 331 | } |
| mbed_official | 489:119543c9f674 | 332 | else |
| mbed_official | 489:119543c9f674 | 333 | { |
| mbed_official | 489:119543c9f674 | 334 | CLEAR_BIT(EXTI->EMR, iocurrent); |
| mbed_official | 489:119543c9f674 | 335 | } |
| mbed_official | 489:119543c9f674 | 336 | |
| mbed_official | 489:119543c9f674 | 337 | /* Enable or disable the rising trigger */ |
| mbed_official | 489:119543c9f674 | 338 | if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) |
| mbed_official | 489:119543c9f674 | 339 | { |
| mbed_official | 489:119543c9f674 | 340 | SET_BIT(EXTI->RTSR, iocurrent); |
| mbed_official | 489:119543c9f674 | 341 | } |
| mbed_official | 489:119543c9f674 | 342 | else |
| mbed_official | 489:119543c9f674 | 343 | { |
| mbed_official | 489:119543c9f674 | 344 | CLEAR_BIT(EXTI->RTSR, iocurrent); |
| mbed_official | 489:119543c9f674 | 345 | } |
| mbed_official | 489:119543c9f674 | 346 | |
| mbed_official | 489:119543c9f674 | 347 | /* Enable or disable the falling trigger */ |
| mbed_official | 489:119543c9f674 | 348 | if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) |
| mbed_official | 489:119543c9f674 | 349 | { |
| mbed_official | 489:119543c9f674 | 350 | SET_BIT(EXTI->FTSR, iocurrent); |
| mbed_official | 489:119543c9f674 | 351 | } |
| mbed_official | 489:119543c9f674 | 352 | else |
| mbed_official | 489:119543c9f674 | 353 | { |
| mbed_official | 489:119543c9f674 | 354 | CLEAR_BIT(EXTI->FTSR, iocurrent); |
| mbed_official | 489:119543c9f674 | 355 | } |
| mbed_official | 489:119543c9f674 | 356 | } |
| mbed_official | 489:119543c9f674 | 357 | } |
| mbed_official | 489:119543c9f674 | 358 | } |
| mbed_official | 489:119543c9f674 | 359 | } |
| mbed_official | 489:119543c9f674 | 360 | |
| mbed_official | 489:119543c9f674 | 361 | /** |
| mbed_official | 489:119543c9f674 | 362 | * @brief De-initializes the GPIOx peripheral registers to their default reset values. |
| mbed_official | 489:119543c9f674 | 363 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral |
| mbed_official | 489:119543c9f674 | 364 | * @param GPIO_Pin: specifies the port bit to be written. |
| mbed_official | 489:119543c9f674 | 365 | * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
| mbed_official | 489:119543c9f674 | 366 | * @retval None |
| mbed_official | 489:119543c9f674 | 367 | */ |
| mbed_official | 489:119543c9f674 | 368 | void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) |
| mbed_official | 489:119543c9f674 | 369 | { |
| mbed_official | 489:119543c9f674 | 370 | uint32_t position = 0x00; |
| mbed_official | 489:119543c9f674 | 371 | uint32_t iocurrent = 0x00; |
| mbed_official | 489:119543c9f674 | 372 | uint32_t tmp = 0x00; |
| mbed_official | 489:119543c9f674 | 373 | __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */ |
| mbed_official | 489:119543c9f674 | 374 | uint32_t registeroffset = 0; |
| mbed_official | 489:119543c9f674 | 375 | |
| mbed_official | 489:119543c9f674 | 376 | /* Check the parameters */ |
| mbed_official | 489:119543c9f674 | 377 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
| mbed_official | 489:119543c9f674 | 378 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
| mbed_official | 489:119543c9f674 | 379 | |
| mbed_official | 489:119543c9f674 | 380 | /* Configure the port pins */ |
| mbed_official | 489:119543c9f674 | 381 | while ((GPIO_Pin >> position) != 0) |
| mbed_official | 489:119543c9f674 | 382 | { |
| mbed_official | 489:119543c9f674 | 383 | /* Get current io position */ |
| mbed_official | 489:119543c9f674 | 384 | iocurrent = (GPIO_Pin) & ((uint32_t)1 << position); |
| mbed_official | 489:119543c9f674 | 385 | |
| mbed_official | 489:119543c9f674 | 386 | if (iocurrent) |
| mbed_official | 489:119543c9f674 | 387 | { |
| mbed_official | 489:119543c9f674 | 388 | /*------------------------- GPIO Mode Configuration --------------------*/ |
| mbed_official | 489:119543c9f674 | 389 | /* Check if the current bit belongs to first half or last half of the pin count number |
| mbed_official | 489:119543c9f674 | 390 | in order to address CRH or CRL register */ |
| mbed_official | 489:119543c9f674 | 391 | configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; |
| mbed_official | 489:119543c9f674 | 392 | registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2) : ((position - 8) << 2); |
| mbed_official | 489:119543c9f674 | 393 | |
| mbed_official | 489:119543c9f674 | 394 | /* CRL/CRH default value is floating input(0x04) shifted to correct position */ |
| mbed_official | 489:119543c9f674 | 395 | MODIFY_REG(*configregister, ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset ), GPIO_CRL_CNF0_0 << registeroffset); |
| mbed_official | 489:119543c9f674 | 396 | |
| mbed_official | 489:119543c9f674 | 397 | /* ODR default value is 0 */ |
| mbed_official | 489:119543c9f674 | 398 | CLEAR_BIT(GPIOx->ODR, iocurrent); |
| mbed_official | 489:119543c9f674 | 399 | |
| mbed_official | 489:119543c9f674 | 400 | /*------------------------- EXTI Mode Configuration --------------------*/ |
| mbed_official | 489:119543c9f674 | 401 | /* Clear the External Interrupt or Event for the current IO */ |
| mbed_official | 489:119543c9f674 | 402 | |
| mbed_official | 489:119543c9f674 | 403 | tmp = AFIO->EXTICR[position >> 2]; |
| mbed_official | 489:119543c9f674 | 404 | tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03))); |
| mbed_official | 489:119543c9f674 | 405 | if(tmp == (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03)))) |
| mbed_official | 489:119543c9f674 | 406 | { |
| mbed_official | 489:119543c9f674 | 407 | tmp = ((uint32_t)0x0F) << (4 * (position & 0x03)); |
| mbed_official | 489:119543c9f674 | 408 | CLEAR_BIT(AFIO->EXTICR[position >> 2], tmp); |
| mbed_official | 489:119543c9f674 | 409 | |
| mbed_official | 489:119543c9f674 | 410 | /* Clear EXTI line configuration */ |
| mbed_official | 489:119543c9f674 | 411 | CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent); |
| mbed_official | 489:119543c9f674 | 412 | CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent); |
| mbed_official | 489:119543c9f674 | 413 | |
| mbed_official | 489:119543c9f674 | 414 | /* Clear Rising Falling edge configuration */ |
| mbed_official | 489:119543c9f674 | 415 | CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent); |
| mbed_official | 489:119543c9f674 | 416 | CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent); |
| mbed_official | 489:119543c9f674 | 417 | } |
| mbed_official | 489:119543c9f674 | 418 | } |
| mbed_official | 489:119543c9f674 | 419 | |
| mbed_official | 489:119543c9f674 | 420 | position++; |
| mbed_official | 489:119543c9f674 | 421 | } |
| mbed_official | 489:119543c9f674 | 422 | } |
| mbed_official | 489:119543c9f674 | 423 | |
| mbed_official | 489:119543c9f674 | 424 | /** |
| mbed_official | 489:119543c9f674 | 425 | * @} |
| mbed_official | 489:119543c9f674 | 426 | */ |
| mbed_official | 489:119543c9f674 | 427 | |
| mbed_official | 489:119543c9f674 | 428 | /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions |
| mbed_official | 489:119543c9f674 | 429 | * @brief GPIO Read and Write |
| mbed_official | 489:119543c9f674 | 430 | * |
| mbed_official | 489:119543c9f674 | 431 | @verbatim |
| mbed_official | 489:119543c9f674 | 432 | =============================================================================== |
| mbed_official | 489:119543c9f674 | 433 | ##### IO operation functions ##### |
| mbed_official | 489:119543c9f674 | 434 | =============================================================================== |
| mbed_official | 489:119543c9f674 | 435 | [..] |
| mbed_official | 489:119543c9f674 | 436 | This subsection provides a set of functions allowing to manage the GPIOs. |
| mbed_official | 489:119543c9f674 | 437 | |
| mbed_official | 489:119543c9f674 | 438 | @endverbatim |
| mbed_official | 489:119543c9f674 | 439 | * @{ |
| mbed_official | 489:119543c9f674 | 440 | */ |
| mbed_official | 489:119543c9f674 | 441 | /** |
| mbed_official | 489:119543c9f674 | 442 | * @brief Reads the specified input port pin. |
| mbed_official | 489:119543c9f674 | 443 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral |
| mbed_official | 489:119543c9f674 | 444 | * @param GPIO_Pin: specifies the port bit to read. |
| mbed_official | 489:119543c9f674 | 445 | * This parameter can be GPIO_PIN_x where x can be (0..15). |
| mbed_official | 489:119543c9f674 | 446 | * @retval The input port pin value. |
| mbed_official | 489:119543c9f674 | 447 | */ |
| mbed_official | 489:119543c9f674 | 448 | GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
| mbed_official | 489:119543c9f674 | 449 | { |
| mbed_official | 489:119543c9f674 | 450 | GPIO_PinState bitstatus; |
| mbed_official | 489:119543c9f674 | 451 | |
| mbed_official | 489:119543c9f674 | 452 | /* Check the parameters */ |
| mbed_official | 489:119543c9f674 | 453 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
| mbed_official | 489:119543c9f674 | 454 | |
| mbed_official | 489:119543c9f674 | 455 | if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) |
| mbed_official | 489:119543c9f674 | 456 | { |
| mbed_official | 489:119543c9f674 | 457 | bitstatus = GPIO_PIN_SET; |
| mbed_official | 489:119543c9f674 | 458 | } |
| mbed_official | 489:119543c9f674 | 459 | else |
| mbed_official | 489:119543c9f674 | 460 | { |
| mbed_official | 489:119543c9f674 | 461 | bitstatus = GPIO_PIN_RESET; |
| mbed_official | 489:119543c9f674 | 462 | } |
| mbed_official | 489:119543c9f674 | 463 | return bitstatus; |
| mbed_official | 489:119543c9f674 | 464 | } |
| mbed_official | 489:119543c9f674 | 465 | |
| mbed_official | 489:119543c9f674 | 466 | /** |
| mbed_official | 489:119543c9f674 | 467 | * @brief Sets or clears the selected data port bit. |
| mbed_official | 489:119543c9f674 | 468 | * |
| mbed_official | 489:119543c9f674 | 469 | * @note This function uses GPIOx_BSRR register to allow atomic read/modify |
| mbed_official | 489:119543c9f674 | 470 | * accesses. In this way, there is no risk of an IRQ occurring between |
| mbed_official | 489:119543c9f674 | 471 | * the read and the modify access. |
| mbed_official | 489:119543c9f674 | 472 | * |
| mbed_official | 489:119543c9f674 | 473 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral |
| mbed_official | 489:119543c9f674 | 474 | * @param GPIO_Pin: specifies the port bit to be written. |
| mbed_official | 489:119543c9f674 | 475 | * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
| mbed_official | 489:119543c9f674 | 476 | * @param PinState: specifies the value to be written to the selected bit. |
| mbed_official | 489:119543c9f674 | 477 | * This parameter can be one of the GPIO_PinState enum values: |
| mbed_official | 489:119543c9f674 | 478 | * @arg GPIO_BIT_RESET: to clear the port pin |
| mbed_official | 489:119543c9f674 | 479 | * @arg GPIO_BIT_SET: to set the port pin |
| mbed_official | 489:119543c9f674 | 480 | * @retval None |
| mbed_official | 489:119543c9f674 | 481 | */ |
| mbed_official | 489:119543c9f674 | 482 | void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) |
| mbed_official | 489:119543c9f674 | 483 | { |
| mbed_official | 489:119543c9f674 | 484 | /* Check the parameters */ |
| mbed_official | 489:119543c9f674 | 485 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
| mbed_official | 489:119543c9f674 | 486 | assert_param(IS_GPIO_PIN_ACTION(PinState)); |
| mbed_official | 489:119543c9f674 | 487 | |
| mbed_official | 489:119543c9f674 | 488 | if(PinState != GPIO_PIN_RESET) |
| mbed_official | 489:119543c9f674 | 489 | { |
| mbed_official | 489:119543c9f674 | 490 | GPIOx->BSRR = GPIO_Pin; |
| mbed_official | 489:119543c9f674 | 491 | } |
| mbed_official | 489:119543c9f674 | 492 | else |
| mbed_official | 489:119543c9f674 | 493 | { |
| mbed_official | 489:119543c9f674 | 494 | GPIOx->BSRR = (uint32_t)GPIO_Pin << 16; |
| mbed_official | 489:119543c9f674 | 495 | } |
| mbed_official | 489:119543c9f674 | 496 | } |
| mbed_official | 489:119543c9f674 | 497 | |
| mbed_official | 489:119543c9f674 | 498 | /** |
| mbed_official | 489:119543c9f674 | 499 | * @brief Toggles the specified GPIO pin |
| mbed_official | 489:119543c9f674 | 500 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral |
| mbed_official | 489:119543c9f674 | 501 | * @param GPIO_Pin: Specifies the pins to be toggled. |
| mbed_official | 489:119543c9f674 | 502 | * @retval None |
| mbed_official | 489:119543c9f674 | 503 | */ |
| mbed_official | 489:119543c9f674 | 504 | void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
| mbed_official | 489:119543c9f674 | 505 | { |
| mbed_official | 489:119543c9f674 | 506 | /* Check the parameters */ |
| mbed_official | 489:119543c9f674 | 507 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
| mbed_official | 489:119543c9f674 | 508 | |
| mbed_official | 489:119543c9f674 | 509 | GPIOx->ODR ^= GPIO_Pin; |
| mbed_official | 489:119543c9f674 | 510 | } |
| mbed_official | 489:119543c9f674 | 511 | |
| mbed_official | 489:119543c9f674 | 512 | /** |
| mbed_official | 489:119543c9f674 | 513 | * @brief Locks GPIO Pins configuration registers. |
| mbed_official | 489:119543c9f674 | 514 | * @note The locking mechanism allows the IO configuration to be frozen. When the LOCK sequence |
| mbed_official | 489:119543c9f674 | 515 | * has been applied on a port bit, it is no longer possible to modify the value of the port bit until |
| mbed_official | 489:119543c9f674 | 516 | * the next reset. |
| mbed_official | 489:119543c9f674 | 517 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral |
| mbed_official | 489:119543c9f674 | 518 | * @param GPIO_Pin: specifies the port bit to be locked. |
| mbed_official | 489:119543c9f674 | 519 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). |
| mbed_official | 489:119543c9f674 | 520 | * @retval None |
| mbed_official | 489:119543c9f674 | 521 | */ |
| mbed_official | 489:119543c9f674 | 522 | HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
| mbed_official | 489:119543c9f674 | 523 | { |
| mbed_official | 489:119543c9f674 | 524 | __IO uint32_t tmp = GPIO_LCKR_LCKK; |
| mbed_official | 489:119543c9f674 | 525 | |
| mbed_official | 489:119543c9f674 | 526 | /* Check the parameters */ |
| mbed_official | 489:119543c9f674 | 527 | assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); |
| mbed_official | 489:119543c9f674 | 528 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
| mbed_official | 489:119543c9f674 | 529 | |
| mbed_official | 489:119543c9f674 | 530 | /* Apply lock key write sequence */ |
| mbed_official | 489:119543c9f674 | 531 | SET_BIT(tmp, GPIO_Pin); |
| mbed_official | 489:119543c9f674 | 532 | /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ |
| mbed_official | 489:119543c9f674 | 533 | GPIOx->LCKR = tmp; |
| mbed_official | 489:119543c9f674 | 534 | /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ |
| mbed_official | 489:119543c9f674 | 535 | GPIOx->LCKR = GPIO_Pin; |
| mbed_official | 489:119543c9f674 | 536 | /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ |
| mbed_official | 489:119543c9f674 | 537 | GPIOx->LCKR = tmp; |
| mbed_official | 489:119543c9f674 | 538 | /* Read LCKK bit*/ |
| mbed_official | 489:119543c9f674 | 539 | tmp = GPIOx->LCKR; |
| mbed_official | 489:119543c9f674 | 540 | |
| mbed_official | 489:119543c9f674 | 541 | if((uint32_t)(GPIOx->LCKR & GPIO_LCKR_LCKK)) |
| mbed_official | 489:119543c9f674 | 542 | { |
| mbed_official | 489:119543c9f674 | 543 | return HAL_OK; |
| mbed_official | 489:119543c9f674 | 544 | } |
| mbed_official | 489:119543c9f674 | 545 | else |
| mbed_official | 489:119543c9f674 | 546 | { |
| mbed_official | 489:119543c9f674 | 547 | return HAL_ERROR; |
| mbed_official | 489:119543c9f674 | 548 | } |
| mbed_official | 489:119543c9f674 | 549 | } |
| mbed_official | 489:119543c9f674 | 550 | |
| mbed_official | 489:119543c9f674 | 551 | /** |
| mbed_official | 489:119543c9f674 | 552 | * @brief This function handles EXTI interrupt request. |
| mbed_official | 489:119543c9f674 | 553 | * @param GPIO_Pin: Specifies the pins connected EXTI line |
| mbed_official | 489:119543c9f674 | 554 | * @retval None |
| mbed_official | 489:119543c9f674 | 555 | */ |
| mbed_official | 489:119543c9f674 | 556 | void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) |
| mbed_official | 489:119543c9f674 | 557 | { |
| mbed_official | 489:119543c9f674 | 558 | /* EXTI line interrupt detected */ |
| mbed_official | 489:119543c9f674 | 559 | if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) |
| mbed_official | 489:119543c9f674 | 560 | { |
| mbed_official | 489:119543c9f674 | 561 | __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); |
| mbed_official | 489:119543c9f674 | 562 | HAL_GPIO_EXTI_Callback(GPIO_Pin); |
| mbed_official | 489:119543c9f674 | 563 | } |
| mbed_official | 489:119543c9f674 | 564 | } |
| mbed_official | 489:119543c9f674 | 565 | |
| mbed_official | 489:119543c9f674 | 566 | /** |
| mbed_official | 489:119543c9f674 | 567 | * @brief EXTI line detection callback |
| mbed_official | 489:119543c9f674 | 568 | * @param GPIO_Pin: Specifies the pins connected EXTI line |
| mbed_official | 489:119543c9f674 | 569 | * @retval None |
| mbed_official | 489:119543c9f674 | 570 | */ |
| mbed_official | 489:119543c9f674 | 571 | __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) |
| mbed_official | 489:119543c9f674 | 572 | { |
| mbed_official | 489:119543c9f674 | 573 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 489:119543c9f674 | 574 | the HAL_GPIO_EXTI_Callback could be implemented in the user file |
| mbed_official | 489:119543c9f674 | 575 | */ |
| mbed_official | 489:119543c9f674 | 576 | } |
| mbed_official | 489:119543c9f674 | 577 | |
| mbed_official | 489:119543c9f674 | 578 | /** |
| mbed_official | 489:119543c9f674 | 579 | * @} |
| mbed_official | 489:119543c9f674 | 580 | */ |
| mbed_official | 489:119543c9f674 | 581 | |
| mbed_official | 489:119543c9f674 | 582 | |
| mbed_official | 489:119543c9f674 | 583 | /** |
| mbed_official | 489:119543c9f674 | 584 | * @} |
| mbed_official | 489:119543c9f674 | 585 | */ |
| mbed_official | 489:119543c9f674 | 586 | |
| mbed_official | 489:119543c9f674 | 587 | #endif /* HAL_GPIO_MODULE_ENABLED */ |
| mbed_official | 489:119543c9f674 | 588 | /** |
| mbed_official | 489:119543c9f674 | 589 | * @} |
| mbed_official | 489:119543c9f674 | 590 | */ |
| mbed_official | 489:119543c9f674 | 591 | |
| mbed_official | 489:119543c9f674 | 592 | /** |
| mbed_official | 489:119543c9f674 | 593 | * @} |
| mbed_official | 489:119543c9f674 | 594 | */ |
| mbed_official | 489:119543c9f674 | 595 | |
| mbed_official | 489:119543c9f674 | 596 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |