Thomas Byrne / mbed-src-stm32f030k6

Public fork of mbed-src to add generic stm32f030k6 target

Fork of mbed-src by mbed official

Files at this revision

API Documentation at this revision

Revision 595:33fe5b4b1e98, committed 2015-07-21

Comitter:
ersatzavian
Date:
Tue Jul 21 14:00:48 2015 -0700
Parent:
594:5afbce4ea2da
Child:
596:d25a30803853
Commit message:
changed startup and flash files for STM32F030K6

Changed in this revision

targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/startup_stm32f030x8.S Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct Show annotated file Show diff for this revision Revisions of this file 
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/startup_stm32f030x8.S	Tue Jul 21 13:45:08 2015 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/startup_stm32f030x8.S	Tue Jul 21 14:00:48 2015 -0700
@@ -39,7 +39,8 @@
                 EXPORT  __initial_sp
                 
 Stack_Mem       SPACE   Stack_Size
-__initial_sp    EQU     0x20002000 ; Top of RAM (8 KB for STM32F030R8)
+;__initial_sp    EQU     0x20002000 ; Top of RAM (8 KB for STM32F030R8)
+__initial_sp    EQU     0x20001000 ; Top of RAM (4 KB for STM32F030K6)
 
 
 ; <h> Heap Configuration

--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct	Tue Jul 21 13:45:08 2015 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct	Tue Jul 21 14:00:48 2015 -0700
@@ -28,18 +28,20 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 ; STM32F030R8: 64KB FLASH (0x10000) + 8KB RAM (0x2000)
-
- LR_IROM1 0x08000000 0x10000  {    ; load region size_region
-  ER_IROM1 0x08000000 0x10000  {  ; load address = execution address 
+; STM32F030K6: 32KB FLASH (0x8000) + 4KB RAM (0x1000)
+ 
+ ;LR_IROM1 0x08000000 0x10000  {    ; load region size_region
+ ; ER_IROM1 0x08000000 0x10000  {  ; load address = execution address 
+ LR_IROM1 0x08000000 0x8000  {    ; load region size_region
+  ER_IROM1 0x08000000 0x8000  {  ; load address = execution address 
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
   }
-
+ 
   ; 45 vectors = 180 bytes (0xB4) to be reserved in RAM
-  RW_IRAM1 (0x20000000+0xB4) (0x2000-0xB4)  {  ; RW data
+ ; RW_IRAM1 (0x20000000+0xB4) (0x2000-0xB4)  {  ; RW data
+  RW_IRAM1 (0x20000000+0xB4) (0x1000-0xB4)  {  ; RW data
    .ANY (+RW +ZI)
   }
 
-}
-