Emily Wilson / Mbed 2 deprecated ECE4180Lab1

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Dependencies:   mbed MCP23S17 PinDetect USBDevice

PowerControl/EthernetPowerControl.cpp@11:2cfdab516b21, 2020-01-21 (annotated)

Committer:
emilywilson
Date:
Tue Jan 21 21:06:20 2020 +0000
Revision:
11:2cfdab516b21
power management extra credit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilywilson 11:2cfdab516b21 1 #include "EthernetPowerControl.h"
emilywilson 11:2cfdab516b21 2
emilywilson 11:2cfdab516b21 3 static void write_PHY (unsigned int PhyReg, unsigned short Value) {
emilywilson 11:2cfdab516b21 4 /* Write a data 'Value' to PHY register 'PhyReg'. */
emilywilson 11:2cfdab516b21 5 unsigned int tout;
emilywilson 11:2cfdab516b21 6 /* Hardware MII Management for LPC176x devices. */
emilywilson 11:2cfdab516b21 7 LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
emilywilson 11:2cfdab516b21 8 LPC_EMAC->MWTD = Value;
emilywilson 11:2cfdab516b21 9
emilywilson 11:2cfdab516b21 10 /* Wait utill operation completed */
emilywilson 11:2cfdab516b21 11 for (tout = 0; tout < MII_WR_TOUT; tout++) {
emilywilson 11:2cfdab516b21 12 if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
emilywilson 11:2cfdab516b21 13 break;
emilywilson 11:2cfdab516b21 14 }
emilywilson 11:2cfdab516b21 15 }
emilywilson 11:2cfdab516b21 16 }
emilywilson 11:2cfdab516b21 17
emilywilson 11:2cfdab516b21 18 static unsigned short read_PHY (unsigned int PhyReg) {
emilywilson 11:2cfdab516b21 19 /* Read a PHY register 'PhyReg'. */
emilywilson 11:2cfdab516b21 20 unsigned int tout, val;
emilywilson 11:2cfdab516b21 21
emilywilson 11:2cfdab516b21 22 LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
emilywilson 11:2cfdab516b21 23 LPC_EMAC->MCMD = MCMD_READ;
emilywilson 11:2cfdab516b21 24
emilywilson 11:2cfdab516b21 25 /* Wait until operation completed */
emilywilson 11:2cfdab516b21 26 for (tout = 0; tout < MII_RD_TOUT; tout++) {
emilywilson 11:2cfdab516b21 27 if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
emilywilson 11:2cfdab516b21 28 break;
emilywilson 11:2cfdab516b21 29 }
emilywilson 11:2cfdab516b21 30 }
emilywilson 11:2cfdab516b21 31 LPC_EMAC->MCMD = 0;
emilywilson 11:2cfdab516b21 32 val = LPC_EMAC->MRDD;
emilywilson 11:2cfdab516b21 33
emilywilson 11:2cfdab516b21 34 return (val);
emilywilson 11:2cfdab516b21 35 }
emilywilson 11:2cfdab516b21 36
emilywilson 11:2cfdab516b21 37 void EMAC_Init()
emilywilson 11:2cfdab516b21 38 {
emilywilson 11:2cfdab516b21 39 unsigned int tout,regv;
emilywilson 11:2cfdab516b21 40 /* Power Up the EMAC controller. */
emilywilson 11:2cfdab516b21 41 Peripheral_PowerUp(LPC1768_PCONP_PCENET);
emilywilson 11:2cfdab516b21 42
emilywilson 11:2cfdab516b21 43 LPC_PINCON->PINSEL2 = 0x50150105;
emilywilson 11:2cfdab516b21 44 LPC_PINCON->PINSEL3 &= ~0x0000000F;
emilywilson 11:2cfdab516b21 45 LPC_PINCON->PINSEL3 |= 0x00000005;
emilywilson 11:2cfdab516b21 46
emilywilson 11:2cfdab516b21 47 /* Reset all EMAC internal modules. */
emilywilson 11:2cfdab516b21 48 LPC_EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
emilywilson 11:2cfdab516b21 49 MAC1_SIM_RES | MAC1_SOFT_RES;
emilywilson 11:2cfdab516b21 50 LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES;
emilywilson 11:2cfdab516b21 51
emilywilson 11:2cfdab516b21 52 /* A short delay after reset. */
emilywilson 11:2cfdab516b21 53 for (tout = 100; tout; tout--);
emilywilson 11:2cfdab516b21 54
emilywilson 11:2cfdab516b21 55 /* Initialize MAC control registers. */
emilywilson 11:2cfdab516b21 56 LPC_EMAC->MAC1 = MAC1_PASS_ALL;
emilywilson 11:2cfdab516b21 57 LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
emilywilson 11:2cfdab516b21 58 LPC_EMAC->MAXF = ETH_MAX_FLEN;
emilywilson 11:2cfdab516b21 59 LPC_EMAC->CLRT = CLRT_DEF;
emilywilson 11:2cfdab516b21 60 LPC_EMAC->IPGR = IPGR_DEF;
emilywilson 11:2cfdab516b21 61
emilywilson 11:2cfdab516b21 62 /* Enable Reduced MII interface. */
emilywilson 11:2cfdab516b21 63 LPC_EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM;
emilywilson 11:2cfdab516b21 64
emilywilson 11:2cfdab516b21 65 /* Reset Reduced MII Logic. */
emilywilson 11:2cfdab516b21 66 LPC_EMAC->SUPP = SUPP_RES_RMII;
emilywilson 11:2cfdab516b21 67 for (tout = 100; tout; tout--);
emilywilson 11:2cfdab516b21 68 LPC_EMAC->SUPP = 0;
emilywilson 11:2cfdab516b21 69
emilywilson 11:2cfdab516b21 70 /* Put the DP83848C in reset mode */
emilywilson 11:2cfdab516b21 71 write_PHY (PHY_REG_BMCR, 0x8000);
emilywilson 11:2cfdab516b21 72
emilywilson 11:2cfdab516b21 73 /* Wait for hardware reset to end. */
emilywilson 11:2cfdab516b21 74 for (tout = 0; tout < 0x100000; tout++) {
emilywilson 11:2cfdab516b21 75 regv = read_PHY (PHY_REG_BMCR);
emilywilson 11:2cfdab516b21 76 if (!(regv & 0x8000)) {
emilywilson 11:2cfdab516b21 77 /* Reset complete */
emilywilson 11:2cfdab516b21 78 break;
emilywilson 11:2cfdab516b21 79 }
emilywilson 11:2cfdab516b21 80 }
emilywilson 11:2cfdab516b21 81 }
emilywilson 11:2cfdab516b21 82
emilywilson 11:2cfdab516b21 83
emilywilson 11:2cfdab516b21 84 void PHY_PowerDown()
emilywilson 11:2cfdab516b21 85 {
emilywilson 11:2cfdab516b21 86 if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
emilywilson 11:2cfdab516b21 87 EMAC_Init(); //init EMAC if it is not already init'd
emilywilson 11:2cfdab516b21 88
emilywilson 11:2cfdab516b21 89 unsigned int regv;
emilywilson 11:2cfdab516b21 90 regv = read_PHY(PHY_REG_BMCR);
emilywilson 11:2cfdab516b21 91 write_PHY(PHY_REG_BMCR, regv | (1 << PHY_REG_BMCR_POWERDOWN));
emilywilson 11:2cfdab516b21 92 regv = read_PHY(PHY_REG_BMCR);
emilywilson 11:2cfdab516b21 93
emilywilson 11:2cfdab516b21 94 //shouldn't need the EMAC now.
emilywilson 11:2cfdab516b21 95 Peripheral_PowerDown(LPC1768_PCONP_PCENET);
emilywilson 11:2cfdab516b21 96
emilywilson 11:2cfdab516b21 97 //and turn off the PHY OSC
emilywilson 11:2cfdab516b21 98 LPC_GPIO1->FIODIR |= 0x8000000;
emilywilson 11:2cfdab516b21 99 LPC_GPIO1->FIOCLR = 0x8000000;
emilywilson 11:2cfdab516b21 100 }
emilywilson 11:2cfdab516b21 101
emilywilson 11:2cfdab516b21 102 void PHY_PowerUp()
emilywilson 11:2cfdab516b21 103 {
emilywilson 11:2cfdab516b21 104 if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
emilywilson 11:2cfdab516b21 105 EMAC_Init(); //init EMAC if it is not already init'd
emilywilson 11:2cfdab516b21 106
emilywilson 11:2cfdab516b21 107 LPC_GPIO1->FIODIR |= 0x8000000;
emilywilson 11:2cfdab516b21 108 LPC_GPIO1->FIOSET = 0x8000000;
emilywilson 11:2cfdab516b21 109
emilywilson 11:2cfdab516b21 110 //wait for osc to be stable
emilywilson 11:2cfdab516b21 111 wait_ms(200);
emilywilson 11:2cfdab516b21 112
emilywilson 11:2cfdab516b21 113 unsigned int regv;
emilywilson 11:2cfdab516b21 114 regv = read_PHY(PHY_REG_BMCR);
emilywilson 11:2cfdab516b21 115 write_PHY(PHY_REG_BMCR, regv & ~(1 << PHY_REG_BMCR_POWERDOWN));
emilywilson 11:2cfdab516b21 116 regv = read_PHY(PHY_REG_BMCR);
emilywilson 11:2cfdab516b21 117 }
emilywilson 11:2cfdab516b21 118
emilywilson 11:2cfdab516b21 119 void PHY_EnergyDetect_Enable()
emilywilson 11:2cfdab516b21 120 {
emilywilson 11:2cfdab516b21 121 if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
emilywilson 11:2cfdab516b21 122 EMAC_Init(); //init EMAC if it is not already init'd
emilywilson 11:2cfdab516b21 123
emilywilson 11:2cfdab516b21 124 unsigned int regv;
emilywilson 11:2cfdab516b21 125 regv = read_PHY(PHY_REG_EDCR);
emilywilson 11:2cfdab516b21 126 write_PHY(PHY_REG_BMCR, regv | (1 << PHY_REG_EDCR_ENABLE));
emilywilson 11:2cfdab516b21 127 regv = read_PHY(PHY_REG_EDCR);
emilywilson 11:2cfdab516b21 128 }
emilywilson 11:2cfdab516b21 129
emilywilson 11:2cfdab516b21 130 void PHY_EnergyDetect_Disable()
emilywilson 11:2cfdab516b21 131 {
emilywilson 11:2cfdab516b21 132 if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
emilywilson 11:2cfdab516b21 133 EMAC_Init(); //init EMAC if it is not already init'd
emilywilson 11:2cfdab516b21 134 unsigned int regv;
emilywilson 11:2cfdab516b21 135 regv = read_PHY(PHY_REG_EDCR);
emilywilson 11:2cfdab516b21 136 write_PHY(PHY_REG_BMCR, regv & ~(1 << PHY_REG_EDCR_ENABLE));
emilywilson 11:2cfdab516b21 137 regv = read_PHY(PHY_REG_EDCR);
emilywilson 11:2cfdab516b21 138 }