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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F334R8/stm32f3xx_hal_irda_ex.h@0:0a673c671a56, 2016-07-27 (annotated)

Committer:
ebrus
Date:
Wed Jul 27 18:35:32 2016 +0000
Revision:
0:0a673c671a56
4

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ebrus 0:0a673c671a56 1 /**
ebrus 0:0a673c671a56 2 ******************************************************************************
ebrus 0:0a673c671a56 3 * @file stm32f3xx_hal_irda_ex.h
ebrus 0:0a673c671a56 4 * @author MCD Application Team
ebrus 0:0a673c671a56 5 * @version V1.0.1
ebrus 0:0a673c671a56 6 * @date 18-June-2014
ebrus 0:0a673c671a56 7 * @brief Header file of IRDA HAL Extension module.
ebrus 0:0a673c671a56 8 ******************************************************************************
ebrus 0:0a673c671a56 9 * @attention
ebrus 0:0a673c671a56 10 *
ebrus 0:0a673c671a56 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
ebrus 0:0a673c671a56 12 *
ebrus 0:0a673c671a56 13 * Redistribution and use in source and binary forms, with or without modification,
ebrus 0:0a673c671a56 14 * are permitted provided that the following conditions are met:
ebrus 0:0a673c671a56 15 * 1. Redistributions of source code must retain the above copyright notice,
ebrus 0:0a673c671a56 16 * this list of conditions and the following disclaimer.
ebrus 0:0a673c671a56 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
ebrus 0:0a673c671a56 18 * this list of conditions and the following disclaimer in the documentation
ebrus 0:0a673c671a56 19 * and/or other materials provided with the distribution.
ebrus 0:0a673c671a56 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ebrus 0:0a673c671a56 21 * may be used to endorse or promote products derived from this software
ebrus 0:0a673c671a56 22 * without specific prior written permission.
ebrus 0:0a673c671a56 23 *
ebrus 0:0a673c671a56 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ebrus 0:0a673c671a56 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ebrus 0:0a673c671a56 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ebrus 0:0a673c671a56 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ebrus 0:0a673c671a56 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ebrus 0:0a673c671a56 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ebrus 0:0a673c671a56 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ebrus 0:0a673c671a56 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ebrus 0:0a673c671a56 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ebrus 0:0a673c671a56 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ebrus 0:0a673c671a56 34 *
ebrus 0:0a673c671a56 35 ******************************************************************************
ebrus 0:0a673c671a56 36 */
ebrus 0:0a673c671a56 37
ebrus 0:0a673c671a56 38 /* Define to prevent recursive inclusion -------------------------------------*/
ebrus 0:0a673c671a56 39 #ifndef __STM32F3xx_HAL_IRDA_EX_H
ebrus 0:0a673c671a56 40 #define __STM32F3xx_HAL_IRDA_EX_H
ebrus 0:0a673c671a56 41
ebrus 0:0a673c671a56 42 #ifdef __cplusplus
ebrus 0:0a673c671a56 43 extern "C" {
ebrus 0:0a673c671a56 44 #endif
ebrus 0:0a673c671a56 45
ebrus 0:0a673c671a56 46 /* Includes ------------------------------------------------------------------*/
ebrus 0:0a673c671a56 47 #include "stm32f3xx_hal_def.h"
ebrus 0:0a673c671a56 48
ebrus 0:0a673c671a56 49 /** @addtogroup STM32F3xx_HAL_Driver
ebrus 0:0a673c671a56 50 * @{
ebrus 0:0a673c671a56 51 */
ebrus 0:0a673c671a56 52
ebrus 0:0a673c671a56 53 /** @addtogroup IRDAEx
ebrus 0:0a673c671a56 54 * @{
ebrus 0:0a673c671a56 55 */
ebrus 0:0a673c671a56 56
ebrus 0:0a673c671a56 57 /* Exported types ------------------------------------------------------------*/
ebrus 0:0a673c671a56 58 /* Exported constants --------------------------------------------------------*/
ebrus 0:0a673c671a56 59 /** @defgroup IRDAEx_Exported_Constants
ebrus 0:0a673c671a56 60 * @{
ebrus 0:0a673c671a56 61 */
ebrus 0:0a673c671a56 62
ebrus 0:0a673c671a56 63 /** @defgroup IRDAEx_Word_Length IRDA Word Length
ebrus 0:0a673c671a56 64 * @{
ebrus 0:0a673c671a56 65 */
ebrus 0:0a673c671a56 66 #if defined (STM32F301x8) || defined (STM32F302x8) || defined (STM32F334x8) \
ebrus 0:0a673c671a56 67 || defined (STM32F318xx)
ebrus 0:0a673c671a56 68 #define IRDA_WORDLENGTH_7B ((uint32_t)USART_CR1_M1)
ebrus 0:0a673c671a56 69 #define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000)
ebrus 0:0a673c671a56 70 #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M0)
ebrus 0:0a673c671a56 71 #define IS_IRDA_WORD_LENGTH(LENGTH) (((LENGTH) == IRDA_WORDLENGTH_7B) || \
ebrus 0:0a673c671a56 72 ((LENGTH) == IRDA_WORDLENGTH_8B) || \
ebrus 0:0a673c671a56 73 ((LENGTH) == IRDA_WORDLENGTH_9B))
ebrus 0:0a673c671a56 74 #else
ebrus 0:0a673c671a56 75 #define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000)
ebrus 0:0a673c671a56 76 #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
ebrus 0:0a673c671a56 77 #define IS_IRDA_WORD_LENGTH(LENGTH) (((LENGTH) == IRDA_WORDLENGTH_8B) || \
ebrus 0:0a673c671a56 78 ((LENGTH) == IRDA_WORDLENGTH_9B))
ebrus 0:0a673c671a56 79 #endif
ebrus 0:0a673c671a56 80 /**
ebrus 0:0a673c671a56 81 * @}
ebrus 0:0a673c671a56 82 */
ebrus 0:0a673c671a56 83
ebrus 0:0a673c671a56 84
ebrus 0:0a673c671a56 85 /**
ebrus 0:0a673c671a56 86 * @}
ebrus 0:0a673c671a56 87 */
ebrus 0:0a673c671a56 88
ebrus 0:0a673c671a56 89 /* Exported macro ------------------------------------------------------------*/
ebrus 0:0a673c671a56 90
ebrus 0:0a673c671a56 91 /** @defgroup IRDAEx_Exported_Macros
ebrus 0:0a673c671a56 92 * @{
ebrus 0:0a673c671a56 93 */
ebrus 0:0a673c671a56 94
ebrus 0:0a673c671a56 95 /** @brief Reports the IRDA clock source.
ebrus 0:0a673c671a56 96 * @param __HANDLE__: specifies the IRDA Handle
ebrus 0:0a673c671a56 97 * @param __CLOCKSOURCE__ : output variable
ebrus 0:0a673c671a56 98 * @retval IRDA clocking source, written in __CLOCKSOURCE__.
ebrus 0:0a673c671a56 99 */
ebrus 0:0a673c671a56 100 #if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F303xE) \
ebrus 0:0a673c671a56 101 || defined(STM32F318xC) || defined(STM32F358xx)
ebrus 0:0a673c671a56 102 #define __HAL_IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
ebrus 0:0a673c671a56 103 do { \
ebrus 0:0a673c671a56 104 if((__HANDLE__)->Instance == USART1) \
ebrus 0:0a673c671a56 105 { \
ebrus 0:0a673c671a56 106 switch(__HAL_RCC_GET_USART1_SOURCE()) \
ebrus 0:0a673c671a56 107 { \
ebrus 0:0a673c671a56 108 case RCC_USART1CLKSOURCE_PCLK2: \
ebrus 0:0a673c671a56 109 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \
ebrus 0:0a673c671a56 110 break; \
ebrus 0:0a673c671a56 111 case RCC_USART1CLKSOURCE_HSI: \
ebrus 0:0a673c671a56 112 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
ebrus 0:0a673c671a56 113 break; \
ebrus 0:0a673c671a56 114 case RCC_USART1CLKSOURCE_SYSCLK: \
ebrus 0:0a673c671a56 115 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
ebrus 0:0a673c671a56 116 break; \
ebrus 0:0a673c671a56 117 case RCC_USART1CLKSOURCE_LSE: \
ebrus 0:0a673c671a56 118 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
ebrus 0:0a673c671a56 119 break; \
ebrus 0:0a673c671a56 120 } \
ebrus 0:0a673c671a56 121 } \
ebrus 0:0a673c671a56 122 else if((__HANDLE__)->Instance == USART2) \
ebrus 0:0a673c671a56 123 { \
ebrus 0:0a673c671a56 124 switch(__HAL_RCC_GET_USART2_SOURCE()) \
ebrus 0:0a673c671a56 125 { \
ebrus 0:0a673c671a56 126 case RCC_USART2CLKSOURCE_PCLK1: \
ebrus 0:0a673c671a56 127 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
ebrus 0:0a673c671a56 128 break; \
ebrus 0:0a673c671a56 129 case RCC_USART2CLKSOURCE_HSI: \
ebrus 0:0a673c671a56 130 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
ebrus 0:0a673c671a56 131 break; \
ebrus 0:0a673c671a56 132 case RCC_USART2CLKSOURCE_SYSCLK: \
ebrus 0:0a673c671a56 133 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
ebrus 0:0a673c671a56 134 break; \
ebrus 0:0a673c671a56 135 case RCC_USART2CLKSOURCE_LSE: \
ebrus 0:0a673c671a56 136 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
ebrus 0:0a673c671a56 137 break; \
ebrus 0:0a673c671a56 138 } \
ebrus 0:0a673c671a56 139 } \
ebrus 0:0a673c671a56 140 else if((__HANDLE__)->Instance == USART3) \
ebrus 0:0a673c671a56 141 { \
ebrus 0:0a673c671a56 142 switch(__HAL_RCC_GET_USART3_SOURCE()) \
ebrus 0:0a673c671a56 143 { \
ebrus 0:0a673c671a56 144 case RCC_USART3CLKSOURCE_PCLK1: \
ebrus 0:0a673c671a56 145 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
ebrus 0:0a673c671a56 146 break; \
ebrus 0:0a673c671a56 147 case RCC_USART3CLKSOURCE_HSI: \
ebrus 0:0a673c671a56 148 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
ebrus 0:0a673c671a56 149 break; \
ebrus 0:0a673c671a56 150 case RCC_USART3CLKSOURCE_SYSCLK: \
ebrus 0:0a673c671a56 151 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
ebrus 0:0a673c671a56 152 break; \
ebrus 0:0a673c671a56 153 case RCC_USART3CLKSOURCE_LSE: \
ebrus 0:0a673c671a56 154 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
ebrus 0:0a673c671a56 155 break; \
ebrus 0:0a673c671a56 156 } \
ebrus 0:0a673c671a56 157 } \
ebrus 0:0a673c671a56 158 else if((__HANDLE__)->Instance == UART4) \
ebrus 0:0a673c671a56 159 { \
ebrus 0:0a673c671a56 160 switch(__HAL_RCC_GET_UART4_SOURCE()) \
ebrus 0:0a673c671a56 161 { \
ebrus 0:0a673c671a56 162 case RCC_UART4CLKSOURCE_PCLK1: \
ebrus 0:0a673c671a56 163 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
ebrus 0:0a673c671a56 164 break; \
ebrus 0:0a673c671a56 165 case RCC_UART4CLKSOURCE_HSI: \
ebrus 0:0a673c671a56 166 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
ebrus 0:0a673c671a56 167 break; \
ebrus 0:0a673c671a56 168 case RCC_UART4CLKSOURCE_SYSCLK: \
ebrus 0:0a673c671a56 169 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
ebrus 0:0a673c671a56 170 break; \
ebrus 0:0a673c671a56 171 case RCC_UART4CLKSOURCE_LSE: \
ebrus 0:0a673c671a56 172 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
ebrus 0:0a673c671a56 173 break; \
ebrus 0:0a673c671a56 174 } \
ebrus 0:0a673c671a56 175 } \
ebrus 0:0a673c671a56 176 else if ((__HANDLE__)->Instance == UART5) \
ebrus 0:0a673c671a56 177 { \
ebrus 0:0a673c671a56 178 switch(__HAL_RCC_GET_UART5_SOURCE()) \
ebrus 0:0a673c671a56 179 { \
ebrus 0:0a673c671a56 180 case RCC_UART5CLKSOURCE_PCLK1: \
ebrus 0:0a673c671a56 181 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
ebrus 0:0a673c671a56 182 break; \
ebrus 0:0a673c671a56 183 case RCC_UART5CLKSOURCE_HSI: \
ebrus 0:0a673c671a56 184 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
ebrus 0:0a673c671a56 185 break; \
ebrus 0:0a673c671a56 186 case RCC_UART5CLKSOURCE_SYSCLK: \
ebrus 0:0a673c671a56 187 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
ebrus 0:0a673c671a56 188 break; \
ebrus 0:0a673c671a56 189 case RCC_UART5CLKSOURCE_LSE: \
ebrus 0:0a673c671a56 190 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
ebrus 0:0a673c671a56 191 break; \
ebrus 0:0a673c671a56 192 } \
ebrus 0:0a673c671a56 193 } \
ebrus 0:0a673c671a56 194 } while(0)
ebrus 0:0a673c671a56 195 #elif defined(STM32F334x8) || defined(STM32F303x8) || defined(STM32F328xx)
ebrus 0:0a673c671a56 196 #define __HAL_IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
ebrus 0:0a673c671a56 197 do { \
ebrus 0:0a673c671a56 198 if((__HANDLE__)->Instance == USART1) \
ebrus 0:0a673c671a56 199 { \
ebrus 0:0a673c671a56 200 switch(__HAL_RCC_GET_USART1_SOURCE()) \
ebrus 0:0a673c671a56 201 { \
ebrus 0:0a673c671a56 202 case RCC_USART1CLKSOURCE_PCLK1: \
ebrus 0:0a673c671a56 203 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
ebrus 0:0a673c671a56 204 break; \
ebrus 0:0a673c671a56 205 case RCC_USART1CLKSOURCE_HSI: \
ebrus 0:0a673c671a56 206 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
ebrus 0:0a673c671a56 207 break; \
ebrus 0:0a673c671a56 208 case RCC_USART1CLKSOURCE_SYSCLK: \
ebrus 0:0a673c671a56 209 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
ebrus 0:0a673c671a56 210 break; \
ebrus 0:0a673c671a56 211 case RCC_USART1CLKSOURCE_LSE: \
ebrus 0:0a673c671a56 212 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
ebrus 0:0a673c671a56 213 break; \
ebrus 0:0a673c671a56 214 } \
ebrus 0:0a673c671a56 215 } \
ebrus 0:0a673c671a56 216 else if((__HANDLE__)->Instance == USART2) \
ebrus 0:0a673c671a56 217 { \
ebrus 0:0a673c671a56 218 switch(__HAL_RCC_GET_USART2_SOURCE()) \
ebrus 0:0a673c671a56 219 { \
ebrus 0:0a673c671a56 220 case RCC_USART2CLKSOURCE_PCLK1: \
ebrus 0:0a673c671a56 221 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
ebrus 0:0a673c671a56 222 break; \
ebrus 0:0a673c671a56 223 case RCC_USART2CLKSOURCE_HSI: \
ebrus 0:0a673c671a56 224 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
ebrus 0:0a673c671a56 225 break; \
ebrus 0:0a673c671a56 226 case RCC_USART2CLKSOURCE_SYSCLK: \
ebrus 0:0a673c671a56 227 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
ebrus 0:0a673c671a56 228 break; \
ebrus 0:0a673c671a56 229 case RCC_USART2CLKSOURCE_LSE: \
ebrus 0:0a673c671a56 230 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
ebrus 0:0a673c671a56 231 break; \
ebrus 0:0a673c671a56 232 } \
ebrus 0:0a673c671a56 233 } \
ebrus 0:0a673c671a56 234 else if((__HANDLE__)->Instance == USART3) \
ebrus 0:0a673c671a56 235 { \
ebrus 0:0a673c671a56 236 switch(__HAL_RCC_GET_USART3_SOURCE()) \
ebrus 0:0a673c671a56 237 { \
ebrus 0:0a673c671a56 238 case RCC_USART3CLKSOURCE_PCLK1: \
ebrus 0:0a673c671a56 239 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
ebrus 0:0a673c671a56 240 break; \
ebrus 0:0a673c671a56 241 case RCC_USART3CLKSOURCE_HSI: \
ebrus 0:0a673c671a56 242 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
ebrus 0:0a673c671a56 243 break; \
ebrus 0:0a673c671a56 244 case RCC_USART3CLKSOURCE_SYSCLK: \
ebrus 0:0a673c671a56 245 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
ebrus 0:0a673c671a56 246 break; \
ebrus 0:0a673c671a56 247 case RCC_USART3CLKSOURCE_LSE: \
ebrus 0:0a673c671a56 248 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
ebrus 0:0a673c671a56 249 break; \
ebrus 0:0a673c671a56 250 } \
ebrus 0:0a673c671a56 251 } \
ebrus 0:0a673c671a56 252 } while(0)
ebrus 0:0a673c671a56 253 #else
ebrus 0:0a673c671a56 254 #define __HAL_IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
ebrus 0:0a673c671a56 255 do { \
ebrus 0:0a673c671a56 256 if((__HANDLE__)->Instance == USART1) \
ebrus 0:0a673c671a56 257 { \
ebrus 0:0a673c671a56 258 switch(__HAL_RCC_GET_USART1_SOURCE()) \
ebrus 0:0a673c671a56 259 { \
ebrus 0:0a673c671a56 260 case RCC_USART1CLKSOURCE_PCLK2: \
ebrus 0:0a673c671a56 261 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \
ebrus 0:0a673c671a56 262 break; \
ebrus 0:0a673c671a56 263 case RCC_USART1CLKSOURCE_HSI: \
ebrus 0:0a673c671a56 264 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
ebrus 0:0a673c671a56 265 break; \
ebrus 0:0a673c671a56 266 case RCC_USART1CLKSOURCE_SYSCLK: \
ebrus 0:0a673c671a56 267 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
ebrus 0:0a673c671a56 268 break; \
ebrus 0:0a673c671a56 269 case RCC_USART1CLKSOURCE_LSE: \
ebrus 0:0a673c671a56 270 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
ebrus 0:0a673c671a56 271 break; \
ebrus 0:0a673c671a56 272 } \
ebrus 0:0a673c671a56 273 } \
ebrus 0:0a673c671a56 274 else if((__HANDLE__)->Instance == USART2) \
ebrus 0:0a673c671a56 275 { \
ebrus 0:0a673c671a56 276 switch(__HAL_RCC_GET_USART2_SOURCE()) \
ebrus 0:0a673c671a56 277 { \
ebrus 0:0a673c671a56 278 case RCC_USART2CLKSOURCE_PCLK1: \
ebrus 0:0a673c671a56 279 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
ebrus 0:0a673c671a56 280 break; \
ebrus 0:0a673c671a56 281 case RCC_USART2CLKSOURCE_HSI: \
ebrus 0:0a673c671a56 282 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
ebrus 0:0a673c671a56 283 break; \
ebrus 0:0a673c671a56 284 case RCC_USART2CLKSOURCE_SYSCLK: \
ebrus 0:0a673c671a56 285 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
ebrus 0:0a673c671a56 286 break; \
ebrus 0:0a673c671a56 287 case RCC_USART2CLKSOURCE_LSE: \
ebrus 0:0a673c671a56 288 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
ebrus 0:0a673c671a56 289 break; \
ebrus 0:0a673c671a56 290 } \
ebrus 0:0a673c671a56 291 } \
ebrus 0:0a673c671a56 292 else if((__HANDLE__)->Instance == USART3) \
ebrus 0:0a673c671a56 293 { \
ebrus 0:0a673c671a56 294 switch(__HAL_RCC_GET_USART3_SOURCE()) \
ebrus 0:0a673c671a56 295 { \
ebrus 0:0a673c671a56 296 case RCC_USART3CLKSOURCE_PCLK1: \
ebrus 0:0a673c671a56 297 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
ebrus 0:0a673c671a56 298 break; \
ebrus 0:0a673c671a56 299 case RCC_USART3CLKSOURCE_HSI: \
ebrus 0:0a673c671a56 300 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
ebrus 0:0a673c671a56 301 break; \
ebrus 0:0a673c671a56 302 case RCC_USART3CLKSOURCE_SYSCLK: \
ebrus 0:0a673c671a56 303 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
ebrus 0:0a673c671a56 304 break; \
ebrus 0:0a673c671a56 305 case RCC_USART3CLKSOURCE_LSE: \
ebrus 0:0a673c671a56 306 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
ebrus 0:0a673c671a56 307 break; \
ebrus 0:0a673c671a56 308 } \
ebrus 0:0a673c671a56 309 } \
ebrus 0:0a673c671a56 310 } while(0)
ebrus 0:0a673c671a56 311 #endif /* defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F303xE) || defined(STM32F318xC) || defined(STM32F358xx) */
ebrus 0:0a673c671a56 312
ebrus 0:0a673c671a56 313
ebrus 0:0a673c671a56 314 /** @brief Computes the mask to apply to retrieve the received data
ebrus 0:0a673c671a56 315 * according to the word length and to the parity bits activation.
ebrus 0:0a673c671a56 316 * @param __HANDLE__: specifies the IRDA Handle
ebrus 0:0a673c671a56 317 * @retval none
ebrus 0:0a673c671a56 318 */
ebrus 0:0a673c671a56 319 #if defined (STM32F301x8) || defined (STM32F302x8) || defined (STM32F334x8) \
ebrus 0:0a673c671a56 320 || defined (STM32F318xx)
ebrus 0:0a673c671a56 321 #define __HAL_IRDA_MASK_COMPUTATION(__HANDLE__) \
ebrus 0:0a673c671a56 322 do { \
ebrus 0:0a673c671a56 323 if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \
ebrus 0:0a673c671a56 324 { \
ebrus 0:0a673c671a56 325 if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
ebrus 0:0a673c671a56 326 { \
ebrus 0:0a673c671a56 327 (__HANDLE__)->Mask = 0x01FF ; \
ebrus 0:0a673c671a56 328 } \
ebrus 0:0a673c671a56 329 else \
ebrus 0:0a673c671a56 330 { \
ebrus 0:0a673c671a56 331 (__HANDLE__)->Mask = 0x00FF ; \
ebrus 0:0a673c671a56 332 } \
ebrus 0:0a673c671a56 333 } \
ebrus 0:0a673c671a56 334 else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B) \
ebrus 0:0a673c671a56 335 { \
ebrus 0:0a673c671a56 336 if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
ebrus 0:0a673c671a56 337 { \
ebrus 0:0a673c671a56 338 (__HANDLE__)->Mask = 0x00FF ; \
ebrus 0:0a673c671a56 339 } \
ebrus 0:0a673c671a56 340 else \
ebrus 0:0a673c671a56 341 { \
ebrus 0:0a673c671a56 342 (__HANDLE__)->Mask = 0x007F ; \
ebrus 0:0a673c671a56 343 } \
ebrus 0:0a673c671a56 344 } \
ebrus 0:0a673c671a56 345 else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_7B) \
ebrus 0:0a673c671a56 346 { \
ebrus 0:0a673c671a56 347 if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
ebrus 0:0a673c671a56 348 { \
ebrus 0:0a673c671a56 349 (__HANDLE__)->Mask = 0x007F ; \
ebrus 0:0a673c671a56 350 } \
ebrus 0:0a673c671a56 351 else \
ebrus 0:0a673c671a56 352 { \
ebrus 0:0a673c671a56 353 (__HANDLE__)->Mask = 0x003F ; \
ebrus 0:0a673c671a56 354 } \
ebrus 0:0a673c671a56 355 } \
ebrus 0:0a673c671a56 356 } while(0)
ebrus 0:0a673c671a56 357 #else
ebrus 0:0a673c671a56 358 #define __HAL_IRDA_MASK_COMPUTATION(__HANDLE__) \
ebrus 0:0a673c671a56 359 do { \
ebrus 0:0a673c671a56 360 if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \
ebrus 0:0a673c671a56 361 { \
ebrus 0:0a673c671a56 362 if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
ebrus 0:0a673c671a56 363 { \
ebrus 0:0a673c671a56 364 (__HANDLE__)->Mask = 0x01FF ; \
ebrus 0:0a673c671a56 365 } \
ebrus 0:0a673c671a56 366 else \
ebrus 0:0a673c671a56 367 { \
ebrus 0:0a673c671a56 368 (__HANDLE__)->Mask = 0x00FF ; \
ebrus 0:0a673c671a56 369 } \
ebrus 0:0a673c671a56 370 } \
ebrus 0:0a673c671a56 371 else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B) \
ebrus 0:0a673c671a56 372 { \
ebrus 0:0a673c671a56 373 if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
ebrus 0:0a673c671a56 374 { \
ebrus 0:0a673c671a56 375 (__HANDLE__)->Mask = 0x00FF ; \
ebrus 0:0a673c671a56 376 } \
ebrus 0:0a673c671a56 377 else \
ebrus 0:0a673c671a56 378 { \
ebrus 0:0a673c671a56 379 (__HANDLE__)->Mask = 0x007F ; \
ebrus 0:0a673c671a56 380 } \
ebrus 0:0a673c671a56 381 } \
ebrus 0:0a673c671a56 382 } while(0)
ebrus 0:0a673c671a56 383 #endif /* defined (STM32F301x8) || defined (STM32F302x8) || defined (STM32F334x8)
ebrus 0:0a673c671a56 384 || defined (STM32F318xx) */
ebrus 0:0a673c671a56 385 /**
ebrus 0:0a673c671a56 386 * @}
ebrus 0:0a673c671a56 387 */
ebrus 0:0a673c671a56 388
ebrus 0:0a673c671a56 389 /* Exported functions --------------------------------------------------------*/
ebrus 0:0a673c671a56 390 /* Initialization and de-initialization functions ****************************/
ebrus 0:0a673c671a56 391 /* IO operation functions *****************************************************/
ebrus 0:0a673c671a56 392 /* Peripheral Control functions ***********************************************/
ebrus 0:0a673c671a56 393 /* Peripheral State and Error functions ***************************************/
ebrus 0:0a673c671a56 394
ebrus 0:0a673c671a56 395
ebrus 0:0a673c671a56 396 /**
ebrus 0:0a673c671a56 397 * @}
ebrus 0:0a673c671a56 398 */
ebrus 0:0a673c671a56 399
ebrus 0:0a673c671a56 400 /**
ebrus 0:0a673c671a56 401 * @}
ebrus 0:0a673c671a56 402 */
ebrus 0:0a673c671a56 403
ebrus 0:0a673c671a56 404 #ifdef __cplusplus
ebrus 0:0a673c671a56 405 }
ebrus 0:0a673c671a56 406 #endif
ebrus 0:0a673c671a56 407
ebrus 0:0a673c671a56 408 #endif /* __STM32F3xx_HAL_IRDA_EX_H */
ebrus 0:0a673c671a56 409
ebrus 0:0a673c671a56 410 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/