Emil Johnsen / mbed-src-STM32F030K6

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Fork of mbed-src by Ermanno Brusadin

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_pwr_ex.h@0:0a673c671a56, 2016-07-27 (annotated)

Committer:
ebrus
Date:
Wed Jul 27 18:35:32 2016 +0000
Revision:
0:0a673c671a56
4

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ebrus 0:0a673c671a56 1 /**
ebrus 0:0a673c671a56 2 ******************************************************************************
ebrus 0:0a673c671a56 3 * @file stm32f4xx_hal_pwr_ex.h
ebrus 0:0a673c671a56 4 * @author MCD Application Team
ebrus 0:0a673c671a56 5 * @version V1.1.0RC2
ebrus 0:0a673c671a56 6 * @date 14-May-2014
ebrus 0:0a673c671a56 7 * @brief Header file of PWR HAL Extension module.
ebrus 0:0a673c671a56 8 ******************************************************************************
ebrus 0:0a673c671a56 9 * @attention
ebrus 0:0a673c671a56 10 *
ebrus 0:0a673c671a56 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
ebrus 0:0a673c671a56 12 *
ebrus 0:0a673c671a56 13 * Redistribution and use in source and binary forms, with or without modification,
ebrus 0:0a673c671a56 14 * are permitted provided that the following conditions are met:
ebrus 0:0a673c671a56 15 * 1. Redistributions of source code must retain the above copyright notice,
ebrus 0:0a673c671a56 16 * this list of conditions and the following disclaimer.
ebrus 0:0a673c671a56 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
ebrus 0:0a673c671a56 18 * this list of conditions and the following disclaimer in the documentation
ebrus 0:0a673c671a56 19 * and/or other materials provided with the distribution.
ebrus 0:0a673c671a56 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ebrus 0:0a673c671a56 21 * may be used to endorse or promote products derived from this software
ebrus 0:0a673c671a56 22 * without specific prior written permission.
ebrus 0:0a673c671a56 23 *
ebrus 0:0a673c671a56 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ebrus 0:0a673c671a56 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ebrus 0:0a673c671a56 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ebrus 0:0a673c671a56 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ebrus 0:0a673c671a56 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ebrus 0:0a673c671a56 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ebrus 0:0a673c671a56 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ebrus 0:0a673c671a56 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ebrus 0:0a673c671a56 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ebrus 0:0a673c671a56 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ebrus 0:0a673c671a56 34 *
ebrus 0:0a673c671a56 35 ******************************************************************************
ebrus 0:0a673c671a56 36 */
ebrus 0:0a673c671a56 37
ebrus 0:0a673c671a56 38 /* Define to prevent recursive inclusion -------------------------------------*/
ebrus 0:0a673c671a56 39 #ifndef __STM32F4xx_HAL_PWR_EX_H
ebrus 0:0a673c671a56 40 #define __STM32F4xx_HAL_PWR_EX_H
ebrus 0:0a673c671a56 41
ebrus 0:0a673c671a56 42 #ifdef __cplusplus
ebrus 0:0a673c671a56 43 extern "C" {
ebrus 0:0a673c671a56 44 #endif
ebrus 0:0a673c671a56 45
ebrus 0:0a673c671a56 46 /* Includes ------------------------------------------------------------------*/
ebrus 0:0a673c671a56 47 #include "stm32f4xx_hal_def.h"
ebrus 0:0a673c671a56 48
ebrus 0:0a673c671a56 49 /** @addtogroup STM32F4xx_HAL_Driver
ebrus 0:0a673c671a56 50 * @{
ebrus 0:0a673c671a56 51 */
ebrus 0:0a673c671a56 52
ebrus 0:0a673c671a56 53 /** @addtogroup PWREx
ebrus 0:0a673c671a56 54 * @{
ebrus 0:0a673c671a56 55 */
ebrus 0:0a673c671a56 56
ebrus 0:0a673c671a56 57 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
ebrus 0:0a673c671a56 58
ebrus 0:0a673c671a56 59 /* Exported types ------------------------------------------------------------*/
ebrus 0:0a673c671a56 60 /* Exported constants --------------------------------------------------------*/
ebrus 0:0a673c671a56 61 /* ------------- PWR registers bit address in the alias region ---------------*/
ebrus 0:0a673c671a56 62 /* --- CR Register ---*/
ebrus 0:0a673c671a56 63
ebrus 0:0a673c671a56 64 /* Alias word address of ODEN bit */
ebrus 0:0a673c671a56 65 #define ODEN_BitNumber 0x10
ebrus 0:0a673c671a56 66 #define CR_ODEN_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (ODEN_BitNumber * 4))
ebrus 0:0a673c671a56 67
ebrus 0:0a673c671a56 68 /* Alias word address of ODSWEN bit */
ebrus 0:0a673c671a56 69 #define ODSWEN_BitNumber 0x11
ebrus 0:0a673c671a56 70 #define CR_ODSWEN_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (ODSWEN_BitNumber * 4))
ebrus 0:0a673c671a56 71
ebrus 0:0a673c671a56 72
ebrus 0:0a673c671a56 73 /** @defgroup PWREx_Over_Under_Drive_Flag
ebrus 0:0a673c671a56 74 * @{
ebrus 0:0a673c671a56 75 */
ebrus 0:0a673c671a56 76 #define PWR_FLAG_ODRDY PWR_CSR_ODRDY
ebrus 0:0a673c671a56 77 #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
ebrus 0:0a673c671a56 78 #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
ebrus 0:0a673c671a56 79 /**
ebrus 0:0a673c671a56 80 * @}
ebrus 0:0a673c671a56 81 */
ebrus 0:0a673c671a56 82
ebrus 0:0a673c671a56 83 /**
ebrus 0:0a673c671a56 84 * @}
ebrus 0:0a673c671a56 85 */
ebrus 0:0a673c671a56 86
ebrus 0:0a673c671a56 87 /* Exported macro ------------------------------------------------------------*/
ebrus 0:0a673c671a56 88
ebrus 0:0a673c671a56 89 /** @brief Macros to enable or disable the Over drive mode.
ebrus 0:0a673c671a56 90 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
ebrus 0:0a673c671a56 91 */
ebrus 0:0a673c671a56 92 #define __HAL_PWR_OVERDRIVE_ENABLE() (*(__IO uint32_t *) CR_ODEN_BB = ENABLE)
ebrus 0:0a673c671a56 93 #define __HAL_PWR_OVERDRIVE_DISABLE() (*(__IO uint32_t *) CR_ODEN_BB = DISABLE)
ebrus 0:0a673c671a56 94
ebrus 0:0a673c671a56 95 /** @brief Macros to enable or disable the Over drive switching.
ebrus 0:0a673c671a56 96 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
ebrus 0:0a673c671a56 97 */
ebrus 0:0a673c671a56 98 #define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = ENABLE)
ebrus 0:0a673c671a56 99 #define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = DISABLE)
ebrus 0:0a673c671a56 100
ebrus 0:0a673c671a56 101 /** @brief Macros to enable or disable the Under drive mode.
ebrus 0:0a673c671a56 102 * @note This mode is enabled only with STOP low power mode.
ebrus 0:0a673c671a56 103 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
ebrus 0:0a673c671a56 104 * mode is only available when the main regulator or the low power regulator
ebrus 0:0a673c671a56 105 * is in low voltage mode.
ebrus 0:0a673c671a56 106 * @note If the Under-drive mode was enabled, it is automatically disabled after
ebrus 0:0a673c671a56 107 * exiting Stop mode.
ebrus 0:0a673c671a56 108 * When the voltage regulator operates in Under-drive mode, an additional
ebrus 0:0a673c671a56 109 * startup delay is induced when waking up from Stop mode.
ebrus 0:0a673c671a56 110 */
ebrus 0:0a673c671a56 111 #define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR |= (uint32_t)PWR_CR_UDEN)
ebrus 0:0a673c671a56 112 #define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR &= (uint32_t)(~PWR_CR_UDEN))
ebrus 0:0a673c671a56 113
ebrus 0:0a673c671a56 114 /** @brief Check PWR flag is set or not.
ebrus 0:0a673c671a56 115 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
ebrus 0:0a673c671a56 116 * @param __FLAG__: specifies the flag to check.
ebrus 0:0a673c671a56 117 * This parameter can be one of the following values:
ebrus 0:0a673c671a56 118 * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode
ebrus 0:0a673c671a56 119 * is ready
ebrus 0:0a673c671a56 120 * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode
ebrus 0:0a673c671a56 121 * switching is ready
ebrus 0:0a673c671a56 122 * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode
ebrus 0:0a673c671a56 123 * is enabled in Stop mode
ebrus 0:0a673c671a56 124 * @retval The new state of __FLAG__ (TRUE or FALSE).
ebrus 0:0a673c671a56 125 */
ebrus 0:0a673c671a56 126 #define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
ebrus 0:0a673c671a56 127
ebrus 0:0a673c671a56 128 /** @brief Clear the Under-Drive Ready flag.
ebrus 0:0a673c671a56 129 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
ebrus 0:0a673c671a56 130 */
ebrus 0:0a673c671a56 131 #define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR |= PWR_FLAG_UDRDY)
ebrus 0:0a673c671a56 132
ebrus 0:0a673c671a56 133 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
ebrus 0:0a673c671a56 134
ebrus 0:0a673c671a56 135 /* Exported functions --------------------------------------------------------*/
ebrus 0:0a673c671a56 136 void HAL_PWREx_EnableFlashPowerDown(void);
ebrus 0:0a673c671a56 137 void HAL_PWREx_DisableFlashPowerDown(void);
ebrus 0:0a673c671a56 138 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
ebrus 0:0a673c671a56 139 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
ebrus 0:0a673c671a56 140
ebrus 0:0a673c671a56 141 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
ebrus 0:0a673c671a56 142 HAL_StatusTypeDef HAL_PWREx_ActivateOverDrive(void);
ebrus 0:0a673c671a56 143 HAL_StatusTypeDef HAL_PWREx_DeactivateOverDrive(void);
ebrus 0:0a673c671a56 144 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
ebrus 0:0a673c671a56 145
ebrus 0:0a673c671a56 146 /**
ebrus 0:0a673c671a56 147 * @}
ebrus 0:0a673c671a56 148 */
ebrus 0:0a673c671a56 149
ebrus 0:0a673c671a56 150 /**
ebrus 0:0a673c671a56 151 * @}
ebrus 0:0a673c671a56 152 */
ebrus 0:0a673c671a56 153
ebrus 0:0a673c671a56 154 #ifdef __cplusplus
ebrus 0:0a673c671a56 155 }
ebrus 0:0a673c671a56 156 #endif
ebrus 0:0a673c671a56 157
ebrus 0:0a673c671a56 158
ebrus 0:0a673c671a56 159 #endif /* __STM32F4xx_HAL_PWR_EX_H */
ebrus 0:0a673c671a56 160
ebrus 0:0a673c671a56 161 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/