Elijah Stanger-Jones
/
mbed-dev-f303
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cmsis/TARGET_CORTEX_A/core_ca_mmu.h@1:8a094db1347f, 2020-11-09 (annotated)
- Committer:
- elijahsj
- Date:
- Mon Nov 09 00:02:47 2020 -0500
- Revision:
- 1:8a094db1347f
test
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| elijahsj | 1:8a094db1347f | 1 | ;/**************************************************************************//** |
| elijahsj | 1:8a094db1347f | 2 | ; * @file core_ca_mmu.h |
| elijahsj | 1:8a094db1347f | 3 | ; * @brief MMU Startup File for A9_MP Device Series |
| elijahsj | 1:8a094db1347f | 4 | ; * @version V1.01 |
| elijahsj | 1:8a094db1347f | 5 | ; * @date 10 Sept 2014 |
| elijahsj | 1:8a094db1347f | 6 | ; * |
| elijahsj | 1:8a094db1347f | 7 | ; * @note |
| elijahsj | 1:8a094db1347f | 8 | ; * |
| elijahsj | 1:8a094db1347f | 9 | ; ******************************************************************************/ |
| elijahsj | 1:8a094db1347f | 10 | ;/* Copyright (c) 2012-2014 ARM LIMITED |
| elijahsj | 1:8a094db1347f | 11 | ; |
| elijahsj | 1:8a094db1347f | 12 | ; All rights reserved. |
| elijahsj | 1:8a094db1347f | 13 | ; Redistribution and use in source and binary forms, with or without |
| elijahsj | 1:8a094db1347f | 14 | ; modification, are permitted provided that the following conditions are met: |
| elijahsj | 1:8a094db1347f | 15 | ; - Redistributions of source code must retain the above copyright |
| elijahsj | 1:8a094db1347f | 16 | ; notice, this list of conditions and the following disclaimer. |
| elijahsj | 1:8a094db1347f | 17 | ; - Redistributions in binary form must reproduce the above copyright |
| elijahsj | 1:8a094db1347f | 18 | ; notice, this list of conditions and the following disclaimer in the |
| elijahsj | 1:8a094db1347f | 19 | ; documentation and/or other materials provided with the distribution. |
| elijahsj | 1:8a094db1347f | 20 | ; - Neither the name of ARM nor the names of its contributors may be used |
| elijahsj | 1:8a094db1347f | 21 | ; to endorse or promote products derived from this software without |
| elijahsj | 1:8a094db1347f | 22 | ; specific prior written permission. |
| elijahsj | 1:8a094db1347f | 23 | ; * |
| elijahsj | 1:8a094db1347f | 24 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| elijahsj | 1:8a094db1347f | 25 | ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| elijahsj | 1:8a094db1347f | 26 | ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| elijahsj | 1:8a094db1347f | 27 | ; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE |
| elijahsj | 1:8a094db1347f | 28 | ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| elijahsj | 1:8a094db1347f | 29 | ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| elijahsj | 1:8a094db1347f | 30 | ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| elijahsj | 1:8a094db1347f | 31 | ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| elijahsj | 1:8a094db1347f | 32 | ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| elijahsj | 1:8a094db1347f | 33 | ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| elijahsj | 1:8a094db1347f | 34 | ; POSSIBILITY OF SUCH DAMAGE. |
| elijahsj | 1:8a094db1347f | 35 | ; ---------------------------------------------------------------------------*/ |
| elijahsj | 1:8a094db1347f | 36 | |
| elijahsj | 1:8a094db1347f | 37 | #ifdef __cplusplus |
| elijahsj | 1:8a094db1347f | 38 | extern "C" { |
| elijahsj | 1:8a094db1347f | 39 | #endif |
| elijahsj | 1:8a094db1347f | 40 | |
| elijahsj | 1:8a094db1347f | 41 | #ifndef _MMU_FUNC_H |
| elijahsj | 1:8a094db1347f | 42 | #define _MMU_FUNC_H |
| elijahsj | 1:8a094db1347f | 43 | |
| elijahsj | 1:8a094db1347f | 44 | #define SECTION_DESCRIPTOR (0x2) |
| elijahsj | 1:8a094db1347f | 45 | #define SECTION_MASK (0xFFFFFFFC) |
| elijahsj | 1:8a094db1347f | 46 | |
| elijahsj | 1:8a094db1347f | 47 | #define SECTION_TEXCB_MASK (0xFFFF8FF3) |
| elijahsj | 1:8a094db1347f | 48 | #define SECTION_B_SHIFT (2) |
| elijahsj | 1:8a094db1347f | 49 | #define SECTION_C_SHIFT (3) |
| elijahsj | 1:8a094db1347f | 50 | #define SECTION_TEX0_SHIFT (12) |
| elijahsj | 1:8a094db1347f | 51 | #define SECTION_TEX1_SHIFT (13) |
| elijahsj | 1:8a094db1347f | 52 | #define SECTION_TEX2_SHIFT (14) |
| elijahsj | 1:8a094db1347f | 53 | |
| elijahsj | 1:8a094db1347f | 54 | #define SECTION_XN_MASK (0xFFFFFFEF) |
| elijahsj | 1:8a094db1347f | 55 | #define SECTION_XN_SHIFT (4) |
| elijahsj | 1:8a094db1347f | 56 | |
| elijahsj | 1:8a094db1347f | 57 | #define SECTION_DOMAIN_MASK (0xFFFFFE1F) |
| elijahsj | 1:8a094db1347f | 58 | #define SECTION_DOMAIN_SHIFT (5) |
| elijahsj | 1:8a094db1347f | 59 | |
| elijahsj | 1:8a094db1347f | 60 | #define SECTION_P_MASK (0xFFFFFDFF) |
| elijahsj | 1:8a094db1347f | 61 | #define SECTION_P_SHIFT (9) |
| elijahsj | 1:8a094db1347f | 62 | |
| elijahsj | 1:8a094db1347f | 63 | #define SECTION_AP_MASK (0xFFFF73FF) |
| elijahsj | 1:8a094db1347f | 64 | #define SECTION_AP_SHIFT (10) |
| elijahsj | 1:8a094db1347f | 65 | #define SECTION_AP2_SHIFT (15) |
| elijahsj | 1:8a094db1347f | 66 | |
| elijahsj | 1:8a094db1347f | 67 | #define SECTION_S_MASK (0xFFFEFFFF) |
| elijahsj | 1:8a094db1347f | 68 | #define SECTION_S_SHIFT (16) |
| elijahsj | 1:8a094db1347f | 69 | |
| elijahsj | 1:8a094db1347f | 70 | #define SECTION_NG_MASK (0xFFFDFFFF) |
| elijahsj | 1:8a094db1347f | 71 | #define SECTION_NG_SHIFT (17) |
| elijahsj | 1:8a094db1347f | 72 | |
| elijahsj | 1:8a094db1347f | 73 | #define SECTION_NS_MASK (0xFFF7FFFF) |
| elijahsj | 1:8a094db1347f | 74 | #define SECTION_NS_SHIFT (19) |
| elijahsj | 1:8a094db1347f | 75 | |
| elijahsj | 1:8a094db1347f | 76 | |
| elijahsj | 1:8a094db1347f | 77 | #define PAGE_L1_DESCRIPTOR (0x1) |
| elijahsj | 1:8a094db1347f | 78 | #define PAGE_L1_MASK (0xFFFFFFFC) |
| elijahsj | 1:8a094db1347f | 79 | |
| elijahsj | 1:8a094db1347f | 80 | #define PAGE_L2_4K_DESC (0x2) |
| elijahsj | 1:8a094db1347f | 81 | #define PAGE_L2_4K_MASK (0xFFFFFFFD) |
| elijahsj | 1:8a094db1347f | 82 | |
| elijahsj | 1:8a094db1347f | 83 | #define PAGE_L2_64K_DESC (0x1) |
| elijahsj | 1:8a094db1347f | 84 | #define PAGE_L2_64K_MASK (0xFFFFFFFC) |
| elijahsj | 1:8a094db1347f | 85 | |
| elijahsj | 1:8a094db1347f | 86 | #define PAGE_4K_TEXCB_MASK (0xFFFFFE33) |
| elijahsj | 1:8a094db1347f | 87 | #define PAGE_4K_B_SHIFT (2) |
| elijahsj | 1:8a094db1347f | 88 | #define PAGE_4K_C_SHIFT (3) |
| elijahsj | 1:8a094db1347f | 89 | #define PAGE_4K_TEX0_SHIFT (6) |
| elijahsj | 1:8a094db1347f | 90 | #define PAGE_4K_TEX1_SHIFT (7) |
| elijahsj | 1:8a094db1347f | 91 | #define PAGE_4K_TEX2_SHIFT (8) |
| elijahsj | 1:8a094db1347f | 92 | |
| elijahsj | 1:8a094db1347f | 93 | #define PAGE_64K_TEXCB_MASK (0xFFFF8FF3) |
| elijahsj | 1:8a094db1347f | 94 | #define PAGE_64K_B_SHIFT (2) |
| elijahsj | 1:8a094db1347f | 95 | #define PAGE_64K_C_SHIFT (3) |
| elijahsj | 1:8a094db1347f | 96 | #define PAGE_64K_TEX0_SHIFT (12) |
| elijahsj | 1:8a094db1347f | 97 | #define PAGE_64K_TEX1_SHIFT (13) |
| elijahsj | 1:8a094db1347f | 98 | #define PAGE_64K_TEX2_SHIFT (14) |
| elijahsj | 1:8a094db1347f | 99 | |
| elijahsj | 1:8a094db1347f | 100 | #define PAGE_TEXCB_MASK (0xFFFF8FF3) |
| elijahsj | 1:8a094db1347f | 101 | #define PAGE_B_SHIFT (2) |
| elijahsj | 1:8a094db1347f | 102 | #define PAGE_C_SHIFT (3) |
| elijahsj | 1:8a094db1347f | 103 | #define PAGE_TEX_SHIFT (12) |
| elijahsj | 1:8a094db1347f | 104 | |
| elijahsj | 1:8a094db1347f | 105 | #define PAGE_XN_4K_MASK (0xFFFFFFFE) |
| elijahsj | 1:8a094db1347f | 106 | #define PAGE_XN_4K_SHIFT (0) |
| elijahsj | 1:8a094db1347f | 107 | #define PAGE_XN_64K_MASK (0xFFFF7FFF) |
| elijahsj | 1:8a094db1347f | 108 | #define PAGE_XN_64K_SHIFT (15) |
| elijahsj | 1:8a094db1347f | 109 | |
| elijahsj | 1:8a094db1347f | 110 | |
| elijahsj | 1:8a094db1347f | 111 | #define PAGE_DOMAIN_MASK (0xFFFFFE1F) |
| elijahsj | 1:8a094db1347f | 112 | #define PAGE_DOMAIN_SHIFT (5) |
| elijahsj | 1:8a094db1347f | 113 | |
| elijahsj | 1:8a094db1347f | 114 | #define PAGE_P_MASK (0xFFFFFDFF) |
| elijahsj | 1:8a094db1347f | 115 | #define PAGE_P_SHIFT (9) |
| elijahsj | 1:8a094db1347f | 116 | |
| elijahsj | 1:8a094db1347f | 117 | #define PAGE_AP_MASK (0xFFFFFDCF) |
| elijahsj | 1:8a094db1347f | 118 | #define PAGE_AP_SHIFT (4) |
| elijahsj | 1:8a094db1347f | 119 | #define PAGE_AP2_SHIFT (9) |
| elijahsj | 1:8a094db1347f | 120 | |
| elijahsj | 1:8a094db1347f | 121 | #define PAGE_S_MASK (0xFFFFFBFF) |
| elijahsj | 1:8a094db1347f | 122 | #define PAGE_S_SHIFT (10) |
| elijahsj | 1:8a094db1347f | 123 | |
| elijahsj | 1:8a094db1347f | 124 | #define PAGE_NG_MASK (0xFFFFF7FF) |
| elijahsj | 1:8a094db1347f | 125 | #define PAGE_NG_SHIFT (11) |
| elijahsj | 1:8a094db1347f | 126 | |
| elijahsj | 1:8a094db1347f | 127 | #define PAGE_NS_MASK (0xFFFFFFF7) |
| elijahsj | 1:8a094db1347f | 128 | #define PAGE_NS_SHIFT (3) |
| elijahsj | 1:8a094db1347f | 129 | |
| elijahsj | 1:8a094db1347f | 130 | #define OFFSET_1M (0x00100000) |
| elijahsj | 1:8a094db1347f | 131 | #define OFFSET_64K (0x00010000) |
| elijahsj | 1:8a094db1347f | 132 | #define OFFSET_4K (0x00001000) |
| elijahsj | 1:8a094db1347f | 133 | |
| elijahsj | 1:8a094db1347f | 134 | #define DESCRIPTOR_FAULT (0x00000000) |
| elijahsj | 1:8a094db1347f | 135 | |
| elijahsj | 1:8a094db1347f | 136 | /* ########################### MMU Function Access ########################### */ |
| elijahsj | 1:8a094db1347f | 137 | /** \ingroup MMU_FunctionInterface |
| elijahsj | 1:8a094db1347f | 138 | \defgroup MMU_Functions MMU Functions Interface |
| elijahsj | 1:8a094db1347f | 139 | @{ |
| elijahsj | 1:8a094db1347f | 140 | */ |
| elijahsj | 1:8a094db1347f | 141 | |
| elijahsj | 1:8a094db1347f | 142 | /* Attributes enumerations */ |
| elijahsj | 1:8a094db1347f | 143 | |
| elijahsj | 1:8a094db1347f | 144 | /* Region size attributes */ |
| elijahsj | 1:8a094db1347f | 145 | typedef enum |
| elijahsj | 1:8a094db1347f | 146 | { |
| elijahsj | 1:8a094db1347f | 147 | SECTION, |
| elijahsj | 1:8a094db1347f | 148 | PAGE_4k, |
| elijahsj | 1:8a094db1347f | 149 | PAGE_64k, |
| elijahsj | 1:8a094db1347f | 150 | } mmu_region_size_Type; |
| elijahsj | 1:8a094db1347f | 151 | |
| elijahsj | 1:8a094db1347f | 152 | /* Region type attributes */ |
| elijahsj | 1:8a094db1347f | 153 | typedef enum |
| elijahsj | 1:8a094db1347f | 154 | { |
| elijahsj | 1:8a094db1347f | 155 | NORMAL, |
| elijahsj | 1:8a094db1347f | 156 | DEVICE, |
| elijahsj | 1:8a094db1347f | 157 | SHARED_DEVICE, |
| elijahsj | 1:8a094db1347f | 158 | NON_SHARED_DEVICE, |
| elijahsj | 1:8a094db1347f | 159 | STRONGLY_ORDERED |
| elijahsj | 1:8a094db1347f | 160 | } mmu_memory_Type; |
| elijahsj | 1:8a094db1347f | 161 | |
| elijahsj | 1:8a094db1347f | 162 | /* Region cacheability attributes */ |
| elijahsj | 1:8a094db1347f | 163 | typedef enum |
| elijahsj | 1:8a094db1347f | 164 | { |
| elijahsj | 1:8a094db1347f | 165 | NON_CACHEABLE, |
| elijahsj | 1:8a094db1347f | 166 | WB_WA, |
| elijahsj | 1:8a094db1347f | 167 | WT, |
| elijahsj | 1:8a094db1347f | 168 | WB_NO_WA, |
| elijahsj | 1:8a094db1347f | 169 | } mmu_cacheability_Type; |
| elijahsj | 1:8a094db1347f | 170 | |
| elijahsj | 1:8a094db1347f | 171 | /* Region parity check attributes */ |
| elijahsj | 1:8a094db1347f | 172 | typedef enum |
| elijahsj | 1:8a094db1347f | 173 | { |
| elijahsj | 1:8a094db1347f | 174 | ECC_DISABLED, |
| elijahsj | 1:8a094db1347f | 175 | ECC_ENABLED, |
| elijahsj | 1:8a094db1347f | 176 | } mmu_ecc_check_Type; |
| elijahsj | 1:8a094db1347f | 177 | |
| elijahsj | 1:8a094db1347f | 178 | /* Region execution attributes */ |
| elijahsj | 1:8a094db1347f | 179 | typedef enum |
| elijahsj | 1:8a094db1347f | 180 | { |
| elijahsj | 1:8a094db1347f | 181 | EXECUTE, |
| elijahsj | 1:8a094db1347f | 182 | NON_EXECUTE, |
| elijahsj | 1:8a094db1347f | 183 | } mmu_execute_Type; |
| elijahsj | 1:8a094db1347f | 184 | |
| elijahsj | 1:8a094db1347f | 185 | /* Region global attributes */ |
| elijahsj | 1:8a094db1347f | 186 | typedef enum |
| elijahsj | 1:8a094db1347f | 187 | { |
| elijahsj | 1:8a094db1347f | 188 | GLOBAL, |
| elijahsj | 1:8a094db1347f | 189 | NON_GLOBAL, |
| elijahsj | 1:8a094db1347f | 190 | } mmu_global_Type; |
| elijahsj | 1:8a094db1347f | 191 | |
| elijahsj | 1:8a094db1347f | 192 | /* Region shareability attributes */ |
| elijahsj | 1:8a094db1347f | 193 | typedef enum |
| elijahsj | 1:8a094db1347f | 194 | { |
| elijahsj | 1:8a094db1347f | 195 | NON_SHARED, |
| elijahsj | 1:8a094db1347f | 196 | SHARED, |
| elijahsj | 1:8a094db1347f | 197 | } mmu_shared_Type; |
| elijahsj | 1:8a094db1347f | 198 | |
| elijahsj | 1:8a094db1347f | 199 | /* Region security attributes */ |
| elijahsj | 1:8a094db1347f | 200 | typedef enum |
| elijahsj | 1:8a094db1347f | 201 | { |
| elijahsj | 1:8a094db1347f | 202 | SECURE, |
| elijahsj | 1:8a094db1347f | 203 | NON_SECURE, |
| elijahsj | 1:8a094db1347f | 204 | } mmu_secure_Type; |
| elijahsj | 1:8a094db1347f | 205 | |
| elijahsj | 1:8a094db1347f | 206 | /* Region access attributes */ |
| elijahsj | 1:8a094db1347f | 207 | typedef enum |
| elijahsj | 1:8a094db1347f | 208 | { |
| elijahsj | 1:8a094db1347f | 209 | NO_ACCESS, |
| elijahsj | 1:8a094db1347f | 210 | RW, |
| elijahsj | 1:8a094db1347f | 211 | READ, |
| elijahsj | 1:8a094db1347f | 212 | } mmu_access_Type; |
| elijahsj | 1:8a094db1347f | 213 | |
| elijahsj | 1:8a094db1347f | 214 | /* Memory Region definition */ |
| elijahsj | 1:8a094db1347f | 215 | typedef struct RegionStruct { |
| elijahsj | 1:8a094db1347f | 216 | mmu_region_size_Type rg_t; |
| elijahsj | 1:8a094db1347f | 217 | mmu_memory_Type mem_t; |
| elijahsj | 1:8a094db1347f | 218 | uint8_t domain; |
| elijahsj | 1:8a094db1347f | 219 | mmu_cacheability_Type inner_norm_t; |
| elijahsj | 1:8a094db1347f | 220 | mmu_cacheability_Type outer_norm_t; |
| elijahsj | 1:8a094db1347f | 221 | mmu_ecc_check_Type e_t; |
| elijahsj | 1:8a094db1347f | 222 | mmu_execute_Type xn_t; |
| elijahsj | 1:8a094db1347f | 223 | mmu_global_Type g_t; |
| elijahsj | 1:8a094db1347f | 224 | mmu_secure_Type sec_t; |
| elijahsj | 1:8a094db1347f | 225 | mmu_access_Type priv_t; |
| elijahsj | 1:8a094db1347f | 226 | mmu_access_Type user_t; |
| elijahsj | 1:8a094db1347f | 227 | mmu_shared_Type sh_t; |
| elijahsj | 1:8a094db1347f | 228 | |
| elijahsj | 1:8a094db1347f | 229 | } mmu_region_attributes_Type; |
| elijahsj | 1:8a094db1347f | 230 | |
| elijahsj | 1:8a094db1347f | 231 | /** \brief Set section execution-never attribute |
| elijahsj | 1:8a094db1347f | 232 | |
| elijahsj | 1:8a094db1347f | 233 | The function sets section execution-never attribute |
| elijahsj | 1:8a094db1347f | 234 | |
| elijahsj | 1:8a094db1347f | 235 | \param [out] descriptor_l1 L1 descriptor. |
| elijahsj | 1:8a094db1347f | 236 | \param [in] xn Section execution-never attribute : EXECUTE , NON_EXECUTE. |
| elijahsj | 1:8a094db1347f | 237 | |
| elijahsj | 1:8a094db1347f | 238 | \return 0 |
| elijahsj | 1:8a094db1347f | 239 | */ |
| elijahsj | 1:8a094db1347f | 240 | __STATIC_INLINE int __xn_section(uint32_t *descriptor_l1, mmu_execute_Type xn) |
| elijahsj | 1:8a094db1347f | 241 | { |
| elijahsj | 1:8a094db1347f | 242 | *descriptor_l1 &= SECTION_XN_MASK; |
| elijahsj | 1:8a094db1347f | 243 | *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT); |
| elijahsj | 1:8a094db1347f | 244 | return 0; |
| elijahsj | 1:8a094db1347f | 245 | } |
| elijahsj | 1:8a094db1347f | 246 | |
| elijahsj | 1:8a094db1347f | 247 | /** \brief Set section domain |
| elijahsj | 1:8a094db1347f | 248 | |
| elijahsj | 1:8a094db1347f | 249 | The function sets section domain |
| elijahsj | 1:8a094db1347f | 250 | |
| elijahsj | 1:8a094db1347f | 251 | \param [out] descriptor_l1 L1 descriptor. |
| elijahsj | 1:8a094db1347f | 252 | \param [in] domain Section domain |
| elijahsj | 1:8a094db1347f | 253 | |
| elijahsj | 1:8a094db1347f | 254 | \return 0 |
| elijahsj | 1:8a094db1347f | 255 | */ |
| elijahsj | 1:8a094db1347f | 256 | __STATIC_INLINE int __domain_section(uint32_t *descriptor_l1, uint8_t domain) |
| elijahsj | 1:8a094db1347f | 257 | { |
| elijahsj | 1:8a094db1347f | 258 | *descriptor_l1 &= SECTION_DOMAIN_MASK; |
| elijahsj | 1:8a094db1347f | 259 | *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT); |
| elijahsj | 1:8a094db1347f | 260 | return 0; |
| elijahsj | 1:8a094db1347f | 261 | } |
| elijahsj | 1:8a094db1347f | 262 | |
| elijahsj | 1:8a094db1347f | 263 | /** \brief Set section parity check |
| elijahsj | 1:8a094db1347f | 264 | |
| elijahsj | 1:8a094db1347f | 265 | The function sets section parity check |
| elijahsj | 1:8a094db1347f | 266 | |
| elijahsj | 1:8a094db1347f | 267 | \param [out] descriptor_l1 L1 descriptor. |
| elijahsj | 1:8a094db1347f | 268 | \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED |
| elijahsj | 1:8a094db1347f | 269 | |
| elijahsj | 1:8a094db1347f | 270 | \return 0 |
| elijahsj | 1:8a094db1347f | 271 | */ |
| elijahsj | 1:8a094db1347f | 272 | __STATIC_INLINE int __p_section(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit) |
| elijahsj | 1:8a094db1347f | 273 | { |
| elijahsj | 1:8a094db1347f | 274 | *descriptor_l1 &= SECTION_P_MASK; |
| elijahsj | 1:8a094db1347f | 275 | *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT); |
| elijahsj | 1:8a094db1347f | 276 | return 0; |
| elijahsj | 1:8a094db1347f | 277 | } |
| elijahsj | 1:8a094db1347f | 278 | |
| elijahsj | 1:8a094db1347f | 279 | /** \brief Set section access privileges |
| elijahsj | 1:8a094db1347f | 280 | |
| elijahsj | 1:8a094db1347f | 281 | The function sets section access privileges |
| elijahsj | 1:8a094db1347f | 282 | |
| elijahsj | 1:8a094db1347f | 283 | \param [out] descriptor_l1 L1 descriptor. |
| elijahsj | 1:8a094db1347f | 284 | \param [in] user User Level Access: NO_ACCESS, RW, READ |
| elijahsj | 1:8a094db1347f | 285 | \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ |
| elijahsj | 1:8a094db1347f | 286 | \param [in] afe Access flag enable |
| elijahsj | 1:8a094db1347f | 287 | |
| elijahsj | 1:8a094db1347f | 288 | \return 0 |
| elijahsj | 1:8a094db1347f | 289 | */ |
| elijahsj | 1:8a094db1347f | 290 | __STATIC_INLINE int __ap_section(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe) |
| elijahsj | 1:8a094db1347f | 291 | { |
| elijahsj | 1:8a094db1347f | 292 | uint32_t ap = 0; |
| elijahsj | 1:8a094db1347f | 293 | |
| elijahsj | 1:8a094db1347f | 294 | if (afe == 0) { //full access |
| elijahsj | 1:8a094db1347f | 295 | if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; } |
| elijahsj | 1:8a094db1347f | 296 | else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; } |
| elijahsj | 1:8a094db1347f | 297 | else if ((priv == RW) && (user == READ)) { ap = 0x2; } |
| elijahsj | 1:8a094db1347f | 298 | else if ((priv == RW) && (user == RW)) { ap = 0x3; } |
| elijahsj | 1:8a094db1347f | 299 | else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; } |
| elijahsj | 1:8a094db1347f | 300 | else if ((priv == READ) && (user == READ)) { ap = 0x7; } |
| elijahsj | 1:8a094db1347f | 301 | } |
| elijahsj | 1:8a094db1347f | 302 | |
| elijahsj | 1:8a094db1347f | 303 | else { //Simplified access |
| elijahsj | 1:8a094db1347f | 304 | if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; } |
| elijahsj | 1:8a094db1347f | 305 | else if ((priv == RW) && (user == RW)) { ap = 0x3; } |
| elijahsj | 1:8a094db1347f | 306 | else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; } |
| elijahsj | 1:8a094db1347f | 307 | else if ((priv == READ) && (user == READ)) { ap = 0x7; } |
| elijahsj | 1:8a094db1347f | 308 | } |
| elijahsj | 1:8a094db1347f | 309 | |
| elijahsj | 1:8a094db1347f | 310 | *descriptor_l1 &= SECTION_AP_MASK; |
| elijahsj | 1:8a094db1347f | 311 | *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT; |
| elijahsj | 1:8a094db1347f | 312 | *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT; |
| elijahsj | 1:8a094db1347f | 313 | |
| elijahsj | 1:8a094db1347f | 314 | return 0; |
| elijahsj | 1:8a094db1347f | 315 | } |
| elijahsj | 1:8a094db1347f | 316 | |
| elijahsj | 1:8a094db1347f | 317 | /** \brief Set section shareability |
| elijahsj | 1:8a094db1347f | 318 | |
| elijahsj | 1:8a094db1347f | 319 | The function sets section shareability |
| elijahsj | 1:8a094db1347f | 320 | |
| elijahsj | 1:8a094db1347f | 321 | \param [out] descriptor_l1 L1 descriptor. |
| elijahsj | 1:8a094db1347f | 322 | \param [in] s_bit Section shareability: NON_SHARED, SHARED |
| elijahsj | 1:8a094db1347f | 323 | |
| elijahsj | 1:8a094db1347f | 324 | \return 0 |
| elijahsj | 1:8a094db1347f | 325 | */ |
| elijahsj | 1:8a094db1347f | 326 | __STATIC_INLINE int __shared_section(uint32_t *descriptor_l1, mmu_shared_Type s_bit) |
| elijahsj | 1:8a094db1347f | 327 | { |
| elijahsj | 1:8a094db1347f | 328 | *descriptor_l1 &= SECTION_S_MASK; |
| elijahsj | 1:8a094db1347f | 329 | *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT); |
| elijahsj | 1:8a094db1347f | 330 | return 0; |
| elijahsj | 1:8a094db1347f | 331 | } |
| elijahsj | 1:8a094db1347f | 332 | |
| elijahsj | 1:8a094db1347f | 333 | /** \brief Set section Global attribute |
| elijahsj | 1:8a094db1347f | 334 | |
| elijahsj | 1:8a094db1347f | 335 | The function sets section Global attribute |
| elijahsj | 1:8a094db1347f | 336 | |
| elijahsj | 1:8a094db1347f | 337 | \param [out] descriptor_l1 L1 descriptor. |
| elijahsj | 1:8a094db1347f | 338 | \param [in] g_bit Section attribute: GLOBAL, NON_GLOBAL |
| elijahsj | 1:8a094db1347f | 339 | |
| elijahsj | 1:8a094db1347f | 340 | \return 0 |
| elijahsj | 1:8a094db1347f | 341 | */ |
| elijahsj | 1:8a094db1347f | 342 | __STATIC_INLINE int __global_section(uint32_t *descriptor_l1, mmu_global_Type g_bit) |
| elijahsj | 1:8a094db1347f | 343 | { |
| elijahsj | 1:8a094db1347f | 344 | *descriptor_l1 &= SECTION_NG_MASK; |
| elijahsj | 1:8a094db1347f | 345 | *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT); |
| elijahsj | 1:8a094db1347f | 346 | return 0; |
| elijahsj | 1:8a094db1347f | 347 | } |
| elijahsj | 1:8a094db1347f | 348 | |
| elijahsj | 1:8a094db1347f | 349 | /** \brief Set section Security attribute |
| elijahsj | 1:8a094db1347f | 350 | |
| elijahsj | 1:8a094db1347f | 351 | The function sets section Global attribute |
| elijahsj | 1:8a094db1347f | 352 | |
| elijahsj | 1:8a094db1347f | 353 | \param [out] descriptor_l1 L1 descriptor. |
| elijahsj | 1:8a094db1347f | 354 | \param [in] s_bit Section Security attribute: SECURE, NON_SECURE |
| elijahsj | 1:8a094db1347f | 355 | |
| elijahsj | 1:8a094db1347f | 356 | \return 0 |
| elijahsj | 1:8a094db1347f | 357 | */ |
| elijahsj | 1:8a094db1347f | 358 | __STATIC_INLINE int __secure_section(uint32_t *descriptor_l1, mmu_secure_Type s_bit) |
| elijahsj | 1:8a094db1347f | 359 | { |
| elijahsj | 1:8a094db1347f | 360 | *descriptor_l1 &= SECTION_NS_MASK; |
| elijahsj | 1:8a094db1347f | 361 | *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT); |
| elijahsj | 1:8a094db1347f | 362 | return 0; |
| elijahsj | 1:8a094db1347f | 363 | } |
| elijahsj | 1:8a094db1347f | 364 | |
| elijahsj | 1:8a094db1347f | 365 | /* Page 4k or 64k */ |
| elijahsj | 1:8a094db1347f | 366 | /** \brief Set 4k/64k page execution-never attribute |
| elijahsj | 1:8a094db1347f | 367 | |
| elijahsj | 1:8a094db1347f | 368 | The function sets 4k/64k page execution-never attribute |
| elijahsj | 1:8a094db1347f | 369 | |
| elijahsj | 1:8a094db1347f | 370 | \param [out] descriptor_l2 L2 descriptor. |
| elijahsj | 1:8a094db1347f | 371 | \param [in] xn Page execution-never attribute : EXECUTE , NON_EXECUTE. |
| elijahsj | 1:8a094db1347f | 372 | \param [in] page Page size: PAGE_4k, PAGE_64k, |
| elijahsj | 1:8a094db1347f | 373 | |
| elijahsj | 1:8a094db1347f | 374 | \return 0 |
| elijahsj | 1:8a094db1347f | 375 | */ |
| elijahsj | 1:8a094db1347f | 376 | __STATIC_INLINE int __xn_page(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page) |
| elijahsj | 1:8a094db1347f | 377 | { |
| elijahsj | 1:8a094db1347f | 378 | if (page == PAGE_4k) |
| elijahsj | 1:8a094db1347f | 379 | { |
| elijahsj | 1:8a094db1347f | 380 | *descriptor_l2 &= PAGE_XN_4K_MASK; |
| elijahsj | 1:8a094db1347f | 381 | *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT); |
| elijahsj | 1:8a094db1347f | 382 | } |
| elijahsj | 1:8a094db1347f | 383 | else |
| elijahsj | 1:8a094db1347f | 384 | { |
| elijahsj | 1:8a094db1347f | 385 | *descriptor_l2 &= PAGE_XN_64K_MASK; |
| elijahsj | 1:8a094db1347f | 386 | *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT); |
| elijahsj | 1:8a094db1347f | 387 | } |
| elijahsj | 1:8a094db1347f | 388 | return 0; |
| elijahsj | 1:8a094db1347f | 389 | } |
| elijahsj | 1:8a094db1347f | 390 | |
| elijahsj | 1:8a094db1347f | 391 | /** \brief Set 4k/64k page domain |
| elijahsj | 1:8a094db1347f | 392 | |
| elijahsj | 1:8a094db1347f | 393 | The function sets 4k/64k page domain |
| elijahsj | 1:8a094db1347f | 394 | |
| elijahsj | 1:8a094db1347f | 395 | \param [out] descriptor_l1 L1 descriptor. |
| elijahsj | 1:8a094db1347f | 396 | \param [in] domain Page domain |
| elijahsj | 1:8a094db1347f | 397 | |
| elijahsj | 1:8a094db1347f | 398 | \return 0 |
| elijahsj | 1:8a094db1347f | 399 | */ |
| elijahsj | 1:8a094db1347f | 400 | __STATIC_INLINE int __domain_page(uint32_t *descriptor_l1, uint8_t domain) |
| elijahsj | 1:8a094db1347f | 401 | { |
| elijahsj | 1:8a094db1347f | 402 | *descriptor_l1 &= PAGE_DOMAIN_MASK; |
| elijahsj | 1:8a094db1347f | 403 | *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT); |
| elijahsj | 1:8a094db1347f | 404 | return 0; |
| elijahsj | 1:8a094db1347f | 405 | } |
| elijahsj | 1:8a094db1347f | 406 | |
| elijahsj | 1:8a094db1347f | 407 | /** \brief Set 4k/64k page parity check |
| elijahsj | 1:8a094db1347f | 408 | |
| elijahsj | 1:8a094db1347f | 409 | The function sets 4k/64k page parity check |
| elijahsj | 1:8a094db1347f | 410 | |
| elijahsj | 1:8a094db1347f | 411 | \param [out] descriptor_l1 L1 descriptor. |
| elijahsj | 1:8a094db1347f | 412 | \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED |
| elijahsj | 1:8a094db1347f | 413 | |
| elijahsj | 1:8a094db1347f | 414 | \return 0 |
| elijahsj | 1:8a094db1347f | 415 | */ |
| elijahsj | 1:8a094db1347f | 416 | __STATIC_INLINE int __p_page(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit) |
| elijahsj | 1:8a094db1347f | 417 | { |
| elijahsj | 1:8a094db1347f | 418 | *descriptor_l1 &= SECTION_P_MASK; |
| elijahsj | 1:8a094db1347f | 419 | *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT); |
| elijahsj | 1:8a094db1347f | 420 | return 0; |
| elijahsj | 1:8a094db1347f | 421 | } |
| elijahsj | 1:8a094db1347f | 422 | |
| elijahsj | 1:8a094db1347f | 423 | /** \brief Set 4k/64k page access privileges |
| elijahsj | 1:8a094db1347f | 424 | |
| elijahsj | 1:8a094db1347f | 425 | The function sets 4k/64k page access privileges |
| elijahsj | 1:8a094db1347f | 426 | |
| elijahsj | 1:8a094db1347f | 427 | \param [out] descriptor_l2 L2 descriptor. |
| elijahsj | 1:8a094db1347f | 428 | \param [in] user User Level Access: NO_ACCESS, RW, READ |
| elijahsj | 1:8a094db1347f | 429 | \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ |
| elijahsj | 1:8a094db1347f | 430 | \param [in] afe Access flag enable |
| elijahsj | 1:8a094db1347f | 431 | |
| elijahsj | 1:8a094db1347f | 432 | \return 0 |
| elijahsj | 1:8a094db1347f | 433 | */ |
| elijahsj | 1:8a094db1347f | 434 | __STATIC_INLINE int __ap_page(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe) |
| elijahsj | 1:8a094db1347f | 435 | { |
| elijahsj | 1:8a094db1347f | 436 | uint32_t ap = 0; |
| elijahsj | 1:8a094db1347f | 437 | |
| elijahsj | 1:8a094db1347f | 438 | if (afe == 0) { //full access |
| elijahsj | 1:8a094db1347f | 439 | if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; } |
| elijahsj | 1:8a094db1347f | 440 | else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; } |
| elijahsj | 1:8a094db1347f | 441 | else if ((priv == RW) && (user == READ)) { ap = 0x2; } |
| elijahsj | 1:8a094db1347f | 442 | else if ((priv == RW) && (user == RW)) { ap = 0x3; } |
| elijahsj | 1:8a094db1347f | 443 | else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; } |
| elijahsj | 1:8a094db1347f | 444 | else if ((priv == READ) && (user == READ)) { ap = 0x6; } |
| elijahsj | 1:8a094db1347f | 445 | } |
| elijahsj | 1:8a094db1347f | 446 | |
| elijahsj | 1:8a094db1347f | 447 | else { //Simplified access |
| elijahsj | 1:8a094db1347f | 448 | if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; } |
| elijahsj | 1:8a094db1347f | 449 | else if ((priv == RW) && (user == RW)) { ap = 0x3; } |
| elijahsj | 1:8a094db1347f | 450 | else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; } |
| elijahsj | 1:8a094db1347f | 451 | else if ((priv == READ) && (user == READ)) { ap = 0x7; } |
| elijahsj | 1:8a094db1347f | 452 | } |
| elijahsj | 1:8a094db1347f | 453 | |
| elijahsj | 1:8a094db1347f | 454 | *descriptor_l2 &= PAGE_AP_MASK; |
| elijahsj | 1:8a094db1347f | 455 | *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT; |
| elijahsj | 1:8a094db1347f | 456 | *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT; |
| elijahsj | 1:8a094db1347f | 457 | |
| elijahsj | 1:8a094db1347f | 458 | return 0; |
| elijahsj | 1:8a094db1347f | 459 | } |
| elijahsj | 1:8a094db1347f | 460 | |
| elijahsj | 1:8a094db1347f | 461 | /** \brief Set 4k/64k page shareability |
| elijahsj | 1:8a094db1347f | 462 | |
| elijahsj | 1:8a094db1347f | 463 | The function sets 4k/64k page shareability |
| elijahsj | 1:8a094db1347f | 464 | |
| elijahsj | 1:8a094db1347f | 465 | \param [out] descriptor_l2 L2 descriptor. |
| elijahsj | 1:8a094db1347f | 466 | \param [in] s_bit 4k/64k page shareability: NON_SHARED, SHARED |
| elijahsj | 1:8a094db1347f | 467 | |
| elijahsj | 1:8a094db1347f | 468 | \return 0 |
| elijahsj | 1:8a094db1347f | 469 | */ |
| elijahsj | 1:8a094db1347f | 470 | __STATIC_INLINE int __shared_page(uint32_t *descriptor_l2, mmu_shared_Type s_bit) |
| elijahsj | 1:8a094db1347f | 471 | { |
| elijahsj | 1:8a094db1347f | 472 | *descriptor_l2 &= PAGE_S_MASK; |
| elijahsj | 1:8a094db1347f | 473 | *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT); |
| elijahsj | 1:8a094db1347f | 474 | return 0; |
| elijahsj | 1:8a094db1347f | 475 | } |
| elijahsj | 1:8a094db1347f | 476 | |
| elijahsj | 1:8a094db1347f | 477 | /** \brief Set 4k/64k page Global attribute |
| elijahsj | 1:8a094db1347f | 478 | |
| elijahsj | 1:8a094db1347f | 479 | The function sets 4k/64k page Global attribute |
| elijahsj | 1:8a094db1347f | 480 | |
| elijahsj | 1:8a094db1347f | 481 | \param [out] descriptor_l2 L2 descriptor. |
| elijahsj | 1:8a094db1347f | 482 | \param [in] g_bit 4k/64k page attribute: GLOBAL, NON_GLOBAL |
| elijahsj | 1:8a094db1347f | 483 | |
| elijahsj | 1:8a094db1347f | 484 | \return 0 |
| elijahsj | 1:8a094db1347f | 485 | */ |
| elijahsj | 1:8a094db1347f | 486 | __STATIC_INLINE int __global_page(uint32_t *descriptor_l2, mmu_global_Type g_bit) |
| elijahsj | 1:8a094db1347f | 487 | { |
| elijahsj | 1:8a094db1347f | 488 | *descriptor_l2 &= PAGE_NG_MASK; |
| elijahsj | 1:8a094db1347f | 489 | *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT); |
| elijahsj | 1:8a094db1347f | 490 | return 0; |
| elijahsj | 1:8a094db1347f | 491 | } |
| elijahsj | 1:8a094db1347f | 492 | |
| elijahsj | 1:8a094db1347f | 493 | /** \brief Set 4k/64k page Security attribute |
| elijahsj | 1:8a094db1347f | 494 | |
| elijahsj | 1:8a094db1347f | 495 | The function sets 4k/64k page Global attribute |
| elijahsj | 1:8a094db1347f | 496 | |
| elijahsj | 1:8a094db1347f | 497 | \param [out] descriptor_l1 L1 descriptor. |
| elijahsj | 1:8a094db1347f | 498 | \param [in] s_bit 4k/64k page Security attribute: SECURE, NON_SECURE |
| elijahsj | 1:8a094db1347f | 499 | |
| elijahsj | 1:8a094db1347f | 500 | \return 0 |
| elijahsj | 1:8a094db1347f | 501 | */ |
| elijahsj | 1:8a094db1347f | 502 | __STATIC_INLINE int __secure_page(uint32_t *descriptor_l1, mmu_secure_Type s_bit) |
| elijahsj | 1:8a094db1347f | 503 | { |
| elijahsj | 1:8a094db1347f | 504 | *descriptor_l1 &= PAGE_NS_MASK; |
| elijahsj | 1:8a094db1347f | 505 | *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT); |
| elijahsj | 1:8a094db1347f | 506 | return 0; |
| elijahsj | 1:8a094db1347f | 507 | } |
| elijahsj | 1:8a094db1347f | 508 | |
| elijahsj | 1:8a094db1347f | 509 | |
| elijahsj | 1:8a094db1347f | 510 | /** \brief Set Section memory attributes |
| elijahsj | 1:8a094db1347f | 511 | |
| elijahsj | 1:8a094db1347f | 512 | The function sets section memory attributes |
| elijahsj | 1:8a094db1347f | 513 | |
| elijahsj | 1:8a094db1347f | 514 | \param [out] descriptor_l1 L1 descriptor. |
| elijahsj | 1:8a094db1347f | 515 | \param [in] mem Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED |
| elijahsj | 1:8a094db1347f | 516 | \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA, |
| elijahsj | 1:8a094db1347f | 517 | \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA, |
| elijahsj | 1:8a094db1347f | 518 | |
| elijahsj | 1:8a094db1347f | 519 | \return 0 |
| elijahsj | 1:8a094db1347f | 520 | */ |
| elijahsj | 1:8a094db1347f | 521 | __STATIC_INLINE int __memory_section(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner) |
| elijahsj | 1:8a094db1347f | 522 | { |
| elijahsj | 1:8a094db1347f | 523 | *descriptor_l1 &= SECTION_TEXCB_MASK; |
| elijahsj | 1:8a094db1347f | 524 | |
| elijahsj | 1:8a094db1347f | 525 | if (STRONGLY_ORDERED == mem) |
| elijahsj | 1:8a094db1347f | 526 | { |
| elijahsj | 1:8a094db1347f | 527 | return 0; |
| elijahsj | 1:8a094db1347f | 528 | } |
| elijahsj | 1:8a094db1347f | 529 | else if (SHARED_DEVICE == mem) |
| elijahsj | 1:8a094db1347f | 530 | { |
| elijahsj | 1:8a094db1347f | 531 | *descriptor_l1 |= (1 << SECTION_B_SHIFT); |
| elijahsj | 1:8a094db1347f | 532 | } |
| elijahsj | 1:8a094db1347f | 533 | else if (NON_SHARED_DEVICE == mem) |
| elijahsj | 1:8a094db1347f | 534 | { |
| elijahsj | 1:8a094db1347f | 535 | *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT); |
| elijahsj | 1:8a094db1347f | 536 | } |
| elijahsj | 1:8a094db1347f | 537 | else if (NORMAL == mem) |
| elijahsj | 1:8a094db1347f | 538 | { |
| elijahsj | 1:8a094db1347f | 539 | *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT; |
| elijahsj | 1:8a094db1347f | 540 | switch(inner) |
| elijahsj | 1:8a094db1347f | 541 | { |
| elijahsj | 1:8a094db1347f | 542 | case NON_CACHEABLE: |
| elijahsj | 1:8a094db1347f | 543 | break; |
| elijahsj | 1:8a094db1347f | 544 | case WB_WA: |
| elijahsj | 1:8a094db1347f | 545 | *descriptor_l1 |= (1 << SECTION_B_SHIFT); |
| elijahsj | 1:8a094db1347f | 546 | break; |
| elijahsj | 1:8a094db1347f | 547 | case WT: |
| elijahsj | 1:8a094db1347f | 548 | *descriptor_l1 |= 1 << SECTION_C_SHIFT; |
| elijahsj | 1:8a094db1347f | 549 | break; |
| elijahsj | 1:8a094db1347f | 550 | case WB_NO_WA: |
| elijahsj | 1:8a094db1347f | 551 | *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT); |
| elijahsj | 1:8a094db1347f | 552 | break; |
| elijahsj | 1:8a094db1347f | 553 | } |
| elijahsj | 1:8a094db1347f | 554 | switch(outer) |
| elijahsj | 1:8a094db1347f | 555 | { |
| elijahsj | 1:8a094db1347f | 556 | case NON_CACHEABLE: |
| elijahsj | 1:8a094db1347f | 557 | break; |
| elijahsj | 1:8a094db1347f | 558 | case WB_WA: |
| elijahsj | 1:8a094db1347f | 559 | *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT); |
| elijahsj | 1:8a094db1347f | 560 | break; |
| elijahsj | 1:8a094db1347f | 561 | case WT: |
| elijahsj | 1:8a094db1347f | 562 | *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT; |
| elijahsj | 1:8a094db1347f | 563 | break; |
| elijahsj | 1:8a094db1347f | 564 | case WB_NO_WA: |
| elijahsj | 1:8a094db1347f | 565 | *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT); |
| elijahsj | 1:8a094db1347f | 566 | break; |
| elijahsj | 1:8a094db1347f | 567 | } |
| elijahsj | 1:8a094db1347f | 568 | } |
| elijahsj | 1:8a094db1347f | 569 | |
| elijahsj | 1:8a094db1347f | 570 | return 0; |
| elijahsj | 1:8a094db1347f | 571 | } |
| elijahsj | 1:8a094db1347f | 572 | |
| elijahsj | 1:8a094db1347f | 573 | /** \brief Set 4k/64k page memory attributes |
| elijahsj | 1:8a094db1347f | 574 | |
| elijahsj | 1:8a094db1347f | 575 | The function sets 4k/64k page memory attributes |
| elijahsj | 1:8a094db1347f | 576 | |
| elijahsj | 1:8a094db1347f | 577 | \param [out] descriptor_l2 L2 descriptor. |
| elijahsj | 1:8a094db1347f | 578 | \param [in] mem 4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED |
| elijahsj | 1:8a094db1347f | 579 | \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA, |
| elijahsj | 1:8a094db1347f | 580 | \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA, |
| elijahsj | 1:8a094db1347f | 581 | |
| elijahsj | 1:8a094db1347f | 582 | \return 0 |
| elijahsj | 1:8a094db1347f | 583 | */ |
| elijahsj | 1:8a094db1347f | 584 | __STATIC_INLINE int __memory_page(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page) |
| elijahsj | 1:8a094db1347f | 585 | { |
| elijahsj | 1:8a094db1347f | 586 | *descriptor_l2 &= PAGE_4K_TEXCB_MASK; |
| elijahsj | 1:8a094db1347f | 587 | |
| elijahsj | 1:8a094db1347f | 588 | if (page == PAGE_64k) |
| elijahsj | 1:8a094db1347f | 589 | { |
| elijahsj | 1:8a094db1347f | 590 | //same as section |
| elijahsj | 1:8a094db1347f | 591 | __memory_section(descriptor_l2, mem, outer, inner); |
| elijahsj | 1:8a094db1347f | 592 | } |
| elijahsj | 1:8a094db1347f | 593 | else |
| elijahsj | 1:8a094db1347f | 594 | { |
| elijahsj | 1:8a094db1347f | 595 | if (STRONGLY_ORDERED == mem) |
| elijahsj | 1:8a094db1347f | 596 | { |
| elijahsj | 1:8a094db1347f | 597 | return 0; |
| elijahsj | 1:8a094db1347f | 598 | } |
| elijahsj | 1:8a094db1347f | 599 | else if (SHARED_DEVICE == mem) |
| elijahsj | 1:8a094db1347f | 600 | { |
| elijahsj | 1:8a094db1347f | 601 | *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT); |
| elijahsj | 1:8a094db1347f | 602 | } |
| elijahsj | 1:8a094db1347f | 603 | else if (NON_SHARED_DEVICE == mem) |
| elijahsj | 1:8a094db1347f | 604 | { |
| elijahsj | 1:8a094db1347f | 605 | *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT); |
| elijahsj | 1:8a094db1347f | 606 | } |
| elijahsj | 1:8a094db1347f | 607 | else if (NORMAL == mem) |
| elijahsj | 1:8a094db1347f | 608 | { |
| elijahsj | 1:8a094db1347f | 609 | *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT; |
| elijahsj | 1:8a094db1347f | 610 | switch(inner) |
| elijahsj | 1:8a094db1347f | 611 | { |
| elijahsj | 1:8a094db1347f | 612 | case NON_CACHEABLE: |
| elijahsj | 1:8a094db1347f | 613 | break; |
| elijahsj | 1:8a094db1347f | 614 | case WB_WA: |
| elijahsj | 1:8a094db1347f | 615 | *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT); |
| elijahsj | 1:8a094db1347f | 616 | break; |
| elijahsj | 1:8a094db1347f | 617 | case WT: |
| elijahsj | 1:8a094db1347f | 618 | *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT; |
| elijahsj | 1:8a094db1347f | 619 | break; |
| elijahsj | 1:8a094db1347f | 620 | case WB_NO_WA: |
| elijahsj | 1:8a094db1347f | 621 | *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT); |
| elijahsj | 1:8a094db1347f | 622 | break; |
| elijahsj | 1:8a094db1347f | 623 | } |
| elijahsj | 1:8a094db1347f | 624 | switch(outer) |
| elijahsj | 1:8a094db1347f | 625 | { |
| elijahsj | 1:8a094db1347f | 626 | case NON_CACHEABLE: |
| elijahsj | 1:8a094db1347f | 627 | break; |
| elijahsj | 1:8a094db1347f | 628 | case WB_WA: |
| elijahsj | 1:8a094db1347f | 629 | *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT); |
| elijahsj | 1:8a094db1347f | 630 | break; |
| elijahsj | 1:8a094db1347f | 631 | case WT: |
| elijahsj | 1:8a094db1347f | 632 | *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT; |
| elijahsj | 1:8a094db1347f | 633 | break; |
| elijahsj | 1:8a094db1347f | 634 | case WB_NO_WA: |
| elijahsj | 1:8a094db1347f | 635 | *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX0_SHIFT); |
| elijahsj | 1:8a094db1347f | 636 | break; |
| elijahsj | 1:8a094db1347f | 637 | } |
| elijahsj | 1:8a094db1347f | 638 | } |
| elijahsj | 1:8a094db1347f | 639 | } |
| elijahsj | 1:8a094db1347f | 640 | |
| elijahsj | 1:8a094db1347f | 641 | return 0; |
| elijahsj | 1:8a094db1347f | 642 | } |
| elijahsj | 1:8a094db1347f | 643 | |
| elijahsj | 1:8a094db1347f | 644 | /** \brief Create a L1 section descriptor |
| elijahsj | 1:8a094db1347f | 645 | |
| elijahsj | 1:8a094db1347f | 646 | The function creates a section descriptor. |
| elijahsj | 1:8a094db1347f | 647 | |
| elijahsj | 1:8a094db1347f | 648 | Assumptions: |
| elijahsj | 1:8a094db1347f | 649 | - 16MB super sections not supported |
| elijahsj | 1:8a094db1347f | 650 | - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor |
| elijahsj | 1:8a094db1347f | 651 | - Functions always return 0 |
| elijahsj | 1:8a094db1347f | 652 | |
| elijahsj | 1:8a094db1347f | 653 | \param [out] descriptor L1 descriptor |
| elijahsj | 1:8a094db1347f | 654 | \param [out] descriptor2 L2 descriptor |
| elijahsj | 1:8a094db1347f | 655 | \param [in] reg Section attributes |
| elijahsj | 1:8a094db1347f | 656 | |
| elijahsj | 1:8a094db1347f | 657 | \return 0 |
| elijahsj | 1:8a094db1347f | 658 | */ |
| elijahsj | 1:8a094db1347f | 659 | __STATIC_INLINE int __get_section_descriptor(uint32_t *descriptor, mmu_region_attributes_Type reg) |
| elijahsj | 1:8a094db1347f | 660 | { |
| elijahsj | 1:8a094db1347f | 661 | *descriptor = 0; |
| elijahsj | 1:8a094db1347f | 662 | |
| elijahsj | 1:8a094db1347f | 663 | __memory_section(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t); |
| elijahsj | 1:8a094db1347f | 664 | __xn_section(descriptor,reg.xn_t); |
| elijahsj | 1:8a094db1347f | 665 | __domain_section(descriptor, reg.domain); |
| elijahsj | 1:8a094db1347f | 666 | __p_section(descriptor, reg.e_t); |
| elijahsj | 1:8a094db1347f | 667 | __ap_section(descriptor, reg.priv_t, reg.user_t, 1); |
| elijahsj | 1:8a094db1347f | 668 | __shared_section(descriptor,reg.sh_t); |
| elijahsj | 1:8a094db1347f | 669 | __global_section(descriptor,reg.g_t); |
| elijahsj | 1:8a094db1347f | 670 | __secure_section(descriptor,reg.sec_t); |
| elijahsj | 1:8a094db1347f | 671 | *descriptor &= SECTION_MASK; |
| elijahsj | 1:8a094db1347f | 672 | *descriptor |= SECTION_DESCRIPTOR; |
| elijahsj | 1:8a094db1347f | 673 | |
| elijahsj | 1:8a094db1347f | 674 | return 0; |
| elijahsj | 1:8a094db1347f | 675 | |
| elijahsj | 1:8a094db1347f | 676 | } |
| elijahsj | 1:8a094db1347f | 677 | |
| elijahsj | 1:8a094db1347f | 678 | |
| elijahsj | 1:8a094db1347f | 679 | /** \brief Create a L1 and L2 4k/64k page descriptor |
| elijahsj | 1:8a094db1347f | 680 | |
| elijahsj | 1:8a094db1347f | 681 | The function creates a 4k/64k page descriptor. |
| elijahsj | 1:8a094db1347f | 682 | Assumptions: |
| elijahsj | 1:8a094db1347f | 683 | - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor |
| elijahsj | 1:8a094db1347f | 684 | - Functions always return 0 |
| elijahsj | 1:8a094db1347f | 685 | |
| elijahsj | 1:8a094db1347f | 686 | \param [out] descriptor L1 descriptor |
| elijahsj | 1:8a094db1347f | 687 | \param [out] descriptor2 L2 descriptor |
| elijahsj | 1:8a094db1347f | 688 | \param [in] reg 4k/64k page attributes |
| elijahsj | 1:8a094db1347f | 689 | |
| elijahsj | 1:8a094db1347f | 690 | \return 0 |
| elijahsj | 1:8a094db1347f | 691 | */ |
| elijahsj | 1:8a094db1347f | 692 | __STATIC_INLINE int __get_page_descriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg) |
| elijahsj | 1:8a094db1347f | 693 | { |
| elijahsj | 1:8a094db1347f | 694 | *descriptor = 0; |
| elijahsj | 1:8a094db1347f | 695 | *descriptor2 = 0; |
| elijahsj | 1:8a094db1347f | 696 | |
| elijahsj | 1:8a094db1347f | 697 | switch (reg.rg_t) |
| elijahsj | 1:8a094db1347f | 698 | { |
| elijahsj | 1:8a094db1347f | 699 | case PAGE_4k: |
| elijahsj | 1:8a094db1347f | 700 | __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k); |
| elijahsj | 1:8a094db1347f | 701 | __xn_page(descriptor2, reg.xn_t, PAGE_4k); |
| elijahsj | 1:8a094db1347f | 702 | __domain_page(descriptor, reg.domain); |
| elijahsj | 1:8a094db1347f | 703 | __p_page(descriptor, reg.e_t); |
| elijahsj | 1:8a094db1347f | 704 | __ap_page(descriptor2, reg.priv_t, reg.user_t, 1); |
| elijahsj | 1:8a094db1347f | 705 | __shared_page(descriptor2,reg.sh_t); |
| elijahsj | 1:8a094db1347f | 706 | __global_page(descriptor2,reg.g_t); |
| elijahsj | 1:8a094db1347f | 707 | __secure_page(descriptor,reg.sec_t); |
| elijahsj | 1:8a094db1347f | 708 | *descriptor &= PAGE_L1_MASK; |
| elijahsj | 1:8a094db1347f | 709 | *descriptor |= PAGE_L1_DESCRIPTOR; |
| elijahsj | 1:8a094db1347f | 710 | *descriptor2 &= PAGE_L2_4K_MASK; |
| elijahsj | 1:8a094db1347f | 711 | *descriptor2 |= PAGE_L2_4K_DESC; |
| elijahsj | 1:8a094db1347f | 712 | break; |
| elijahsj | 1:8a094db1347f | 713 | |
| elijahsj | 1:8a094db1347f | 714 | case PAGE_64k: |
| elijahsj | 1:8a094db1347f | 715 | __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k); |
| elijahsj | 1:8a094db1347f | 716 | __xn_page(descriptor2, reg.xn_t, PAGE_64k); |
| elijahsj | 1:8a094db1347f | 717 | __domain_page(descriptor, reg.domain); |
| elijahsj | 1:8a094db1347f | 718 | __p_page(descriptor, reg.e_t); |
| elijahsj | 1:8a094db1347f | 719 | __ap_page(descriptor2, reg.priv_t, reg.user_t, 1); |
| elijahsj | 1:8a094db1347f | 720 | __shared_page(descriptor2,reg.sh_t); |
| elijahsj | 1:8a094db1347f | 721 | __global_page(descriptor2,reg.g_t); |
| elijahsj | 1:8a094db1347f | 722 | __secure_page(descriptor,reg.sec_t); |
| elijahsj | 1:8a094db1347f | 723 | *descriptor &= PAGE_L1_MASK; |
| elijahsj | 1:8a094db1347f | 724 | *descriptor |= PAGE_L1_DESCRIPTOR; |
| elijahsj | 1:8a094db1347f | 725 | *descriptor2 &= PAGE_L2_64K_MASK; |
| elijahsj | 1:8a094db1347f | 726 | *descriptor2 |= PAGE_L2_64K_DESC; |
| elijahsj | 1:8a094db1347f | 727 | break; |
| elijahsj | 1:8a094db1347f | 728 | |
| elijahsj | 1:8a094db1347f | 729 | case SECTION: |
| elijahsj | 1:8a094db1347f | 730 | //error |
| elijahsj | 1:8a094db1347f | 731 | break; |
| elijahsj | 1:8a094db1347f | 732 | |
| elijahsj | 1:8a094db1347f | 733 | } |
| elijahsj | 1:8a094db1347f | 734 | |
| elijahsj | 1:8a094db1347f | 735 | return 0; |
| elijahsj | 1:8a094db1347f | 736 | |
| elijahsj | 1:8a094db1347f | 737 | } |
| elijahsj | 1:8a094db1347f | 738 | |
| elijahsj | 1:8a094db1347f | 739 | /** \brief Create a 1MB Section |
| elijahsj | 1:8a094db1347f | 740 | |
| elijahsj | 1:8a094db1347f | 741 | \param [in] ttb Translation table base address |
| elijahsj | 1:8a094db1347f | 742 | \param [in] base_address Section base address |
| elijahsj | 1:8a094db1347f | 743 | \param [in] count Number of sections to create |
| elijahsj | 1:8a094db1347f | 744 | \param [in] descriptor_l1 L1 descriptor (region attributes) |
| elijahsj | 1:8a094db1347f | 745 | |
| elijahsj | 1:8a094db1347f | 746 | */ |
| elijahsj | 1:8a094db1347f | 747 | __STATIC_INLINE void __TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1) |
| elijahsj | 1:8a094db1347f | 748 | { |
| elijahsj | 1:8a094db1347f | 749 | uint32_t offset; |
| elijahsj | 1:8a094db1347f | 750 | uint32_t entry; |
| elijahsj | 1:8a094db1347f | 751 | uint32_t i; |
| elijahsj | 1:8a094db1347f | 752 | |
| elijahsj | 1:8a094db1347f | 753 | offset = base_address >> 20; |
| elijahsj | 1:8a094db1347f | 754 | entry = (base_address & 0xFFF00000) | descriptor_l1; |
| elijahsj | 1:8a094db1347f | 755 | |
| elijahsj | 1:8a094db1347f | 756 | //4 bytes aligned |
| elijahsj | 1:8a094db1347f | 757 | ttb = ttb + offset; |
| elijahsj | 1:8a094db1347f | 758 | |
| elijahsj | 1:8a094db1347f | 759 | for (i = 0; i < count; i++ ) |
| elijahsj | 1:8a094db1347f | 760 | { |
| elijahsj | 1:8a094db1347f | 761 | //4 bytes aligned |
| elijahsj | 1:8a094db1347f | 762 | *ttb++ = entry; |
| elijahsj | 1:8a094db1347f | 763 | entry += OFFSET_1M; |
| elijahsj | 1:8a094db1347f | 764 | } |
| elijahsj | 1:8a094db1347f | 765 | } |
| elijahsj | 1:8a094db1347f | 766 | |
| elijahsj | 1:8a094db1347f | 767 | /** \brief Create a 4k page entry |
| elijahsj | 1:8a094db1347f | 768 | |
| elijahsj | 1:8a094db1347f | 769 | \param [in] ttb L1 table base address |
| elijahsj | 1:8a094db1347f | 770 | \param [in] base_address 4k base address |
| elijahsj | 1:8a094db1347f | 771 | \param [in] count Number of 4k pages to create |
| elijahsj | 1:8a094db1347f | 772 | \param [in] descriptor_l1 L1 descriptor (region attributes) |
| elijahsj | 1:8a094db1347f | 773 | \param [in] ttb_l2 L2 table base address |
| elijahsj | 1:8a094db1347f | 774 | \param [in] descriptor_l2 L2 descriptor (region attributes) |
| elijahsj | 1:8a094db1347f | 775 | |
| elijahsj | 1:8a094db1347f | 776 | */ |
| elijahsj | 1:8a094db1347f | 777 | __STATIC_INLINE void __TTPage_4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 ) |
| elijahsj | 1:8a094db1347f | 778 | { |
| elijahsj | 1:8a094db1347f | 779 | |
| elijahsj | 1:8a094db1347f | 780 | uint32_t offset, offset2; |
| elijahsj | 1:8a094db1347f | 781 | uint32_t entry, entry2; |
| elijahsj | 1:8a094db1347f | 782 | uint32_t i; |
| elijahsj | 1:8a094db1347f | 783 | |
| elijahsj | 1:8a094db1347f | 784 | |
| elijahsj | 1:8a094db1347f | 785 | offset = base_address >> 20; |
| elijahsj | 1:8a094db1347f | 786 | entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1; |
| elijahsj | 1:8a094db1347f | 787 | |
| elijahsj | 1:8a094db1347f | 788 | //4 bytes aligned |
| elijahsj | 1:8a094db1347f | 789 | ttb += offset; |
| elijahsj | 1:8a094db1347f | 790 | //create l1_entry |
| elijahsj | 1:8a094db1347f | 791 | *ttb = entry; |
| elijahsj | 1:8a094db1347f | 792 | |
| elijahsj | 1:8a094db1347f | 793 | offset2 = (base_address & 0xff000) >> 12; |
| elijahsj | 1:8a094db1347f | 794 | ttb_l2 += offset2; |
| elijahsj | 1:8a094db1347f | 795 | entry2 = (base_address & 0xFFFFF000) | descriptor_l2; |
| elijahsj | 1:8a094db1347f | 796 | for (i = 0; i < count; i++ ) |
| elijahsj | 1:8a094db1347f | 797 | { |
| elijahsj | 1:8a094db1347f | 798 | //4 bytes aligned |
| elijahsj | 1:8a094db1347f | 799 | *ttb_l2++ = entry2; |
| elijahsj | 1:8a094db1347f | 800 | entry2 += OFFSET_4K; |
| elijahsj | 1:8a094db1347f | 801 | } |
| elijahsj | 1:8a094db1347f | 802 | } |
| elijahsj | 1:8a094db1347f | 803 | |
| elijahsj | 1:8a094db1347f | 804 | /** \brief Create a 64k page entry |
| elijahsj | 1:8a094db1347f | 805 | |
| elijahsj | 1:8a094db1347f | 806 | \param [in] ttb L1 table base address |
| elijahsj | 1:8a094db1347f | 807 | \param [in] base_address 64k base address |
| elijahsj | 1:8a094db1347f | 808 | \param [in] count Number of 64k pages to create |
| elijahsj | 1:8a094db1347f | 809 | \param [in] descriptor_l1 L1 descriptor (region attributes) |
| elijahsj | 1:8a094db1347f | 810 | \param [in] ttb_l2 L2 table base address |
| elijahsj | 1:8a094db1347f | 811 | \param [in] descriptor_l2 L2 descriptor (region attributes) |
| elijahsj | 1:8a094db1347f | 812 | |
| elijahsj | 1:8a094db1347f | 813 | */ |
| elijahsj | 1:8a094db1347f | 814 | __STATIC_INLINE void __TTPage_64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 ) |
| elijahsj | 1:8a094db1347f | 815 | { |
| elijahsj | 1:8a094db1347f | 816 | uint32_t offset, offset2; |
| elijahsj | 1:8a094db1347f | 817 | uint32_t entry, entry2; |
| elijahsj | 1:8a094db1347f | 818 | uint32_t i,j; |
| elijahsj | 1:8a094db1347f | 819 | |
| elijahsj | 1:8a094db1347f | 820 | |
| elijahsj | 1:8a094db1347f | 821 | offset = base_address >> 20; |
| elijahsj | 1:8a094db1347f | 822 | entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1; |
| elijahsj | 1:8a094db1347f | 823 | |
| elijahsj | 1:8a094db1347f | 824 | //4 bytes aligned |
| elijahsj | 1:8a094db1347f | 825 | ttb += offset; |
| elijahsj | 1:8a094db1347f | 826 | //create l1_entry |
| elijahsj | 1:8a094db1347f | 827 | *ttb = entry; |
| elijahsj | 1:8a094db1347f | 828 | |
| elijahsj | 1:8a094db1347f | 829 | offset2 = (base_address & 0xff000) >> 12; |
| elijahsj | 1:8a094db1347f | 830 | ttb_l2 += offset2; |
| elijahsj | 1:8a094db1347f | 831 | entry2 = (base_address & 0xFFFF0000) | descriptor_l2; |
| elijahsj | 1:8a094db1347f | 832 | for (i = 0; i < count; i++ ) |
| elijahsj | 1:8a094db1347f | 833 | { |
| elijahsj | 1:8a094db1347f | 834 | //create 16 entries |
| elijahsj | 1:8a094db1347f | 835 | for (j = 0; j < 16; j++) |
| elijahsj | 1:8a094db1347f | 836 | //4 bytes aligned |
| elijahsj | 1:8a094db1347f | 837 | *ttb_l2++ = entry2; |
| elijahsj | 1:8a094db1347f | 838 | entry2 += OFFSET_64K; |
| elijahsj | 1:8a094db1347f | 839 | } |
| elijahsj | 1:8a094db1347f | 840 | } |
| elijahsj | 1:8a094db1347f | 841 | |
| elijahsj | 1:8a094db1347f | 842 | /*@} end of MMU_Functions */ |
| elijahsj | 1:8a094db1347f | 843 | #endif |
| elijahsj | 1:8a094db1347f | 844 | |
| elijahsj | 1:8a094db1347f | 845 | #ifdef __cplusplus |
| elijahsj | 1:8a094db1347f | 846 | } |
| elijahsj | 1:8a094db1347f | 847 | #endif |