Elijah Orr / mbed-renbed

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

Committer:
Kojto
Date:
Wed Sep 02 14:17:43 2015 +0100
Revision:
106:ba1f97679dad
Parent:
101:7cff1c4259d7
Child:
110:165afa46840b
Release 106  of the mbed library

Changes:
- new platform - Nucleo F446RE
- STM32F4 Cube driver update v2.3.2
- ST cmsis driver v2.3.2
- nordic bugfix gcc linker start address
- lpc11u68 - bugfix for serial ports

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 101:7cff1c4259d7 1 /**
Kojto 101:7cff1c4259d7 2 ******************************************************************************
Kojto 101:7cff1c4259d7 3 * @file stm32f4xx_hal_dma2d.h
Kojto 101:7cff1c4259d7 4 * @author MCD Application Team
Kojto 106:ba1f97679dad 5 * @version V1.3.2
Kojto 106:ba1f97679dad 6 * @date 26-June-2015
Kojto 101:7cff1c4259d7 7 * @brief Header file of DMA2D HAL module.
Kojto 101:7cff1c4259d7 8 ******************************************************************************
Kojto 101:7cff1c4259d7 9 * @attention
Kojto 101:7cff1c4259d7 10 *
Kojto 101:7cff1c4259d7 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 101:7cff1c4259d7 12 *
Kojto 101:7cff1c4259d7 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 101:7cff1c4259d7 14 * are permitted provided that the following conditions are met:
Kojto 101:7cff1c4259d7 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 101:7cff1c4259d7 16 * this list of conditions and the following disclaimer.
Kojto 101:7cff1c4259d7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 101:7cff1c4259d7 18 * this list of conditions and the following disclaimer in the documentation
Kojto 101:7cff1c4259d7 19 * and/or other materials provided with the distribution.
Kojto 101:7cff1c4259d7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 101:7cff1c4259d7 21 * may be used to endorse or promote products derived from this software
Kojto 101:7cff1c4259d7 22 * without specific prior written permission.
Kojto 101:7cff1c4259d7 23 *
Kojto 101:7cff1c4259d7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 101:7cff1c4259d7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 101:7cff1c4259d7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 101:7cff1c4259d7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 101:7cff1c4259d7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 101:7cff1c4259d7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 101:7cff1c4259d7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 101:7cff1c4259d7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 101:7cff1c4259d7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 101:7cff1c4259d7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 101:7cff1c4259d7 34 *
Kojto 101:7cff1c4259d7 35 ******************************************************************************
Kojto 101:7cff1c4259d7 36 */
Kojto 101:7cff1c4259d7 37
Kojto 101:7cff1c4259d7 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 101:7cff1c4259d7 39 #ifndef __STM32F4xx_HAL_DMA2D_H
Kojto 101:7cff1c4259d7 40 #define __STM32F4xx_HAL_DMA2D_H
Kojto 101:7cff1c4259d7 41
Kojto 101:7cff1c4259d7 42 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 43 extern "C" {
Kojto 101:7cff1c4259d7 44 #endif
Kojto 101:7cff1c4259d7 45
Kojto 101:7cff1c4259d7 46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
Kojto 101:7cff1c4259d7 47 /* Includes ------------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 48 #include "stm32f4xx_hal_def.h"
Kojto 101:7cff1c4259d7 49
Kojto 101:7cff1c4259d7 50 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 101:7cff1c4259d7 51 * @{
Kojto 101:7cff1c4259d7 52 */
Kojto 101:7cff1c4259d7 53
Kojto 101:7cff1c4259d7 54 /** @defgroup DMA2D DMA2D
Kojto 101:7cff1c4259d7 55 * @brief DMA2D HAL module driver
Kojto 101:7cff1c4259d7 56 * @{
Kojto 101:7cff1c4259d7 57 */
Kojto 101:7cff1c4259d7 58
Kojto 101:7cff1c4259d7 59 /* Exported types ------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 60 /** @defgroup DMA2D_Exported_Types DMA2D Exported Types
Kojto 101:7cff1c4259d7 61 * @{
Kojto 101:7cff1c4259d7 62 */
Kojto 101:7cff1c4259d7 63 #define MAX_DMA2D_LAYER 2
Kojto 101:7cff1c4259d7 64
Kojto 101:7cff1c4259d7 65 /**
Kojto 101:7cff1c4259d7 66 * @brief DMA2D color Structure definition
Kojto 101:7cff1c4259d7 67 */
Kojto 101:7cff1c4259d7 68 typedef struct
Kojto 101:7cff1c4259d7 69 {
Kojto 101:7cff1c4259d7 70 uint32_t Blue; /*!< Configures the blue value.
Kojto 101:7cff1c4259d7 71 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
Kojto 101:7cff1c4259d7 72
Kojto 101:7cff1c4259d7 73 uint32_t Green; /*!< Configures the green value.
Kojto 101:7cff1c4259d7 74 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
Kojto 101:7cff1c4259d7 75
Kojto 101:7cff1c4259d7 76 uint32_t Red; /*!< Configures the red value.
Kojto 101:7cff1c4259d7 77 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
Kojto 101:7cff1c4259d7 78 } DMA2D_ColorTypeDef;
Kojto 101:7cff1c4259d7 79
Kojto 101:7cff1c4259d7 80 /**
Kojto 101:7cff1c4259d7 81 * @brief DMA2D CLUT Structure definition
Kojto 101:7cff1c4259d7 82 */
Kojto 101:7cff1c4259d7 83 typedef struct
Kojto 101:7cff1c4259d7 84 {
Kojto 101:7cff1c4259d7 85 uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/
Kojto 101:7cff1c4259d7 86
Kojto 101:7cff1c4259d7 87 uint32_t CLUTColorMode; /*!< configures the DMA2D CLUT color mode.
Kojto 101:7cff1c4259d7 88 This parameter can be one value of @ref DMA2D_CLUT_CM */
Kojto 101:7cff1c4259d7 89
Kojto 101:7cff1c4259d7 90 uint32_t Size; /*!< configures the DMA2D CLUT size.
Kojto 101:7cff1c4259d7 91 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
Kojto 101:7cff1c4259d7 92 } DMA2D_CLUTCfgTypeDef;
Kojto 101:7cff1c4259d7 93
Kojto 101:7cff1c4259d7 94 /**
Kojto 101:7cff1c4259d7 95 * @brief DMA2D Init structure definition
Kojto 101:7cff1c4259d7 96 */
Kojto 101:7cff1c4259d7 97 typedef struct
Kojto 101:7cff1c4259d7 98 {
Kojto 101:7cff1c4259d7 99 uint32_t Mode; /*!< configures the DMA2D transfer mode.
Kojto 101:7cff1c4259d7 100 This parameter can be one value of @ref DMA2D_Mode */
Kojto 101:7cff1c4259d7 101
Kojto 101:7cff1c4259d7 102 uint32_t ColorMode; /*!< configures the color format of the output image.
Kojto 101:7cff1c4259d7 103 This parameter can be one value of @ref DMA2D_Color_Mode */
Kojto 101:7cff1c4259d7 104
Kojto 101:7cff1c4259d7 105 uint32_t OutputOffset; /*!< Specifies the Offset value.
Kojto 101:7cff1c4259d7 106 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
Kojto 101:7cff1c4259d7 107 } DMA2D_InitTypeDef;
Kojto 101:7cff1c4259d7 108
Kojto 101:7cff1c4259d7 109 /**
Kojto 101:7cff1c4259d7 110 * @brief DMA2D Layer structure definition
Kojto 101:7cff1c4259d7 111 */
Kojto 101:7cff1c4259d7 112 typedef struct
Kojto 101:7cff1c4259d7 113 {
Kojto 101:7cff1c4259d7 114 uint32_t InputOffset; /*!< configures the DMA2D foreground offset.
Kojto 101:7cff1c4259d7 115 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
Kojto 101:7cff1c4259d7 116
Kojto 101:7cff1c4259d7 117 uint32_t InputColorMode; /*!< configures the DMA2D foreground color mode .
Kojto 101:7cff1c4259d7 118 This parameter can be one value of @ref DMA2D_Input_Color_Mode */
Kojto 101:7cff1c4259d7 119
Kojto 101:7cff1c4259d7 120 uint32_t AlphaMode; /*!< configures the DMA2D foreground alpha mode.
Kojto 101:7cff1c4259d7 121 This parameter can be one value of @ref DMA2D_ALPHA_MODE */
Kojto 101:7cff1c4259d7 122
Kojto 101:7cff1c4259d7 123 uint32_t InputAlpha; /*!< Specifies the DMA2D foreground alpha value and color value in case of A8 or A4 color mode.
Kojto 101:7cff1c4259d7 124 This parameter must be a number between Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF
Kojto 101:7cff1c4259d7 125 in case of A8 or A4 color mode (ARGB).
Kojto 101:7cff1c4259d7 126 Otherwise, This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
Kojto 101:7cff1c4259d7 127
Kojto 101:7cff1c4259d7 128 } DMA2D_LayerCfgTypeDef;
Kojto 101:7cff1c4259d7 129
Kojto 101:7cff1c4259d7 130 /**
Kojto 101:7cff1c4259d7 131 * @brief HAL DMA2D State structures definition
Kojto 101:7cff1c4259d7 132 */
Kojto 101:7cff1c4259d7 133 typedef enum
Kojto 101:7cff1c4259d7 134 {
Kojto 101:7cff1c4259d7 135 HAL_DMA2D_STATE_RESET = 0x00, /*!< DMA2D not yet initialized or disabled */
Kojto 101:7cff1c4259d7 136 HAL_DMA2D_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
Kojto 101:7cff1c4259d7 137 HAL_DMA2D_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
Kojto 101:7cff1c4259d7 138 HAL_DMA2D_STATE_TIMEOUT = 0x03, /*!< Timeout state */
Kojto 101:7cff1c4259d7 139 HAL_DMA2D_STATE_ERROR = 0x04, /*!< DMA2D state error */
Kojto 101:7cff1c4259d7 140 HAL_DMA2D_STATE_SUSPEND = 0x05 /*!< DMA2D process is suspended */
Kojto 101:7cff1c4259d7 141 }HAL_DMA2D_StateTypeDef;
Kojto 101:7cff1c4259d7 142
Kojto 101:7cff1c4259d7 143 /**
Kojto 101:7cff1c4259d7 144 * @brief DMA2D handle Structure definition
Kojto 101:7cff1c4259d7 145 */
Kojto 101:7cff1c4259d7 146 typedef struct __DMA2D_HandleTypeDef
Kojto 101:7cff1c4259d7 147 {
Kojto 101:7cff1c4259d7 148 DMA2D_TypeDef *Instance; /*!< DMA2D Register base address */
Kojto 101:7cff1c4259d7 149
Kojto 101:7cff1c4259d7 150 DMA2D_InitTypeDef Init; /*!< DMA2D communication parameters */
Kojto 101:7cff1c4259d7 151
Kojto 101:7cff1c4259d7 152 void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer complete callback */
Kojto 101:7cff1c4259d7 153
Kojto 101:7cff1c4259d7 154 void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback */
Kojto 101:7cff1c4259d7 155
Kojto 101:7cff1c4259d7 156 DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /*!< DMA2D Layers parameters */
Kojto 101:7cff1c4259d7 157
Kojto 101:7cff1c4259d7 158 HAL_LockTypeDef Lock; /*!< DMA2D Lock */
Kojto 101:7cff1c4259d7 159
Kojto 101:7cff1c4259d7 160 __IO HAL_DMA2D_StateTypeDef State; /*!< DMA2D transfer state */
Kojto 101:7cff1c4259d7 161
Kojto 101:7cff1c4259d7 162 __IO uint32_t ErrorCode; /*!< DMA2D Error code */
Kojto 101:7cff1c4259d7 163 } DMA2D_HandleTypeDef;
Kojto 101:7cff1c4259d7 164 /**
Kojto 101:7cff1c4259d7 165 * @}
Kojto 101:7cff1c4259d7 166 */
Kojto 101:7cff1c4259d7 167
Kojto 101:7cff1c4259d7 168 /* Exported constants --------------------------------------------------------*/
Kojto 101:7cff1c4259d7 169 /** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants
Kojto 101:7cff1c4259d7 170 * @{
Kojto 101:7cff1c4259d7 171 */
Kojto 101:7cff1c4259d7 172
Kojto 101:7cff1c4259d7 173 /** @defgroup DMA2D_Error_Code DMA2D Error Code
Kojto 101:7cff1c4259d7 174 * @{
Kojto 101:7cff1c4259d7 175 */
Kojto 101:7cff1c4259d7 176 #define HAL_DMA2D_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 101:7cff1c4259d7 177 #define HAL_DMA2D_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
Kojto 101:7cff1c4259d7 178 #define HAL_DMA2D_ERROR_CE ((uint32_t)0x00000002) /*!< Configuration error */
Kojto 101:7cff1c4259d7 179 #define HAL_DMA2D_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
Kojto 101:7cff1c4259d7 180 /**
Kojto 101:7cff1c4259d7 181 * @}
Kojto 101:7cff1c4259d7 182 */
Kojto 101:7cff1c4259d7 183
Kojto 101:7cff1c4259d7 184 /** @defgroup DMA2D_Mode DMA2D Mode
Kojto 101:7cff1c4259d7 185 * @{
Kojto 101:7cff1c4259d7 186 */
Kojto 101:7cff1c4259d7 187 #define DMA2D_M2M ((uint32_t)0x00000000) /*!< DMA2D memory to memory transfer mode */
Kojto 101:7cff1c4259d7 188 #define DMA2D_M2M_PFC ((uint32_t)0x00010000) /*!< DMA2D memory to memory with pixel format conversion transfer mode */
Kojto 101:7cff1c4259d7 189 #define DMA2D_M2M_BLEND ((uint32_t)0x00020000) /*!< DMA2D memory to memory with blending transfer mode */
Kojto 101:7cff1c4259d7 190 #define DMA2D_R2M ((uint32_t)0x00030000) /*!< DMA2D register to memory transfer mode */
Kojto 101:7cff1c4259d7 191 /**
Kojto 101:7cff1c4259d7 192 * @}
Kojto 101:7cff1c4259d7 193 */
Kojto 101:7cff1c4259d7 194
Kojto 101:7cff1c4259d7 195 /** @defgroup DMA2D_Color_Mode DMA2D Color Mode
Kojto 101:7cff1c4259d7 196 * @{
Kojto 101:7cff1c4259d7 197 */
Kojto 101:7cff1c4259d7 198 #define DMA2D_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D color mode */
Kojto 101:7cff1c4259d7 199 #define DMA2D_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D color mode */
Kojto 101:7cff1c4259d7 200 #define DMA2D_RGB565 ((uint32_t)0x00000002) /*!< RGB565 DMA2D color mode */
Kojto 101:7cff1c4259d7 201 #define DMA2D_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 DMA2D color mode */
Kojto 101:7cff1c4259d7 202 #define DMA2D_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 DMA2D color mode */
Kojto 101:7cff1c4259d7 203 /**
Kojto 101:7cff1c4259d7 204 * @}
Kojto 101:7cff1c4259d7 205 */
Kojto 101:7cff1c4259d7 206
Kojto 101:7cff1c4259d7 207 /** @defgroup DMA2D_COLOR_VALUE DMA2D COLOR VALUE
Kojto 101:7cff1c4259d7 208 * @{
Kojto 101:7cff1c4259d7 209 */
Kojto 101:7cff1c4259d7 210 #define COLOR_VALUE ((uint32_t)0x000000FF) /*!< color value mask */
Kojto 101:7cff1c4259d7 211 /**
Kojto 101:7cff1c4259d7 212 * @}
Kojto 101:7cff1c4259d7 213 */
Kojto 101:7cff1c4259d7 214
Kojto 101:7cff1c4259d7 215 /** @defgroup DMA2D_SIZE DMA2D SIZE
Kojto 101:7cff1c4259d7 216 * @{
Kojto 101:7cff1c4259d7 217 */
Kojto 101:7cff1c4259d7 218 #define DMA2D_PIXEL (DMA2D_NLR_PL >> 16) /*!< DMA2D pixel per line */
Kojto 101:7cff1c4259d7 219 #define DMA2D_LINE DMA2D_NLR_NL /*!< DMA2D number of line */
Kojto 101:7cff1c4259d7 220 /**
Kojto 101:7cff1c4259d7 221 * @}
Kojto 101:7cff1c4259d7 222 */
Kojto 101:7cff1c4259d7 223
Kojto 101:7cff1c4259d7 224 /** @defgroup DMA2D_Offset DMA2D Offset
Kojto 101:7cff1c4259d7 225 * @{
Kojto 101:7cff1c4259d7 226 */
Kojto 101:7cff1c4259d7 227 #define DMA2D_OFFSET DMA2D_FGOR_LO /*!< Line Offset */
Kojto 101:7cff1c4259d7 228 /**
Kojto 101:7cff1c4259d7 229 * @}
Kojto 101:7cff1c4259d7 230 */
Kojto 101:7cff1c4259d7 231
Kojto 101:7cff1c4259d7 232 /** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode
Kojto 101:7cff1c4259d7 233 * @{
Kojto 101:7cff1c4259d7 234 */
Kojto 101:7cff1c4259d7 235 #define CM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 color mode */
Kojto 101:7cff1c4259d7 236 #define CM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 color mode */
Kojto 101:7cff1c4259d7 237 #define CM_RGB565 ((uint32_t)0x00000002) /*!< RGB565 color mode */
Kojto 101:7cff1c4259d7 238 #define CM_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 color mode */
Kojto 101:7cff1c4259d7 239 #define CM_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 color mode */
Kojto 101:7cff1c4259d7 240 #define CM_L8 ((uint32_t)0x00000005) /*!< L8 color mode */
Kojto 101:7cff1c4259d7 241 #define CM_AL44 ((uint32_t)0x00000006) /*!< AL44 color mode */
Kojto 101:7cff1c4259d7 242 #define CM_AL88 ((uint32_t)0x00000007) /*!< AL88 color mode */
Kojto 101:7cff1c4259d7 243 #define CM_L4 ((uint32_t)0x00000008) /*!< L4 color mode */
Kojto 101:7cff1c4259d7 244 #define CM_A8 ((uint32_t)0x00000009) /*!< A8 color mode */
Kojto 101:7cff1c4259d7 245 #define CM_A4 ((uint32_t)0x0000000A) /*!< A4 color mode */
Kojto 101:7cff1c4259d7 246 /**
Kojto 101:7cff1c4259d7 247 * @}
Kojto 101:7cff1c4259d7 248 */
Kojto 101:7cff1c4259d7 249
Kojto 101:7cff1c4259d7 250 /** @defgroup DMA2D_ALPHA_MODE DMA2D ALPHA MODE
Kojto 101:7cff1c4259d7 251 * @{
Kojto 101:7cff1c4259d7 252 */
Kojto 101:7cff1c4259d7 253 #define DMA2D_NO_MODIF_ALPHA ((uint32_t)0x00000000) /*!< No modification of the alpha channel value */
Kojto 101:7cff1c4259d7 254 #define DMA2D_REPLACE_ALPHA ((uint32_t)0x00000001) /*!< Replace original alpha channel value by programmed alpha value */
Kojto 101:7cff1c4259d7 255 #define DMA2D_COMBINE_ALPHA ((uint32_t)0x00000002) /*!< Replace original alpha channel value by programmed alpha value
Kojto 101:7cff1c4259d7 256 with original alpha channel value */
Kojto 101:7cff1c4259d7 257 /**
Kojto 101:7cff1c4259d7 258 * @}
Kojto 101:7cff1c4259d7 259 */
Kojto 101:7cff1c4259d7 260
Kojto 101:7cff1c4259d7 261 /** @defgroup DMA2D_CLUT_CM DMA2D CLUT CM
Kojto 101:7cff1c4259d7 262 * @{
Kojto 101:7cff1c4259d7 263 */
Kojto 101:7cff1c4259d7 264 #define DMA2D_CCM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D C-LUT color mode */
Kojto 101:7cff1c4259d7 265 #define DMA2D_CCM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D C-LUT color mode */
Kojto 101:7cff1c4259d7 266 /**
Kojto 101:7cff1c4259d7 267 * @}
Kojto 101:7cff1c4259d7 268 */
Kojto 101:7cff1c4259d7 269
Kojto 101:7cff1c4259d7 270 /** @defgroup DMA2D_Size_Clut DMA2D Size Clut
Kojto 101:7cff1c4259d7 271 * @{
Kojto 101:7cff1c4259d7 272 */
Kojto 101:7cff1c4259d7 273 #define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8) /*!< DMA2D C-LUT size */
Kojto 101:7cff1c4259d7 274 /**
Kojto 101:7cff1c4259d7 275 * @}
Kojto 101:7cff1c4259d7 276 */
Kojto 101:7cff1c4259d7 277
Kojto 101:7cff1c4259d7 278 /** @defgroup DMA2D_DeadTime DMA2D DeadTime
Kojto 101:7cff1c4259d7 279 * @{
Kojto 101:7cff1c4259d7 280 */
Kojto 101:7cff1c4259d7 281 #define LINE_WATERMARK DMA2D_LWR_LW
Kojto 101:7cff1c4259d7 282 /**
Kojto 101:7cff1c4259d7 283 * @}
Kojto 101:7cff1c4259d7 284 */
Kojto 101:7cff1c4259d7 285
Kojto 101:7cff1c4259d7 286 /** @defgroup DMA2D_Interrupts DMA2D Interrupts
Kojto 101:7cff1c4259d7 287 * @{
Kojto 101:7cff1c4259d7 288 */
Kojto 101:7cff1c4259d7 289 #define DMA2D_IT_CE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
Kojto 101:7cff1c4259d7 290 #define DMA2D_IT_CTC DMA2D_CR_CTCIE /*!< C-LUT Transfer Complete Interrupt */
Kojto 101:7cff1c4259d7 291 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< C-LUT Access Error Interrupt */
Kojto 101:7cff1c4259d7 292 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
Kojto 101:7cff1c4259d7 293 #define DMA2D_IT_TC DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
Kojto 101:7cff1c4259d7 294 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
Kojto 101:7cff1c4259d7 295 /**
Kojto 101:7cff1c4259d7 296 * @}
Kojto 101:7cff1c4259d7 297 */
Kojto 101:7cff1c4259d7 298
Kojto 101:7cff1c4259d7 299 /** @defgroup DMA2D_Flag DMA2D Flag
Kojto 101:7cff1c4259d7 300 * @{
Kojto 101:7cff1c4259d7 301 */
Kojto 101:7cff1c4259d7 302 #define DMA2D_FLAG_CE DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
Kojto 101:7cff1c4259d7 303 #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /*!< C-LUT Transfer Complete Interrupt Flag */
Kojto 101:7cff1c4259d7 304 #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /*!< C-LUT Access Error Interrupt Flag */
Kojto 101:7cff1c4259d7 305 #define DMA2D_FLAG_TW DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
Kojto 101:7cff1c4259d7 306 #define DMA2D_FLAG_TC DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
Kojto 101:7cff1c4259d7 307 #define DMA2D_FLAG_TE DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
Kojto 101:7cff1c4259d7 308 /**
Kojto 101:7cff1c4259d7 309 * @}
Kojto 101:7cff1c4259d7 310 */
Kojto 101:7cff1c4259d7 311
Kojto 101:7cff1c4259d7 312 /**
Kojto 101:7cff1c4259d7 313 * @}
Kojto 101:7cff1c4259d7 314 */
Kojto 101:7cff1c4259d7 315 /* Exported macro ------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 316 /** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros
Kojto 101:7cff1c4259d7 317 * @{
Kojto 101:7cff1c4259d7 318 */
Kojto 101:7cff1c4259d7 319
Kojto 101:7cff1c4259d7 320 /** @brief Reset DMA2D handle state
Kojto 101:7cff1c4259d7 321 * @param __HANDLE__: specifies the DMA2D handle.
Kojto 101:7cff1c4259d7 322 * @retval None
Kojto 101:7cff1c4259d7 323 */
Kojto 101:7cff1c4259d7 324 #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
Kojto 101:7cff1c4259d7 325
Kojto 101:7cff1c4259d7 326 /**
Kojto 101:7cff1c4259d7 327 * @brief Enable the DMA2D.
Kojto 101:7cff1c4259d7 328 * @param __HANDLE__: DMA2D handle
Kojto 101:7cff1c4259d7 329 * @retval None.
Kojto 101:7cff1c4259d7 330 */
Kojto 101:7cff1c4259d7 331 #define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
Kojto 101:7cff1c4259d7 332
Kojto 101:7cff1c4259d7 333 /**
Kojto 101:7cff1c4259d7 334 * @brief Disable the DMA2D.
Kojto 101:7cff1c4259d7 335 * @param __HANDLE__: DMA2D handle
Kojto 101:7cff1c4259d7 336 * @retval None.
Kojto 101:7cff1c4259d7 337 */
Kojto 101:7cff1c4259d7 338 #define __HAL_DMA2D_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA2D_CR_START)
Kojto 101:7cff1c4259d7 339
Kojto 101:7cff1c4259d7 340 /* Interrupt & Flag management */
Kojto 101:7cff1c4259d7 341 /**
Kojto 101:7cff1c4259d7 342 * @brief Get the DMA2D pending flags.
Kojto 101:7cff1c4259d7 343 * @param __HANDLE__: DMA2D handle
Kojto 101:7cff1c4259d7 344 * @param __FLAG__: Get the specified flag.
Kojto 101:7cff1c4259d7 345 * This parameter can be any combination of the following values:
Kojto 101:7cff1c4259d7 346 * @arg DMA2D_FLAG_CE: Configuration error flag
Kojto 101:7cff1c4259d7 347 * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
Kojto 101:7cff1c4259d7 348 * @arg DMA2D_FLAG_CAE: C-LUT access error flag
Kojto 101:7cff1c4259d7 349 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
Kojto 101:7cff1c4259d7 350 * @arg DMA2D_FLAG_TC: Transfer complete flag
Kojto 101:7cff1c4259d7 351 * @arg DMA2D_FLAG_TE: Transfer error flag
Kojto 101:7cff1c4259d7 352 * @retval The state of FLAG.
Kojto 101:7cff1c4259d7 353 */
Kojto 101:7cff1c4259d7 354 #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
Kojto 101:7cff1c4259d7 355
Kojto 101:7cff1c4259d7 356 /**
Kojto 101:7cff1c4259d7 357 * @brief Clears the DMA2D pending flags.
Kojto 101:7cff1c4259d7 358 * @param __HANDLE__: DMA2D handle
Kojto 101:7cff1c4259d7 359 * @param __FLAG__: specifies the flag to clear.
Kojto 101:7cff1c4259d7 360 * This parameter can be any combination of the following values:
Kojto 101:7cff1c4259d7 361 * @arg DMA2D_FLAG_CE: Configuration error flag
Kojto 101:7cff1c4259d7 362 * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
Kojto 101:7cff1c4259d7 363 * @arg DMA2D_FLAG_CAE: C-LUT access error flag
Kojto 101:7cff1c4259d7 364 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
Kojto 101:7cff1c4259d7 365 * @arg DMA2D_FLAG_TC: Transfer complete flag
Kojto 101:7cff1c4259d7 366 * @arg DMA2D_FLAG_TE: Transfer error flag
Kojto 101:7cff1c4259d7 367 * @retval None
Kojto 101:7cff1c4259d7 368 */
Kojto 101:7cff1c4259d7 369 #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
Kojto 101:7cff1c4259d7 370
Kojto 101:7cff1c4259d7 371 /**
Kojto 101:7cff1c4259d7 372 * @brief Enables the specified DMA2D interrupts.
Kojto 101:7cff1c4259d7 373 * @param __HANDLE__: DMA2D handle
Kojto 101:7cff1c4259d7 374 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled.
Kojto 101:7cff1c4259d7 375 * This parameter can be any combination of the following values:
Kojto 101:7cff1c4259d7 376 * @arg DMA2D_IT_CE: Configuration error interrupt mask
Kojto 101:7cff1c4259d7 377 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
Kojto 101:7cff1c4259d7 378 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
Kojto 101:7cff1c4259d7 379 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
Kojto 101:7cff1c4259d7 380 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
Kojto 101:7cff1c4259d7 381 * @arg DMA2D_IT_TE: Transfer error interrupt mask
Kojto 101:7cff1c4259d7 382 * @retval None
Kojto 101:7cff1c4259d7 383 */
Kojto 101:7cff1c4259d7 384 #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
Kojto 101:7cff1c4259d7 385
Kojto 101:7cff1c4259d7 386 /**
Kojto 101:7cff1c4259d7 387 * @brief Disables the specified DMA2D interrupts.
Kojto 101:7cff1c4259d7 388 * @param __HANDLE__: DMA2D handle
Kojto 101:7cff1c4259d7 389 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled.
Kojto 101:7cff1c4259d7 390 * This parameter can be any combination of the following values:
Kojto 101:7cff1c4259d7 391 * @arg DMA2D_IT_CE: Configuration error interrupt mask
Kojto 101:7cff1c4259d7 392 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
Kojto 101:7cff1c4259d7 393 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
Kojto 101:7cff1c4259d7 394 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
Kojto 101:7cff1c4259d7 395 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
Kojto 101:7cff1c4259d7 396 * @arg DMA2D_IT_TE: Transfer error interrupt mask
Kojto 101:7cff1c4259d7 397 * @retval None
Kojto 101:7cff1c4259d7 398 */
Kojto 101:7cff1c4259d7 399 #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
Kojto 101:7cff1c4259d7 400
Kojto 101:7cff1c4259d7 401 /**
Kojto 101:7cff1c4259d7 402 * @brief Checks whether the specified DMA2D interrupt has occurred or not.
Kojto 101:7cff1c4259d7 403 * @param __HANDLE__: DMA2D handle
Kojto 101:7cff1c4259d7 404 * @param __INTERRUPT__: specifies the DMA2D interrupt source to check.
Kojto 101:7cff1c4259d7 405 * This parameter can be one of the following values:
Kojto 101:7cff1c4259d7 406 * @arg DMA2D_IT_CE: Configuration error interrupt mask
Kojto 101:7cff1c4259d7 407 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
Kojto 101:7cff1c4259d7 408 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
Kojto 101:7cff1c4259d7 409 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
Kojto 101:7cff1c4259d7 410 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
Kojto 101:7cff1c4259d7 411 * @arg DMA2D_IT_TE: Transfer error interrupt mask
Kojto 101:7cff1c4259d7 412 * @retval The state of INTERRUPT.
Kojto 101:7cff1c4259d7 413 */
Kojto 101:7cff1c4259d7 414 #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
Kojto 101:7cff1c4259d7 415 /**
Kojto 101:7cff1c4259d7 416 * @}
Kojto 101:7cff1c4259d7 417 */
Kojto 101:7cff1c4259d7 418
Kojto 101:7cff1c4259d7 419 /* Exported functions --------------------------------------------------------*/
Kojto 101:7cff1c4259d7 420 /** @defgroup DMA2D_Exported_Functions DMA2D Exported Functions
Kojto 101:7cff1c4259d7 421 * @{
Kojto 101:7cff1c4259d7 422 */
Kojto 101:7cff1c4259d7 423 /* Initialization and de-initialization functions *******************************/
Kojto 101:7cff1c4259d7 424 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
Kojto 101:7cff1c4259d7 425 HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
Kojto 101:7cff1c4259d7 426 void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
Kojto 101:7cff1c4259d7 427 void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
Kojto 101:7cff1c4259d7 428
Kojto 101:7cff1c4259d7 429 /* IO operation functions *******************************************************/
Kojto 101:7cff1c4259d7 430 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
Kojto 101:7cff1c4259d7 431 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
Kojto 101:7cff1c4259d7 432 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
Kojto 101:7cff1c4259d7 433 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
Kojto 101:7cff1c4259d7 434 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
Kojto 101:7cff1c4259d7 435 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
Kojto 101:7cff1c4259d7 436 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
Kojto 101:7cff1c4259d7 437 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
Kojto 101:7cff1c4259d7 438 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
Kojto 101:7cff1c4259d7 439
Kojto 101:7cff1c4259d7 440 /* Peripheral Control functions *************************************************/
Kojto 101:7cff1c4259d7 441 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
Kojto 101:7cff1c4259d7 442 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
Kojto 101:7cff1c4259d7 443 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
Kojto 101:7cff1c4259d7 444 HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
Kojto 101:7cff1c4259d7 445 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
Kojto 101:7cff1c4259d7 446
Kojto 101:7cff1c4259d7 447 /* Peripheral State functions ***************************************************/
Kojto 101:7cff1c4259d7 448 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
Kojto 101:7cff1c4259d7 449 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
Kojto 101:7cff1c4259d7 450 /**
Kojto 101:7cff1c4259d7 451 * @}
Kojto 101:7cff1c4259d7 452 */
Kojto 101:7cff1c4259d7 453
Kojto 101:7cff1c4259d7 454 /* Private types -------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 455 /** @defgroup DMA2D_Private_Types DMA2D Private Types
Kojto 101:7cff1c4259d7 456 * @{
Kojto 101:7cff1c4259d7 457 */
Kojto 101:7cff1c4259d7 458
Kojto 101:7cff1c4259d7 459 /**
Kojto 101:7cff1c4259d7 460 * @}
Kojto 101:7cff1c4259d7 461 */
Kojto 101:7cff1c4259d7 462
Kojto 101:7cff1c4259d7 463 /* Private defines -------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 464 /** @defgroup DMA2D_Private_Defines DMA2D Private Defines
Kojto 101:7cff1c4259d7 465 * @{
Kojto 101:7cff1c4259d7 466 */
Kojto 101:7cff1c4259d7 467
Kojto 101:7cff1c4259d7 468 /**
Kojto 101:7cff1c4259d7 469 * @}
Kojto 101:7cff1c4259d7 470 */
Kojto 101:7cff1c4259d7 471
Kojto 101:7cff1c4259d7 472 /* Private variables ---------------------------------------------------------*/
Kojto 101:7cff1c4259d7 473 /** @defgroup DMA2D_Private_Variables DMA2D Private Variables
Kojto 101:7cff1c4259d7 474 * @{
Kojto 101:7cff1c4259d7 475 */
Kojto 101:7cff1c4259d7 476
Kojto 101:7cff1c4259d7 477 /**
Kojto 101:7cff1c4259d7 478 * @}
Kojto 101:7cff1c4259d7 479 */
Kojto 101:7cff1c4259d7 480
Kojto 101:7cff1c4259d7 481 /* Private constants ---------------------------------------------------------*/
Kojto 101:7cff1c4259d7 482 /** @defgroup DMA2D_Private_Constants DMA2D Private Constants
Kojto 101:7cff1c4259d7 483 * @{
Kojto 101:7cff1c4259d7 484 */
Kojto 101:7cff1c4259d7 485
Kojto 101:7cff1c4259d7 486 /**
Kojto 101:7cff1c4259d7 487 * @}
Kojto 101:7cff1c4259d7 488 */
Kojto 101:7cff1c4259d7 489
Kojto 101:7cff1c4259d7 490 /* Private macros ------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 491 /** @defgroup DMA2D_Private_Macros DMA2D Private Macros
Kojto 101:7cff1c4259d7 492 * @{
Kojto 101:7cff1c4259d7 493 */
Kojto 101:7cff1c4259d7 494 #define IS_DMA2D_LAYER(LAYER) ((LAYER) <= MAX_DMA2D_LAYER)
Kojto 101:7cff1c4259d7 495 #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
Kojto 101:7cff1c4259d7 496 ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
Kojto 101:7cff1c4259d7 497 #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_ARGB8888) || ((MODE_ARGB) == DMA2D_RGB888) || \
Kojto 101:7cff1c4259d7 498 ((MODE_ARGB) == DMA2D_RGB565) || ((MODE_ARGB) == DMA2D_ARGB1555) || \
Kojto 101:7cff1c4259d7 499 ((MODE_ARGB) == DMA2D_ARGB4444))
Kojto 101:7cff1c4259d7 500 #define IS_DMA2D_COLOR(COLOR) ((COLOR) <= COLOR_VALUE)
Kojto 101:7cff1c4259d7 501 #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
Kojto 101:7cff1c4259d7 502 #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
Kojto 101:7cff1c4259d7 503 #define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
Kojto 101:7cff1c4259d7 504 #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == CM_ARGB8888) || ((INPUT_CM) == CM_RGB888) || \
Kojto 101:7cff1c4259d7 505 ((INPUT_CM) == CM_RGB565) || ((INPUT_CM) == CM_ARGB1555) || \
Kojto 101:7cff1c4259d7 506 ((INPUT_CM) == CM_ARGB4444) || ((INPUT_CM) == CM_L8) || \
Kojto 101:7cff1c4259d7 507 ((INPUT_CM) == CM_AL44) || ((INPUT_CM) == CM_AL88) || \
Kojto 101:7cff1c4259d7 508 ((INPUT_CM) == CM_L4) || ((INPUT_CM) == CM_A8) || \
Kojto 101:7cff1c4259d7 509 ((INPUT_CM) == CM_A4))
Kojto 101:7cff1c4259d7 510 #define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
Kojto 101:7cff1c4259d7 511 ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \
Kojto 101:7cff1c4259d7 512 ((AlphaMode) == DMA2D_COMBINE_ALPHA))
Kojto 101:7cff1c4259d7 513 #define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
Kojto 101:7cff1c4259d7 514 #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
Kojto 101:7cff1c4259d7 515 #define IS_DMA2D_LineWatermark(LineWatermark) ((LineWatermark) <= LINE_WATERMARK)
Kojto 101:7cff1c4259d7 516 /**
Kojto 101:7cff1c4259d7 517 * @}
Kojto 101:7cff1c4259d7 518 */
Kojto 101:7cff1c4259d7 519
Kojto 101:7cff1c4259d7 520 /* Private functions prototypes ---------------------------------------------------------*/
Kojto 101:7cff1c4259d7 521 /** @defgroup DMA2D_Private_Functions_Prototypes DMA2D Private Functions Prototypes
Kojto 101:7cff1c4259d7 522 * @{
Kojto 101:7cff1c4259d7 523 */
Kojto 101:7cff1c4259d7 524
Kojto 101:7cff1c4259d7 525 /**
Kojto 101:7cff1c4259d7 526 * @}
Kojto 101:7cff1c4259d7 527 */
Kojto 101:7cff1c4259d7 528
Kojto 101:7cff1c4259d7 529 /* Private functions ---------------------------------------------------------*/
Kojto 101:7cff1c4259d7 530 /** @defgroup DMA2D_Private_Functions DMA2D Private Functions
Kojto 101:7cff1c4259d7 531 * @{
Kojto 101:7cff1c4259d7 532 */
Kojto 101:7cff1c4259d7 533
Kojto 101:7cff1c4259d7 534 /**
Kojto 101:7cff1c4259d7 535 * @}
Kojto 101:7cff1c4259d7 536 */
Kojto 101:7cff1c4259d7 537
Kojto 101:7cff1c4259d7 538 /**
Kojto 101:7cff1c4259d7 539 * @}
Kojto 101:7cff1c4259d7 540 */
Kojto 101:7cff1c4259d7 541
Kojto 101:7cff1c4259d7 542 /**
Kojto 101:7cff1c4259d7 543 * @}
Kojto 101:7cff1c4259d7 544 */
Kojto 101:7cff1c4259d7 545
Kojto 101:7cff1c4259d7 546 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
Kojto 101:7cff1c4259d7 547
Kojto 101:7cff1c4259d7 548 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 549 }
Kojto 101:7cff1c4259d7 550 #endif
Kojto 101:7cff1c4259d7 551
Kojto 101:7cff1c4259d7 552 #endif /* __STM32F4xx_HAL_DMA2D_H */
Kojto 101:7cff1c4259d7 553
Kojto 101:7cff1c4259d7 554 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/