Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

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TARGET_NUCLEO_F401RE/stm32f4xx_hal_nand.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
110:165afa46840b 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_nand.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
Kojto 110:165afa46840b 5 * @version V1.4.1
Kojto 110:165afa46840b 6 * @date 09-October-2015
emilmont 77:869cf507173a 7 * @brief Header file of NAND HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
bogdanm 85:024bf7f99721 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_NAND_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_NAND_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 /* Includes ------------------------------------------------------------------*/
Kojto 99:dbbf35b96557 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
emilmont 77:869cf507173a 48 #include "stm32f4xx_ll_fsmc.h"
emilmont 77:869cf507173a 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
emilmont 77:869cf507173a 50
Kojto 110:165afa46840b 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 110:165afa46840b 52 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
emilmont 77:869cf507173a 53 #include "stm32f4xx_ll_fmc.h"
Kojto 110:165afa46840b 54 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
Kojto 110:165afa46840b 55 STM32F479xx */
emilmont 77:869cf507173a 56
emilmont 77:869cf507173a 57 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 58 * @{
emilmont 77:869cf507173a 59 */
emilmont 77:869cf507173a 60
emilmont 77:869cf507173a 61 /** @addtogroup NAND
emilmont 77:869cf507173a 62 * @{
emilmont 77:869cf507173a 63 */
emilmont 77:869cf507173a 64
Kojto 110:165afa46840b 65 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
Kojto 110:165afa46840b 66 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
Kojto 110:165afa46840b 67 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
Kojto 110:165afa46840b 68
bogdanm 85:024bf7f99721 69 /* Exported typedef ----------------------------------------------------------*/
emilmont 77:869cf507173a 70 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 71 /** @defgroup NAND_Exported_Types NAND Exported Types
Kojto 99:dbbf35b96557 72 * @{
Kojto 99:dbbf35b96557 73 */
emilmont 77:869cf507173a 74
emilmont 77:869cf507173a 75 /**
bogdanm 85:024bf7f99721 76 * @brief HAL NAND State structures definition
bogdanm 85:024bf7f99721 77 */
emilmont 77:869cf507173a 78 typedef enum
emilmont 77:869cf507173a 79 {
emilmont 77:869cf507173a 80 HAL_NAND_STATE_RESET = 0x00, /*!< NAND not yet initialized or disabled */
emilmont 77:869cf507173a 81 HAL_NAND_STATE_READY = 0x01, /*!< NAND initialized and ready for use */
emilmont 77:869cf507173a 82 HAL_NAND_STATE_BUSY = 0x02, /*!< NAND internal process is ongoing */
emilmont 77:869cf507173a 83 HAL_NAND_STATE_ERROR = 0x03 /*!< NAND error state */
emilmont 77:869cf507173a 84 }HAL_NAND_StateTypeDef;
emilmont 77:869cf507173a 85
emilmont 77:869cf507173a 86 /**
bogdanm 85:024bf7f99721 87 * @brief NAND Memory electronic signature Structure definition
emilmont 77:869cf507173a 88 */
emilmont 77:869cf507173a 89 typedef struct
emilmont 77:869cf507173a 90 {
bogdanm 85:024bf7f99721 91 /*<! NAND memory electronic signature maker and device IDs */
bogdanm 85:024bf7f99721 92
emilmont 77:869cf507173a 93 uint8_t Maker_Id;
bogdanm 85:024bf7f99721 94
emilmont 77:869cf507173a 95 uint8_t Device_Id;
bogdanm 85:024bf7f99721 96
emilmont 77:869cf507173a 97 uint8_t Third_Id;
bogdanm 85:024bf7f99721 98
emilmont 77:869cf507173a 99 uint8_t Fourth_Id;
emilmont 77:869cf507173a 100 }NAND_IDTypeDef;
emilmont 77:869cf507173a 101
emilmont 77:869cf507173a 102 /**
bogdanm 85:024bf7f99721 103 * @brief NAND Memory address Structure definition
emilmont 77:869cf507173a 104 */
emilmont 77:869cf507173a 105 typedef struct
emilmont 77:869cf507173a 106 {
bogdanm 85:024bf7f99721 107 uint16_t Page; /*!< NAND memory Page address */
bogdanm 85:024bf7f99721 108
bogdanm 85:024bf7f99721 109 uint16_t Zone; /*!< NAND memory Zone address */
bogdanm 85:024bf7f99721 110
emilmont 77:869cf507173a 111 uint16_t Block; /*!< NAND memory Block address */
bogdanm 85:024bf7f99721 112
Kojto 99:dbbf35b96557 113 }NAND_AddressTypeDef;
emilmont 77:869cf507173a 114
emilmont 77:869cf507173a 115 /**
bogdanm 85:024bf7f99721 116 * @brief NAND Memory info Structure definition
emilmont 77:869cf507173a 117 */
emilmont 77:869cf507173a 118 typedef struct
emilmont 77:869cf507173a 119 {
emilmont 77:869cf507173a 120 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */
bogdanm 85:024bf7f99721 121
bogdanm 85:024bf7f99721 122 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */
bogdanm 85:024bf7f99721 123
bogdanm 85:024bf7f99721 124 uint32_t BlockSize; /*!< NAND memory block size number of pages */
bogdanm 85:024bf7f99721 125
emilmont 77:869cf507173a 126 uint32_t BlockNbr; /*!< NAND memory number of blocks */
bogdanm 85:024bf7f99721 127
emilmont 77:869cf507173a 128 uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */
emilmont 77:869cf507173a 129 }NAND_InfoTypeDef;
emilmont 77:869cf507173a 130
emilmont 77:869cf507173a 131 /**
bogdanm 85:024bf7f99721 132 * @brief NAND handle Structure definition
emilmont 77:869cf507173a 133 */
emilmont 77:869cf507173a 134 typedef struct
emilmont 77:869cf507173a 135 {
emilmont 77:869cf507173a 136 FMC_NAND_TypeDef *Instance; /*!< Register base address */
emilmont 77:869cf507173a 137
emilmont 77:869cf507173a 138 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
emilmont 77:869cf507173a 139
bogdanm 85:024bf7f99721 140 HAL_LockTypeDef Lock; /*!< NAND locking object */
emilmont 77:869cf507173a 141
emilmont 77:869cf507173a 142 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
bogdanm 85:024bf7f99721 143
emilmont 77:869cf507173a 144 NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */
emilmont 77:869cf507173a 145 }NAND_HandleTypeDef;
Kojto 99:dbbf35b96557 146 /**
Kojto 99:dbbf35b96557 147 * @}
Kojto 99:dbbf35b96557 148 */
emilmont 77:869cf507173a 149
emilmont 77:869cf507173a 150 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 151 /* Exported macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 152 /** @defgroup NAND_Exported_Macros NAND Exported Macros
emilmont 77:869cf507173a 153 * @{
emilmont 77:869cf507173a 154 */
Kojto 99:dbbf35b96557 155
Kojto 99:dbbf35b96557 156 /** @brief Reset NAND handle state
Kojto 99:dbbf35b96557 157 * @param __HANDLE__: specifies the NAND handle.
Kojto 99:dbbf35b96557 158 * @retval None
Kojto 99:dbbf35b96557 159 */
Kojto 99:dbbf35b96557 160 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
Kojto 99:dbbf35b96557 161
Kojto 99:dbbf35b96557 162 /**
Kojto 99:dbbf35b96557 163 * @}
Kojto 99:dbbf35b96557 164 */
Kojto 99:dbbf35b96557 165
Kojto 99:dbbf35b96557 166 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 167 /** @addtogroup NAND_Exported_Functions NAND Exported Functions
Kojto 99:dbbf35b96557 168 * @{
Kojto 99:dbbf35b96557 169 */
Kojto 99:dbbf35b96557 170
Kojto 99:dbbf35b96557 171 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 99:dbbf35b96557 172 * @{
Kojto 99:dbbf35b96557 173 */
Kojto 99:dbbf35b96557 174
Kojto 99:dbbf35b96557 175 /* Initialization/de-initialization functions ********************************/
Kojto 99:dbbf35b96557 176 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
Kojto 99:dbbf35b96557 177 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 178 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 179 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 180 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 181 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 182
Kojto 99:dbbf35b96557 183 /**
Kojto 99:dbbf35b96557 184 * @}
Kojto 99:dbbf35b96557 185 */
Kojto 99:dbbf35b96557 186
Kojto 99:dbbf35b96557 187 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
Kojto 99:dbbf35b96557 188 * @{
Kojto 99:dbbf35b96557 189 */
Kojto 99:dbbf35b96557 190
Kojto 99:dbbf35b96557 191 /* IO operation functions ****************************************************/
Kojto 99:dbbf35b96557 192 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
Kojto 99:dbbf35b96557 193 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 194 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
Kojto 99:dbbf35b96557 195 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
Kojto 99:dbbf35b96557 196 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
Kojto 99:dbbf35b96557 197 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
Kojto 99:dbbf35b96557 198 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
Kojto 99:dbbf35b96557 199 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 200 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
Kojto 99:dbbf35b96557 201
Kojto 99:dbbf35b96557 202 /**
Kojto 99:dbbf35b96557 203 * @}
Kojto 99:dbbf35b96557 204 */
Kojto 99:dbbf35b96557 205
Kojto 99:dbbf35b96557 206 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
Kojto 99:dbbf35b96557 207 * @{
Kojto 99:dbbf35b96557 208 */
Kojto 99:dbbf35b96557 209
Kojto 99:dbbf35b96557 210 /* NAND Control functions ****************************************************/
Kojto 99:dbbf35b96557 211 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 212 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 213 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
Kojto 99:dbbf35b96557 214
Kojto 99:dbbf35b96557 215 /**
Kojto 99:dbbf35b96557 216 * @}
Kojto 99:dbbf35b96557 217 */
Kojto 99:dbbf35b96557 218
Kojto 99:dbbf35b96557 219 /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
Kojto 99:dbbf35b96557 220 * @{
Kojto 99:dbbf35b96557 221 */
Kojto 99:dbbf35b96557 222 /* NAND State functions *******************************************************/
Kojto 99:dbbf35b96557 223 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 224 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 225 /**
Kojto 99:dbbf35b96557 226 * @}
Kojto 99:dbbf35b96557 227 */
Kojto 99:dbbf35b96557 228
Kojto 99:dbbf35b96557 229 /**
Kojto 99:dbbf35b96557 230 * @}
Kojto 99:dbbf35b96557 231 */
Kojto 99:dbbf35b96557 232
Kojto 99:dbbf35b96557 233 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 234 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 235 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 236 /** @defgroup NAND_Private_Constants NAND Private Constants
Kojto 99:dbbf35b96557 237 * @{
Kojto 99:dbbf35b96557 238 */
emilmont 77:869cf507173a 239 #define NAND_DEVICE1 ((uint32_t)0x70000000)
emilmont 77:869cf507173a 240 #define NAND_DEVICE2 ((uint32_t)0x80000000)
emilmont 77:869cf507173a 241 #define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000)
emilmont 77:869cf507173a 242
emilmont 77:869cf507173a 243 #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */
emilmont 77:869cf507173a 244 #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */
emilmont 77:869cf507173a 245
Kojto 99:dbbf35b96557 246 #define NAND_CMD_AREA_A ((uint8_t)0x00)
Kojto 99:dbbf35b96557 247 #define NAND_CMD_AREA_B ((uint8_t)0x01)
emilmont 77:869cf507173a 248 #define NAND_CMD_AREA_C ((uint8_t)0x50)
Kojto 90:cb3d968589d8 249 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30)
Kojto 90:cb3d968589d8 250
Kojto 90:cb3d968589d8 251 #define NAND_CMD_WRITE0 ((uint8_t)0x80)
Kojto 99:dbbf35b96557 252 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10)
Kojto 90:cb3d968589d8 253 #define NAND_CMD_ERASE0 ((uint8_t)0x60)
Kojto 90:cb3d968589d8 254 #define NAND_CMD_ERASE1 ((uint8_t)0xD0)
Kojto 99:dbbf35b96557 255 #define NAND_CMD_READID ((uint8_t)0x90)
Kojto 90:cb3d968589d8 256 #define NAND_CMD_STATUS ((uint8_t)0x70)
Kojto 90:cb3d968589d8 257 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A)
Kojto 90:cb3d968589d8 258 #define NAND_CMD_RESET ((uint8_t)0xFF)
emilmont 77:869cf507173a 259
emilmont 77:869cf507173a 260 /* NAND memory status */
emilmont 77:869cf507173a 261 #define NAND_VALID_ADDRESS ((uint32_t)0x00000100)
emilmont 77:869cf507173a 262 #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200)
emilmont 77:869cf507173a 263 #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400)
emilmont 77:869cf507173a 264 #define NAND_BUSY ((uint32_t)0x00000000)
emilmont 77:869cf507173a 265 #define NAND_ERROR ((uint32_t)0x00000001)
emilmont 77:869cf507173a 266 #define NAND_READY ((uint32_t)0x00000040)
emilmont 77:869cf507173a 267 /**
emilmont 77:869cf507173a 268 * @}
emilmont 77:869cf507173a 269 */
bogdanm 85:024bf7f99721 270
Kojto 99:dbbf35b96557 271 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 272 /** @defgroup NAND_Private_Macros NAND Private Macros
Kojto 99:dbbf35b96557 273 * @{
bogdanm 85:024bf7f99721 274 */
bogdanm 85:024bf7f99721 275
emilmont 77:869cf507173a 276 /**
emilmont 77:869cf507173a 277 * @brief NAND memory address computation.
bogdanm 85:024bf7f99721 278 * @param __ADDRESS__: NAND memory address.
Kojto 110:165afa46840b 279 * @param __HANDLE__: NAND handle.
emilmont 77:869cf507173a 280 * @retval NAND Raw address value
emilmont 77:869cf507173a 281 */
Kojto 99:dbbf35b96557 282 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \
Kojto 90:cb3d968589d8 283 (((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.ZoneSize)))* ((__HANDLE__)->Info.BlockSize)))
Kojto 99:dbbf35b96557 284
emilmont 77:869cf507173a 285 /**
emilmont 77:869cf507173a 286 * @brief NAND memory address cycling.
bogdanm 85:024bf7f99721 287 * @param __ADDRESS__: NAND memory address.
emilmont 77:869cf507173a 288 * @retval NAND address cycling value.
emilmont 77:869cf507173a 289 */
Kojto 99:dbbf35b96557 290 #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
Kojto 99:dbbf35b96557 291 #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
Kojto 99:dbbf35b96557 292 #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
Kojto 99:dbbf35b96557 293 #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
Kojto 99:dbbf35b96557 294 /**
Kojto 99:dbbf35b96557 295 * @}
Kojto 99:dbbf35b96557 296 */
Kojto 99:dbbf35b96557 297 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
Kojto 99:dbbf35b96557 298 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
Kojto 110:165afa46840b 299 STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 99:dbbf35b96557 300
Kojto 99:dbbf35b96557 301 /**
Kojto 99:dbbf35b96557 302 * @}
Kojto 99:dbbf35b96557 303 */
emilmont 77:869cf507173a 304 /**
emilmont 77:869cf507173a 305 * @}
emilmont 77:869cf507173a 306 */
emilmont 77:869cf507173a 307
emilmont 77:869cf507173a 308 /**
emilmont 77:869cf507173a 309 * @}
emilmont 77:869cf507173a 310 */
emilmont 77:869cf507173a 311
emilmont 77:869cf507173a 312 #ifdef __cplusplus
emilmont 77:869cf507173a 313 }
emilmont 77:869cf507173a 314 #endif
emilmont 77:869cf507173a 315
emilmont 77:869cf507173a 316 #endif /* __STM32F4xx_HAL_NAND_H */
emilmont 77:869cf507173a 317
emilmont 77:869cf507173a 318 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/