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TARGET_MOTE_L152RC/stm32l1xx_hal_rcc_ex.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
112:6f327212ef96 
.

Who changed what in which revision?

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Kojto 112:6f327212ef96 1 /**
Kojto 112:6f327212ef96 2 ******************************************************************************
Kojto 112:6f327212ef96 3 * @file stm32l1xx_hal_rcc_ex.h
Kojto 112:6f327212ef96 4 * @author MCD Application Team
Kojto 112:6f327212ef96 5 * @version V1.0.0
Kojto 112:6f327212ef96 6 * @date 5-September-2014
Kojto 112:6f327212ef96 7 * @brief Header file of RCC HAL Extension module.
Kojto 112:6f327212ef96 8 ******************************************************************************
Kojto 112:6f327212ef96 9 * @attention
Kojto 112:6f327212ef96 10 *
Kojto 112:6f327212ef96 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 112:6f327212ef96 12 *
Kojto 112:6f327212ef96 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 112:6f327212ef96 14 * are permitted provided that the following conditions are met:
Kojto 112:6f327212ef96 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 112:6f327212ef96 16 * this list of conditions and the following disclaimer.
Kojto 112:6f327212ef96 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 112:6f327212ef96 18 * this list of conditions and the following disclaimer in the documentation
Kojto 112:6f327212ef96 19 * and/or other materials provided with the distribution.
Kojto 112:6f327212ef96 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 112:6f327212ef96 21 * may be used to endorse or promote products derived from this software
Kojto 112:6f327212ef96 22 * without specific prior written permission.
Kojto 112:6f327212ef96 23 *
Kojto 112:6f327212ef96 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 112:6f327212ef96 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 112:6f327212ef96 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 112:6f327212ef96 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 112:6f327212ef96 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 112:6f327212ef96 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 112:6f327212ef96 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 112:6f327212ef96 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 112:6f327212ef96 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 112:6f327212ef96 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 112:6f327212ef96 34 *
Kojto 112:6f327212ef96 35 ******************************************************************************
Kojto 112:6f327212ef96 36 */
Kojto 112:6f327212ef96 37
Kojto 112:6f327212ef96 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 112:6f327212ef96 39 #ifndef __STM32L1xx_HAL_RCC_EX_H
Kojto 112:6f327212ef96 40 #define __STM32L1xx_HAL_RCC_EX_H
Kojto 112:6f327212ef96 41
Kojto 112:6f327212ef96 42 #ifdef __cplusplus
Kojto 112:6f327212ef96 43 extern "C" {
Kojto 112:6f327212ef96 44 #endif
Kojto 112:6f327212ef96 45
Kojto 112:6f327212ef96 46 /* Includes ------------------------------------------------------------------*/
Kojto 112:6f327212ef96 47 #include "stm32l1xx_hal_def.h"
Kojto 112:6f327212ef96 48
Kojto 112:6f327212ef96 49 /** @addtogroup STM32L1xx_HAL_Driver
Kojto 112:6f327212ef96 50 * @{
Kojto 112:6f327212ef96 51 */
Kojto 112:6f327212ef96 52
Kojto 112:6f327212ef96 53 /** @addtogroup RCCEx
Kojto 112:6f327212ef96 54 * @{
Kojto 112:6f327212ef96 55 */
Kojto 112:6f327212ef96 56
Kojto 112:6f327212ef96 57 /* Exported types ------------------------------------------------------------*/
Kojto 112:6f327212ef96 58
Kojto 112:6f327212ef96 59 /** @defgroup RCCEx_Exported_Types RCCEx Exported Types
Kojto 112:6f327212ef96 60 * @{
Kojto 112:6f327212ef96 61 */
Kojto 112:6f327212ef96 62
Kojto 112:6f327212ef96 63 /**
Kojto 112:6f327212ef96 64 * @brief RCC extended clocks structure definition
Kojto 112:6f327212ef96 65 */
Kojto 112:6f327212ef96 66 typedef struct
Kojto 112:6f327212ef96 67 {
Kojto 112:6f327212ef96 68 uint32_t PeriphClockSelection; /*!< The Extended Clock to be configured.
Kojto 112:6f327212ef96 69 This parameter can be a value of @ref RCCEx_Periph_Clock_Selection */
Kojto 112:6f327212ef96 70
Kojto 112:6f327212ef96 71 uint32_t RTCClockSelection; /*!< specifies the RTC clock source.
Kojto 112:6f327212ef96 72 This parameter can be a value of @ref RCC_RTC_LCD_Clock_Source */
Kojto 112:6f327212ef96 73
Kojto 112:6f327212ef96 74 #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\
Kojto 112:6f327212ef96 75 defined(STM32L152xB) || defined(STM32L152xBA) || defined(STM32L152xC) || \
Kojto 112:6f327212ef96 76 defined(STM32L162xC) || defined(STM32L152xCA) || defined(STM32L152xD) || \
Kojto 112:6f327212ef96 77 defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || \
Kojto 112:6f327212ef96 78 defined(STM32L162xE)
Kojto 112:6f327212ef96 79
Kojto 112:6f327212ef96 80 uint32_t LCDClockSelection; /*!< specifies the LCD clock source.
Kojto 112:6f327212ef96 81 This parameter can be a value of @ref RCC_RTC_LCD_Clock_Source */
Kojto 112:6f327212ef96 82
Kojto 112:6f327212ef96 83 #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 84 } RCC_PeriphCLKInitTypeDef;
Kojto 112:6f327212ef96 85
Kojto 112:6f327212ef96 86 /**
Kojto 112:6f327212ef96 87 * @}
Kojto 112:6f327212ef96 88 */
Kojto 112:6f327212ef96 89
Kojto 112:6f327212ef96 90 /* Exported constants --------------------------------------------------------*/
Kojto 112:6f327212ef96 91
Kojto 112:6f327212ef96 92 /** @defgroup RCCEx_Exported_Constants RCCEx Exported Constants
Kojto 112:6f327212ef96 93 * @{
Kojto 112:6f327212ef96 94 */
Kojto 112:6f327212ef96 95
Kojto 112:6f327212ef96 96 /** @defgroup RCCEx_Periph_Clock_Selection RCCEx Periph Clock Selection
Kojto 112:6f327212ef96 97 * @{
Kojto 112:6f327212ef96 98 */
Kojto 112:6f327212ef96 99 #define RCC_PERIPHCLK_RTC ((uint32_t)0x00000001)
Kojto 112:6f327212ef96 100
Kojto 112:6f327212ef96 101 #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\
Kojto 112:6f327212ef96 102 defined(STM32L152xB) || defined(STM32L152xBA) || defined(STM32L152xC) || \
Kojto 112:6f327212ef96 103 defined(STM32L162xC) || defined(STM32L152xCA) || defined(STM32L152xD) || \
Kojto 112:6f327212ef96 104 defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || \
Kojto 112:6f327212ef96 105 defined(STM32L162xE)
Kojto 112:6f327212ef96 106
Kojto 112:6f327212ef96 107 #define RCC_PERIPHCLK_LCD ((uint32_t)0x00000002)
Kojto 112:6f327212ef96 108
Kojto 112:6f327212ef96 109 #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 110
Kojto 112:6f327212ef96 111 #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\
Kojto 112:6f327212ef96 112 defined(STM32L152xB) || defined(STM32L152xBA) || defined(STM32L152xC) || \
Kojto 112:6f327212ef96 113 defined(STM32L162xC) || defined(STM32L152xCA) || defined(STM32L152xD) || \
Kojto 112:6f327212ef96 114 defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || \
Kojto 112:6f327212ef96 115 defined(STM32L162xE)
Kojto 112:6f327212ef96 116
Kojto 112:6f327212ef96 117 #define IS_RCC_PERIPHCLOCK(__CLK__) ((RCC_PERIPHCLK_RTC <= (__CLK__)) && ((__CLK__) <= RCC_PERIPHCLK_LCD))
Kojto 112:6f327212ef96 118
Kojto 112:6f327212ef96 119 #else /* Not LCD LINE */
Kojto 112:6f327212ef96 120
Kojto 112:6f327212ef96 121 #define IS_RCC_PERIPHCLOCK(__CLK__) ((__CLK__) == RCC_PERIPHCLK_RTC)
Kojto 112:6f327212ef96 122
Kojto 112:6f327212ef96 123 #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 124 /**
Kojto 112:6f327212ef96 125 * @}
Kojto 112:6f327212ef96 126 */
Kojto 112:6f327212ef96 127
Kojto 112:6f327212ef96 128 #if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || \
Kojto 112:6f327212ef96 129 defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 130 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 131 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 132
Kojto 112:6f327212ef96 133 /* Alias word address of LSECSSON bit */
Kojto 112:6f327212ef96 134 #define LSECSSON_BITNUMBER POSITION_VAL(RCC_CSR_LSECSSON)
Kojto 112:6f327212ef96 135 #define CSR_LSECSSON_BB ((uint32_t)(PERIPH_BB_BASE + (RCC_CSR_OFFSET_BB * 32) + (LSECSSON_BITNUMBER * 4)))
Kojto 112:6f327212ef96 136
Kojto 112:6f327212ef96 137 #endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE*/
Kojto 112:6f327212ef96 138
Kojto 112:6f327212ef96 139 /**
Kojto 112:6f327212ef96 140 * @}
Kojto 112:6f327212ef96 141 */
Kojto 112:6f327212ef96 142
Kojto 112:6f327212ef96 143 /* Exported macro ------------------------------------------------------------*/
Kojto 112:6f327212ef96 144 /** @defgroup RCCEx_Exported_Macros RCCEx Exported Macros
Kojto 112:6f327212ef96 145 * @{
Kojto 112:6f327212ef96 146 */
Kojto 112:6f327212ef96 147
Kojto 112:6f327212ef96 148 /** @defgroup RCCEx_Peripheral_Clock_Enable_Disable RCCEx_Peripheral_Clock_Enable_Disable
Kojto 112:6f327212ef96 149 * @brief Enables or disables the AHB1 peripheral clock.
Kojto 112:6f327212ef96 150 * @note After reset, the peripheral clock (used for registers read/write access)
Kojto 112:6f327212ef96 151 * is disabled and the application software has to enable this clock before
Kojto 112:6f327212ef96 152 * using it.
Kojto 112:6f327212ef96 153 * @{
Kojto 112:6f327212ef96 154 */
Kojto 112:6f327212ef96 155 #if defined (STM32L151xB) || defined (STM32L152xB) || \
Kojto 112:6f327212ef96 156 defined (STM32L151xBA) || defined (STM32L152xBA) || \
Kojto 112:6f327212ef96 157 defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 158 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 159 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 160
Kojto 112:6f327212ef96 161 #define __GPIOE_CLK_ENABLE() (RCC->AHBENR |= (RCC_AHBENR_GPIOEEN))
Kojto 112:6f327212ef96 162 #define __GPIOE_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOEEN))
Kojto 112:6f327212ef96 163
Kojto 112:6f327212ef96 164 #endif /* STM32L151xB || STM32L152xB || ... || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 165
Kojto 112:6f327212ef96 166 #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 167 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 168
Kojto 112:6f327212ef96 169 #define __GPIOF_CLK_ENABLE() (RCC->AHBENR |= (RCC_AHBENR_GPIOFEN))
Kojto 112:6f327212ef96 170 #define __GPIOG_CLK_ENABLE() (RCC->AHBENR |= (RCC_AHBENR_GPIOGEN))
Kojto 112:6f327212ef96 171
Kojto 112:6f327212ef96 172 #define __GPIOF_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOFEN))
Kojto 112:6f327212ef96 173 #define __GPIOG_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOGEN))
Kojto 112:6f327212ef96 174
Kojto 112:6f327212ef96 175 #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 176
Kojto 112:6f327212ef96 177 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 178 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 179 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 180
Kojto 112:6f327212ef96 181 #define __DMA2_CLK_ENABLE() (RCC->AHBENR |= (RCC_AHBENR_DMA2EN))
Kojto 112:6f327212ef96 182 #define __DMA2_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_DMA2EN))
Kojto 112:6f327212ef96 183
Kojto 112:6f327212ef96 184 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 185
Kojto 112:6f327212ef96 186 #if defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L162xE)
Kojto 112:6f327212ef96 187
Kojto 112:6f327212ef96 188 #define __CRYP_CLK_ENABLE() (RCC->AHBENR |= (RCC_AHBENR_AESEN))
Kojto 112:6f327212ef96 189 #define __CRYP_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_AESEN))
Kojto 112:6f327212ef96 190
Kojto 112:6f327212ef96 191 #endif /* STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE */
Kojto 112:6f327212ef96 192
Kojto 112:6f327212ef96 193 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
Kojto 112:6f327212ef96 194
Kojto 112:6f327212ef96 195 #define __FSMC_CLK_ENABLE() (RCC->AHBENR |= (RCC_AHBENR_FSMCEN))
Kojto 112:6f327212ef96 196 #define __FSMC_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_FSMCEN))
Kojto 112:6f327212ef96 197
Kojto 112:6f327212ef96 198 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
Kojto 112:6f327212ef96 199
Kojto 112:6f327212ef96 200 #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\
Kojto 112:6f327212ef96 201 defined(STM32L152xB) || defined(STM32L152xBA) || defined(STM32L152xC) || \
Kojto 112:6f327212ef96 202 defined(STM32L162xC) || defined(STM32L152xCA) || defined(STM32L152xD) || \
Kojto 112:6f327212ef96 203 defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || \
Kojto 112:6f327212ef96 204 defined(STM32L162xE)
Kojto 112:6f327212ef96 205
Kojto 112:6f327212ef96 206 #define __LCD_CLK_ENABLE() (RCC->APB1ENR |= (RCC_APB1ENR_LCDEN))
Kojto 112:6f327212ef96 207 #define __LCD_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_LCDEN))
Kojto 112:6f327212ef96 208
Kojto 112:6f327212ef96 209 #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 210
Kojto 112:6f327212ef96 211 /** @brief Enables or disables the Low Speed APB (APB1) peripheral clock.
Kojto 112:6f327212ef96 212 * @note After reset, the peripheral clock (used for registers read/write access)
Kojto 112:6f327212ef96 213 * is disabled and the application software has to enable this clock before
Kojto 112:6f327212ef96 214 * using it.
Kojto 112:6f327212ef96 215 */
Kojto 112:6f327212ef96 216 #if defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 217 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 218 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 219
Kojto 112:6f327212ef96 220 #define __TIM5_CLK_ENABLE() (RCC->APB1ENR |= (RCC_APB1ENR_TIM5EN))
Kojto 112:6f327212ef96 221 #define __TIM5_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM5EN))
Kojto 112:6f327212ef96 222
Kojto 112:6f327212ef96 223 #endif /* STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 224
Kojto 112:6f327212ef96 225 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 226 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 227 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 228
Kojto 112:6f327212ef96 229 #define __SPI3_CLK_ENABLE() (RCC->APB1ENR |= (RCC_APB1ENR_SPI3EN))
Kojto 112:6f327212ef96 230 #define __SPI3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI3EN))
Kojto 112:6f327212ef96 231
Kojto 112:6f327212ef96 232 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 233
Kojto 112:6f327212ef96 234 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 235 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 236
Kojto 112:6f327212ef96 237 #define __UART4_CLK_ENABLE() (RCC->APB1ENR |= (RCC_APB1ENR_UART4EN))
Kojto 112:6f327212ef96 238 #define __UART5_CLK_ENABLE() (RCC->APB1ENR |= (RCC_APB1ENR_UART5EN))
Kojto 112:6f327212ef96 239
Kojto 112:6f327212ef96 240 #define __UART4_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART4EN))
Kojto 112:6f327212ef96 241 #define __UART5_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART5EN))
Kojto 112:6f327212ef96 242
Kojto 112:6f327212ef96 243 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 244
Kojto 112:6f327212ef96 245 #if defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) || defined (STM32L162xC) || defined (STM32L152xC) || defined (STM32L151xC)
Kojto 112:6f327212ef96 246
Kojto 112:6f327212ef96 247 #define __OPAMP_CLK_ENABLE() __COMP_CLK_ENABLE() /* Peripherals COMP and OPAMP share the same clock domain */
Kojto 112:6f327212ef96 248 #define __OPAMP_CLK_DISABLE() __COMP_CLK_DISABLE() /* Peripherals COMP and OPAMP share the same clock domain */
Kojto 112:6f327212ef96 249
Kojto 112:6f327212ef96 250 #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE || STM32L162xC || STM32L152xC || STM32L151xC */
Kojto 112:6f327212ef96 251
Kojto 112:6f327212ef96 252 /** @brief Enables or disables the High Speed APB (APB2) peripheral clock.
Kojto 112:6f327212ef96 253 * @note After reset, the peripheral clock (used for registers read/write access)
Kojto 112:6f327212ef96 254 * is disabled and the application software has to enable this clock before
Kojto 112:6f327212ef96 255 * using it.
Kojto 112:6f327212ef96 256 */
Kojto 112:6f327212ef96 257 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
Kojto 112:6f327212ef96 258
Kojto 112:6f327212ef96 259 #define __SDIO_CLK_ENABLE() (RCC->APB2ENR |= (RCC_APB2ENR_SDIOEN))
Kojto 112:6f327212ef96 260 #define __SDIO_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SDIOEN))
Kojto 112:6f327212ef96 261
Kojto 112:6f327212ef96 262 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
Kojto 112:6f327212ef96 263
Kojto 112:6f327212ef96 264 /**
Kojto 112:6f327212ef96 265 * @}
Kojto 112:6f327212ef96 266 */
Kojto 112:6f327212ef96 267
Kojto 112:6f327212ef96 268
Kojto 112:6f327212ef96 269 /** @defgroup RCCEx_Force_Release_Peripheral_Reset RCCEx Force Release Peripheral Reset
Kojto 112:6f327212ef96 270 * @brief Forces or releases AHB peripheral reset.
Kojto 112:6f327212ef96 271 * @{
Kojto 112:6f327212ef96 272 */
Kojto 112:6f327212ef96 273 #if defined (STM32L151xB) || defined (STM32L152xB) || \
Kojto 112:6f327212ef96 274 defined (STM32L151xBA) || defined (STM32L152xBA) || \
Kojto 112:6f327212ef96 275 defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 276 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 277 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 278
Kojto 112:6f327212ef96 279 #define __GPIOE_FORCE_RESET() (RCC->AHBRSTR |= (RCC_AHBRSTR_GPIOERST))
Kojto 112:6f327212ef96 280 #define __GPIOE_RELEASE_RESET() (RCC->AHBRSTR &= ~(RCC_AHBRSTR_GPIOERST))
Kojto 112:6f327212ef96 281
Kojto 112:6f327212ef96 282 #endif /* STM32L151xB || STM32L152xB || ... || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 283
Kojto 112:6f327212ef96 284 #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 285 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 286
Kojto 112:6f327212ef96 287 #define __GPIOF_FORCE_RESET() (RCC->AHBRSTR |= (RCC_AHBRSTR_GPIOFRST))
Kojto 112:6f327212ef96 288 #define __GPIOG_FORCE_RESET() (RCC->AHBRSTR |= (RCC_AHBRSTR_GPIOGRST))
Kojto 112:6f327212ef96 289
Kojto 112:6f327212ef96 290 #define __GPIOF_RELEASE_RESET() (RCC->AHBRSTR &= ~(RCC_AHBRSTR_GPIOFRST))
Kojto 112:6f327212ef96 291 #define __GPIOG_RELEASE_RESET() (RCC->AHBRSTR &= ~(RCC_AHBRSTR_GPIOGRST))
Kojto 112:6f327212ef96 292
Kojto 112:6f327212ef96 293 #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 294
Kojto 112:6f327212ef96 295 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 296 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 297 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 298
Kojto 112:6f327212ef96 299 #define __DMA2_FORCE_RESET() (RCC->AHBRSTR |= (RCC_AHBRSTR_DMA2RST))
Kojto 112:6f327212ef96 300 #define __DMA2_RELEASE_RESET() (RCC->AHBRSTR &= ~(RCC_AHBRSTR_DMA2RST))
Kojto 112:6f327212ef96 301
Kojto 112:6f327212ef96 302 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 303
Kojto 112:6f327212ef96 304 #if defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L162xE)
Kojto 112:6f327212ef96 305
Kojto 112:6f327212ef96 306 #define __CRYP_FORCE_RESET() (RCC->AHBRSTR |= (RCC_AHBRSTR_AESRST))
Kojto 112:6f327212ef96 307 #define __CRYP_RELEASE_RESET() (RCC->AHBRSTR &= ~(RCC_AHBRSTR_AESRST))
Kojto 112:6f327212ef96 308
Kojto 112:6f327212ef96 309 #endif /* STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE */
Kojto 112:6f327212ef96 310
Kojto 112:6f327212ef96 311 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
Kojto 112:6f327212ef96 312
Kojto 112:6f327212ef96 313 #define __FSMC_FORCE_RESET() (RCC->AHBRSTR |= (RCC_AHBRSTR_FSMCRST))
Kojto 112:6f327212ef96 314 #define __FSMC_RELEASE_RESET() (RCC->AHBRSTR &= ~(RCC_AHBRSTR_FSMCRST))
Kojto 112:6f327212ef96 315
Kojto 112:6f327212ef96 316 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
Kojto 112:6f327212ef96 317
Kojto 112:6f327212ef96 318 #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\
Kojto 112:6f327212ef96 319 defined(STM32L152xB) || defined(STM32L152xBA) || defined(STM32L152xC) || \
Kojto 112:6f327212ef96 320 defined(STM32L162xC) || defined(STM32L152xCA) || defined(STM32L152xD) || \
Kojto 112:6f327212ef96 321 defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || \
Kojto 112:6f327212ef96 322 defined(STM32L162xE)
Kojto 112:6f327212ef96 323
Kojto 112:6f327212ef96 324 #define __LCD_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_LCDRST))
Kojto 112:6f327212ef96 325 #define __LCD_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_LCDRST))
Kojto 112:6f327212ef96 326
Kojto 112:6f327212ef96 327 #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 328
Kojto 112:6f327212ef96 329 /** @brief Forces or releases APB1 peripheral reset.
Kojto 112:6f327212ef96 330 */
Kojto 112:6f327212ef96 331 #if defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 332 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 333 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 334
Kojto 112:6f327212ef96 335 #define __TIM5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM5RST))
Kojto 112:6f327212ef96 336 #define __TIM5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM5RST))
Kojto 112:6f327212ef96 337
Kojto 112:6f327212ef96 338 #endif /* STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 339
Kojto 112:6f327212ef96 340 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 341 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 342 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 343
Kojto 112:6f327212ef96 344 #define __SPI3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST))
Kojto 112:6f327212ef96 345 #define __SPI3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST))
Kojto 112:6f327212ef96 346
Kojto 112:6f327212ef96 347 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 348
Kojto 112:6f327212ef96 349 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 350 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 351
Kojto 112:6f327212ef96 352 #define __UART4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART4RST))
Kojto 112:6f327212ef96 353 #define __UART5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART5RST))
Kojto 112:6f327212ef96 354
Kojto 112:6f327212ef96 355 #define __UART4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART4RST))
Kojto 112:6f327212ef96 356 #define __UART5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART5RST))
Kojto 112:6f327212ef96 357
Kojto 112:6f327212ef96 358 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 359
Kojto 112:6f327212ef96 360 #if defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) || defined (STM32L162xC) || defined (STM32L152xC) || defined (STM32L151xC)
Kojto 112:6f327212ef96 361
Kojto 112:6f327212ef96 362 #define __OPAMP_FORCE_RESET() __COMP_FORCE_RESET() /* Peripherals COMP and OPAMP share the same clock domain */
Kojto 112:6f327212ef96 363 #define __OPAMP_RELEASE_RESET() __COMP_RELEASE_RESET() /* Peripherals COMP and OPAMP share the same clock domain */
Kojto 112:6f327212ef96 364
Kojto 112:6f327212ef96 365 #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE || STM32L162xC || STM32L152xC || STM32L151xC */
Kojto 112:6f327212ef96 366
Kojto 112:6f327212ef96 367 /** @brief Forces or releases APB2 peripheral reset.
Kojto 112:6f327212ef96 368 */
Kojto 112:6f327212ef96 369 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
Kojto 112:6f327212ef96 370
Kojto 112:6f327212ef96 371 #define __SDIO_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SDIORST))
Kojto 112:6f327212ef96 372 #define __SDIO_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SDIORST))
Kojto 112:6f327212ef96 373
Kojto 112:6f327212ef96 374 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
Kojto 112:6f327212ef96 375
Kojto 112:6f327212ef96 376 /**
Kojto 112:6f327212ef96 377 * @}
Kojto 112:6f327212ef96 378 */
Kojto 112:6f327212ef96 379
Kojto 112:6f327212ef96 380 /** @defgroup RCCEx_Peripheral_Clock_Sleep_Enable_Disable RCCEx Peripheral Clock Sleep Enable Disable
Kojto 112:6f327212ef96 381 * @brief Enables or disables the AHB1 peripheral clock during Low Power (Sleep) mode.
Kojto 112:6f327212ef96 382 * @note Peripheral clock gating in SLEEP mode can be used to further reduce
Kojto 112:6f327212ef96 383 * power consumption.
Kojto 112:6f327212ef96 384 * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
Kojto 112:6f327212ef96 385 * @note By default, all peripheral clocks are enabled during SLEEP mode.
Kojto 112:6f327212ef96 386 * @{
Kojto 112:6f327212ef96 387 */
Kojto 112:6f327212ef96 388 #if defined (STM32L151xB) || defined (STM32L152xB) || \
Kojto 112:6f327212ef96 389 defined (STM32L151xBA) || defined (STM32L152xBA) || \
Kojto 112:6f327212ef96 390 defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 391 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 392 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 393
Kojto 112:6f327212ef96 394 #define __GPIOE_CLK_SLEEP_ENABLE() (RCC->AHBLPENR |= (RCC_AHBLPENR_GPIOELPEN))
Kojto 112:6f327212ef96 395 #define __GPIOE_CLK_SLEEP_DISABLE() (RCC->AHBLPENR &= ~(RCC_AHBLPENR_GPIOELPEN))
Kojto 112:6f327212ef96 396
Kojto 112:6f327212ef96 397 #endif /* STM32L151xB || STM32L152xB || ... || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 398
Kojto 112:6f327212ef96 399 #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 400 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 401
Kojto 112:6f327212ef96 402 #define __GPIOF_CLK_SLEEP_ENABLE() (RCC->AHBLPENR |= (RCC_AHBLPENR_GPIOFLPEN))
Kojto 112:6f327212ef96 403 #define __GPIOG_CLK_SLEEP_ENABLE() (RCC->AHBLPENR |= (RCC_AHBLPENR_GPIOGLPEN))
Kojto 112:6f327212ef96 404
Kojto 112:6f327212ef96 405 #define __GPIOF_CLK_SLEEP_DISABLE() (RCC->AHBLPENR &= ~(RCC_AHBLPENR_GPIOFLPEN))
Kojto 112:6f327212ef96 406 #define __GPIOG_CLK_SLEEP_DISABLE() (RCC->AHBLPENR &= ~(RCC_AHBLPENR_GPIOGLPEN))
Kojto 112:6f327212ef96 407
Kojto 112:6f327212ef96 408 #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 409
Kojto 112:6f327212ef96 410 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 411 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 412 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 413
Kojto 112:6f327212ef96 414 #define __DMA2_CLK_SLEEP_ENABLE() (RCC->AHBLPENR |= (RCC_AHBLPENR_DMA2LPEN))
Kojto 112:6f327212ef96 415 #define __DMA2_CLK_SLEEP_DISABLE() (RCC->AHBLPENR &= ~(RCC_AHBLPENR_DMA2LPEN))
Kojto 112:6f327212ef96 416
Kojto 112:6f327212ef96 417 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 418
Kojto 112:6f327212ef96 419 #if defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L162xE)
Kojto 112:6f327212ef96 420
Kojto 112:6f327212ef96 421 #define __CRYP_CLK_SLEEP_ENABLE() (RCC->AHBLPENR |= (RCC_AHBLPENR_AESLPEN))
Kojto 112:6f327212ef96 422 #define __CRYP_CLK_SLEEP_DISABLE() (RCC->AHBLPENR &= ~(RCC_AHBLPENR_AESLPEN))
Kojto 112:6f327212ef96 423
Kojto 112:6f327212ef96 424 #endif /* STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE */
Kojto 112:6f327212ef96 425
Kojto 112:6f327212ef96 426 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
Kojto 112:6f327212ef96 427
Kojto 112:6f327212ef96 428 #define __FSMC_CLK_SLEEP_ENABLE() (RCC->AHBLPENR |= (RCC_AHBLPENR_FSMCLPEN))
Kojto 112:6f327212ef96 429 #define __FSMC_CLK_SLEEP_DISABLE() (RCC->AHBLPENR &= ~(RCC_AHBLPENR_FSMCLPEN))
Kojto 112:6f327212ef96 430
Kojto 112:6f327212ef96 431 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
Kojto 112:6f327212ef96 432
Kojto 112:6f327212ef96 433 #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\
Kojto 112:6f327212ef96 434 defined(STM32L152xB) || defined(STM32L152xBA) || defined(STM32L152xC) || \
Kojto 112:6f327212ef96 435 defined(STM32L162xC) || defined(STM32L152xCA) || defined(STM32L152xD) || \
Kojto 112:6f327212ef96 436 defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || \
Kojto 112:6f327212ef96 437 defined(STM32L162xE)
Kojto 112:6f327212ef96 438
Kojto 112:6f327212ef96 439 #define __LCD_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_LCDLPEN))
Kojto 112:6f327212ef96 440 #define __LCD_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_LCDLPEN))
Kojto 112:6f327212ef96 441
Kojto 112:6f327212ef96 442 #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 443
Kojto 112:6f327212ef96 444 /** @brief Enables or disables the APB1 peripheral clock during Low Power (Sleep) mode.
Kojto 112:6f327212ef96 445 * @note Peripheral clock gating in SLEEP mode can be used to further reduce
Kojto 112:6f327212ef96 446 * power consumption.
Kojto 112:6f327212ef96 447 * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
Kojto 112:6f327212ef96 448 * @note By default, all peripheral clocks are enabled during SLEEP mode.
Kojto 112:6f327212ef96 449 */
Kojto 112:6f327212ef96 450 #if defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 451 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 452 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 453
Kojto 112:6f327212ef96 454 #define __TIM5_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM5LPEN))
Kojto 112:6f327212ef96 455 #define __TIM5_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM5LPEN))
Kojto 112:6f327212ef96 456
Kojto 112:6f327212ef96 457 #endif /* STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 458
Kojto 112:6f327212ef96 459 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 460 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 461 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 462
Kojto 112:6f327212ef96 463 #define __SPI3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_SPI3LPEN))
Kojto 112:6f327212ef96 464 #define __SPI3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_SPI3LPEN))
Kojto 112:6f327212ef96 465
Kojto 112:6f327212ef96 466 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 467
Kojto 112:6f327212ef96 468 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 469 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 470
Kojto 112:6f327212ef96 471 #define __UART4_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART4LPEN))
Kojto 112:6f327212ef96 472 #define __UART5_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART5LPEN))
Kojto 112:6f327212ef96 473
Kojto 112:6f327212ef96 474 #define __UART4_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART4LPEN))
Kojto 112:6f327212ef96 475 #define __UART5_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART5LPEN))
Kojto 112:6f327212ef96 476
Kojto 112:6f327212ef96 477 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 478
Kojto 112:6f327212ef96 479 /** @brief Enables or disables the APB2 peripheral clock during Low Power (Sleep) mode.
Kojto 112:6f327212ef96 480 * @note Peripheral clock gating in SLEEP mode can be used to further reduce
Kojto 112:6f327212ef96 481 * power consumption.
Kojto 112:6f327212ef96 482 * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
Kojto 112:6f327212ef96 483 * @note By default, all peripheral clocks are enabled during SLEEP mode.
Kojto 112:6f327212ef96 484 */
Kojto 112:6f327212ef96 485 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
Kojto 112:6f327212ef96 486
Kojto 112:6f327212ef96 487 #define __SDIO_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SDIOLPEN))
Kojto 112:6f327212ef96 488 #define __SDIO_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SDIOLPEN))
Kojto 112:6f327212ef96 489
Kojto 112:6f327212ef96 490 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
Kojto 112:6f327212ef96 491
Kojto 112:6f327212ef96 492 /**
Kojto 112:6f327212ef96 493 * @}
Kojto 112:6f327212ef96 494 */
Kojto 112:6f327212ef96 495
Kojto 112:6f327212ef96 496 #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\
Kojto 112:6f327212ef96 497 defined(STM32L152xB) || defined(STM32L152xBA) || defined(STM32L152xC) || \
Kojto 112:6f327212ef96 498 defined(STM32L162xC) || defined(STM32L152xCA) || defined(STM32L152xD) || \
Kojto 112:6f327212ef96 499 defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || \
Kojto 112:6f327212ef96 500 defined(STM32L162xE)
Kojto 112:6f327212ef96 501
Kojto 112:6f327212ef96 502
Kojto 112:6f327212ef96 503 /** @brief Macro to configures LCD clock (LCDCLK).
Kojto 112:6f327212ef96 504 * @note LCD and RTC use the same configuration
Kojto 112:6f327212ef96 505 * @note LCD can however be used in the Stop low power mode if the LSE or LSI is used as the
Kojto 112:6f327212ef96 506 * LCD clock source.
Kojto 112:6f327212ef96 507 *
Kojto 112:6f327212ef96 508 * @param __LCD_CLKSOURCE__: specifies the LCD clock source.
Kojto 112:6f327212ef96 509 * This parameter can be one of the following values:
Kojto 112:6f327212ef96 510 * @arg RCC_RTCCLKSOURCE_LSE: LSE selected as RTC clock
Kojto 112:6f327212ef96 511 * @arg RCC_RTCCLKSOURCE_LSI: LSI selected as RTC clock
Kojto 112:6f327212ef96 512 * @arg RCC_RTCCLKSOURCE_HSE_DIV2: HSE divided by 2 selected as RTC clock
Kojto 112:6f327212ef96 513 * @arg RCC_RTCCLKSOURCE_HSE_DIV4: HSE divided by 4 selected as RTC clock
Kojto 112:6f327212ef96 514 * @arg RCC_RTCCLKSOURCE_HSE_DIV8: HSE divided by 8 selected as RTC clock
Kojto 112:6f327212ef96 515 * @arg RCC_RTCCLKSOURCE_HSE_DIV16: HSE divided by 16 selected as RTC clock
Kojto 112:6f327212ef96 516 */
Kojto 112:6f327212ef96 517 #define __HAL_RCC_LCD_CONFIG(__LCD_CLKSOURCE__) __HAL_RCC_RTC_CONFIG(__LCD_CLKSOURCE__)
Kojto 112:6f327212ef96 518
Kojto 112:6f327212ef96 519 /** @brief macros to get the LCD clock source.
Kojto 112:6f327212ef96 520 */
Kojto 112:6f327212ef96 521 #define __HAL_RCC_GET_LCD_SOURCE() __HAL_RCC_GET_RTC_SOURCE()
Kojto 112:6f327212ef96 522
Kojto 112:6f327212ef96 523 #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L162xE */
Kojto 112:6f327212ef96 524
Kojto 112:6f327212ef96 525 /**
Kojto 112:6f327212ef96 526 * @}
Kojto 112:6f327212ef96 527 */
Kojto 112:6f327212ef96 528
Kojto 112:6f327212ef96 529 /* Exported functions --------------------------------------------------------*/
Kojto 112:6f327212ef96 530 /** @addtogroup RCCEx_Private_Functions
Kojto 112:6f327212ef96 531 * @{
Kojto 112:6f327212ef96 532 */
Kojto 112:6f327212ef96 533
Kojto 112:6f327212ef96 534 /** @addtogroup RCCEx_Exported_Functions_Group1
Kojto 112:6f327212ef96 535 * @{
Kojto 112:6f327212ef96 536 */
Kojto 112:6f327212ef96 537
Kojto 112:6f327212ef96 538 HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit);
Kojto 112:6f327212ef96 539 void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit);
Kojto 112:6f327212ef96 540
Kojto 112:6f327212ef96 541 #if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || \
Kojto 112:6f327212ef96 542 defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
Kojto 112:6f327212ef96 543 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
Kojto 112:6f327212ef96 544 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
Kojto 112:6f327212ef96 545
Kojto 112:6f327212ef96 546 void HAL_RCCEx_EnableLSECSS(void);
Kojto 112:6f327212ef96 547 void HAL_RCCEx_DisableLSECSS(void);
Kojto 112:6f327212ef96 548
Kojto 112:6f327212ef96 549 #endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE*/
Kojto 112:6f327212ef96 550
Kojto 112:6f327212ef96 551 /**
Kojto 112:6f327212ef96 552 * @}
Kojto 112:6f327212ef96 553 */
Kojto 112:6f327212ef96 554
Kojto 112:6f327212ef96 555 /**
Kojto 112:6f327212ef96 556 * @}
Kojto 112:6f327212ef96 557 */
Kojto 112:6f327212ef96 558
Kojto 112:6f327212ef96 559 /**
Kojto 112:6f327212ef96 560 * @}
Kojto 112:6f327212ef96 561 */
Kojto 112:6f327212ef96 562
Kojto 112:6f327212ef96 563 /**
Kojto 112:6f327212ef96 564 * @}
Kojto 112:6f327212ef96 565 */
Kojto 112:6f327212ef96 566
Kojto 112:6f327212ef96 567 #ifdef __cplusplus
Kojto 112:6f327212ef96 568 }
Kojto 112:6f327212ef96 569 #endif
Kojto 112:6f327212ef96 570
Kojto 112:6f327212ef96 571 #endif /* __STM32L1xx_HAL_RCC_EX_H */
Kojto 112:6f327212ef96 572
Kojto 112:6f327212ef96 573 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/