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TARGET_MOTE_L152RC/stm32l1xx_hal_pwr.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
112:6f327212ef96 
.

Who changed what in which revision?

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Kojto 112:6f327212ef96 1 /**
Kojto 112:6f327212ef96 2 ******************************************************************************
Kojto 112:6f327212ef96 3 * @file stm32l1xx_hal_pwr.h
Kojto 112:6f327212ef96 4 * @author MCD Application Team
Kojto 112:6f327212ef96 5 * @version V1.0.0
Kojto 112:6f327212ef96 6 * @date 5-September-2014
Kojto 112:6f327212ef96 7 * @brief Header file of PWR HAL module.
Kojto 112:6f327212ef96 8 ******************************************************************************
Kojto 112:6f327212ef96 9 * @attention
Kojto 112:6f327212ef96 10 *
Kojto 112:6f327212ef96 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 112:6f327212ef96 12 *
Kojto 112:6f327212ef96 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 112:6f327212ef96 14 * are permitted provided that the following conditions are met:
Kojto 112:6f327212ef96 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 112:6f327212ef96 16 * this list of conditions and the following disclaimer.
Kojto 112:6f327212ef96 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 112:6f327212ef96 18 * this list of conditions and the following disclaimer in the documentation
Kojto 112:6f327212ef96 19 * and/or other materials provided with the distribution.
Kojto 112:6f327212ef96 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 112:6f327212ef96 21 * may be used to endorse or promote products derived from this software
Kojto 112:6f327212ef96 22 * without specific prior written permission.
Kojto 112:6f327212ef96 23 *
Kojto 112:6f327212ef96 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 112:6f327212ef96 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 112:6f327212ef96 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 112:6f327212ef96 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 112:6f327212ef96 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 112:6f327212ef96 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 112:6f327212ef96 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 112:6f327212ef96 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 112:6f327212ef96 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 112:6f327212ef96 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 112:6f327212ef96 34 *
Kojto 112:6f327212ef96 35 ******************************************************************************
Kojto 112:6f327212ef96 36 */
Kojto 112:6f327212ef96 37
Kojto 112:6f327212ef96 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 112:6f327212ef96 39 #ifndef __STM32L1xx_HAL_PWR_H
Kojto 112:6f327212ef96 40 #define __STM32L1xx_HAL_PWR_H
Kojto 112:6f327212ef96 41
Kojto 112:6f327212ef96 42 #ifdef __cplusplus
Kojto 112:6f327212ef96 43 extern "C" {
Kojto 112:6f327212ef96 44 #endif
Kojto 112:6f327212ef96 45
Kojto 112:6f327212ef96 46 /* Includes ------------------------------------------------------------------*/
Kojto 112:6f327212ef96 47 #include "stm32l1xx_hal_def.h"
Kojto 112:6f327212ef96 48
Kojto 112:6f327212ef96 49 /** @addtogroup STM32L1xx_HAL_Driver
Kojto 112:6f327212ef96 50 * @{
Kojto 112:6f327212ef96 51 */
Kojto 112:6f327212ef96 52
Kojto 112:6f327212ef96 53 /** @addtogroup PWR
Kojto 112:6f327212ef96 54 * @{
Kojto 112:6f327212ef96 55 */
Kojto 112:6f327212ef96 56
Kojto 112:6f327212ef96 57 /* Exported types ------------------------------------------------------------*/
Kojto 112:6f327212ef96 58
Kojto 112:6f327212ef96 59 /** @defgroup PWR_Exported_Types PWR Exported Types
Kojto 112:6f327212ef96 60 * @{
Kojto 112:6f327212ef96 61 */
Kojto 112:6f327212ef96 62
Kojto 112:6f327212ef96 63 /**
Kojto 112:6f327212ef96 64 * @brief PWR PVD configuration structure definition
Kojto 112:6f327212ef96 65 */
Kojto 112:6f327212ef96 66 typedef struct
Kojto 112:6f327212ef96 67 {
Kojto 112:6f327212ef96 68 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
Kojto 112:6f327212ef96 69 This parameter can be a value of @ref PWR_PVD_detection_level */
Kojto 112:6f327212ef96 70
Kojto 112:6f327212ef96 71 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
Kojto 112:6f327212ef96 72 This parameter can be a value of @ref PWR_PVD_Mode */
Kojto 112:6f327212ef96 73 }PWR_PVDTypeDef;
Kojto 112:6f327212ef96 74
Kojto 112:6f327212ef96 75 /**
Kojto 112:6f327212ef96 76 * @}
Kojto 112:6f327212ef96 77 */
Kojto 112:6f327212ef96 78
Kojto 112:6f327212ef96 79 /* Exported constants --------------------------------------------------------*/
Kojto 112:6f327212ef96 80
Kojto 112:6f327212ef96 81 /** @defgroup PWR_Exported_Constants PWR Exported Constants
Kojto 112:6f327212ef96 82 * @{
Kojto 112:6f327212ef96 83 */
Kojto 112:6f327212ef96 84
Kojto 112:6f327212ef96 85 /** @defgroup PWR_register_alias_address PWR Register alias address
Kojto 112:6f327212ef96 86 * @{
Kojto 112:6f327212ef96 87 */
Kojto 112:6f327212ef96 88 /* ------------- PWR registers bit address in the alias region ---------------*/
Kojto 112:6f327212ef96 89 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
Kojto 112:6f327212ef96 90 #define PWR_CR_OFFSET 0x00
Kojto 112:6f327212ef96 91 #define PWR_CSR_OFFSET 0x04
Kojto 112:6f327212ef96 92 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
Kojto 112:6f327212ef96 93 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
Kojto 112:6f327212ef96 94 /**
Kojto 112:6f327212ef96 95 * @}
Kojto 112:6f327212ef96 96 */
Kojto 112:6f327212ef96 97
Kojto 112:6f327212ef96 98 /** @defgroup PWR_CR_register_alias PWR CR Register alias address
Kojto 112:6f327212ef96 99 * @{
Kojto 112:6f327212ef96 100 */
Kojto 112:6f327212ef96 101 /* --- CR Register ---*/
Kojto 112:6f327212ef96 102 /* Alias word address of LPSDSR bit */
Kojto 112:6f327212ef96 103 #define LPSDSR_BIT_NUMBER POSITION_VAL(PWR_CR_LPSDSR)
Kojto 112:6f327212ef96 104 #define CR_LPSDSR_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPSDSR_BIT_NUMBER * 4)))
Kojto 112:6f327212ef96 105
Kojto 112:6f327212ef96 106 /* Alias word address of DBP bit */
Kojto 112:6f327212ef96 107 #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP)
Kojto 112:6f327212ef96 108 #define CR_DBP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (DBP_BIT_NUMBER * 4)))
Kojto 112:6f327212ef96 109
Kojto 112:6f327212ef96 110 /* Alias word address of LPRUN bit */
Kojto 112:6f327212ef96 111 #define LPRUN_BIT_NUMBER POSITION_VAL(PWR_CR_LPRUN)
Kojto 112:6f327212ef96 112 #define CR_LPRUN_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPRUN_BIT_NUMBER * 4)))
Kojto 112:6f327212ef96 113
Kojto 112:6f327212ef96 114 /* Alias word address of PVDE bit */
Kojto 112:6f327212ef96 115 #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE)
Kojto 112:6f327212ef96 116 #define CR_PVDE_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PVDE_BIT_NUMBER * 4)))
Kojto 112:6f327212ef96 117
Kojto 112:6f327212ef96 118 /* Alias word address of FWU bit */
Kojto 112:6f327212ef96 119 #define FWU_BIT_NUMBER POSITION_VAL(PWR_CR_FWU)
Kojto 112:6f327212ef96 120 #define CR_FWU_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FWU_BIT_NUMBER * 4)))
Kojto 112:6f327212ef96 121
Kojto 112:6f327212ef96 122 /* Alias word address of ULP bit */
Kojto 112:6f327212ef96 123 #define ULP_BIT_NUMBER POSITION_VAL(PWR_CR_ULP)
Kojto 112:6f327212ef96 124 #define CR_ULP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ULP_BIT_NUMBER * 4)))
Kojto 112:6f327212ef96 125 /**
Kojto 112:6f327212ef96 126 * @}
Kojto 112:6f327212ef96 127 */
Kojto 112:6f327212ef96 128
Kojto 112:6f327212ef96 129 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
Kojto 112:6f327212ef96 130 * @{
Kojto 112:6f327212ef96 131 */
Kojto 112:6f327212ef96 132
Kojto 112:6f327212ef96 133 /* --- CSR Register ---*/
Kojto 112:6f327212ef96 134 /* Alias word address of EWUP1, EWUP2 and EWUP3 bits */
Kojto 112:6f327212ef96 135 #define CSR_EWUP_BB(VAL) ((uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (POSITION_VAL(VAL) * 4)))
Kojto 112:6f327212ef96 136 /**
Kojto 112:6f327212ef96 137 * @}
Kojto 112:6f327212ef96 138 */
Kojto 112:6f327212ef96 139
Kojto 112:6f327212ef96 140 /** @defgroup PWR_PVD_detection_level PWR PVD detection level
Kojto 112:6f327212ef96 141 * @{
Kojto 112:6f327212ef96 142 */
Kojto 112:6f327212ef96 143 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
Kojto 112:6f327212ef96 144 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
Kojto 112:6f327212ef96 145 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
Kojto 112:6f327212ef96 146 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
Kojto 112:6f327212ef96 147 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
Kojto 112:6f327212ef96 148 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
Kojto 112:6f327212ef96 149 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
Kojto 112:6f327212ef96 150 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 /* External input analog voltage
Kojto 112:6f327212ef96 151 (Compare internally to VREFINT) */
Kojto 112:6f327212ef96 152 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
Kojto 112:6f327212ef96 153 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
Kojto 112:6f327212ef96 154 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
Kojto 112:6f327212ef96 155 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
Kojto 112:6f327212ef96 156 /**
Kojto 112:6f327212ef96 157 * @}
Kojto 112:6f327212ef96 158 */
Kojto 112:6f327212ef96 159
Kojto 112:6f327212ef96 160 /** @defgroup PWR_PVD_Mode PWR PVD Mode
Kojto 112:6f327212ef96 161 * @{
Kojto 112:6f327212ef96 162 */
Kojto 112:6f327212ef96 163 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */
Kojto 112:6f327212ef96 164 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
Kojto 112:6f327212ef96 165 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
Kojto 112:6f327212ef96 166 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
Kojto 112:6f327212ef96 167 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
Kojto 112:6f327212ef96 168 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
Kojto 112:6f327212ef96 169 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
Kojto 112:6f327212ef96 170
Kojto 112:6f327212ef96 171 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
Kojto 112:6f327212ef96 172 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
Kojto 112:6f327212ef96 173 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
Kojto 112:6f327212ef96 174 ((MODE) == PWR_PVD_MODE_NORMAL))
Kojto 112:6f327212ef96 175 /**
Kojto 112:6f327212ef96 176 * @}
Kojto 112:6f327212ef96 177 */
Kojto 112:6f327212ef96 178
Kojto 112:6f327212ef96 179 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
Kojto 112:6f327212ef96 180 * @{
Kojto 112:6f327212ef96 181 */
Kojto 112:6f327212ef96 182 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000)
Kojto 112:6f327212ef96 183 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPSDSR
Kojto 112:6f327212ef96 184
Kojto 112:6f327212ef96 185 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
Kojto 112:6f327212ef96 186 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
Kojto 112:6f327212ef96 187 /**
Kojto 112:6f327212ef96 188 * @}
Kojto 112:6f327212ef96 189 */
Kojto 112:6f327212ef96 190
Kojto 112:6f327212ef96 191 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
Kojto 112:6f327212ef96 192 * @{
Kojto 112:6f327212ef96 193 */
Kojto 112:6f327212ef96 194 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
Kojto 112:6f327212ef96 195 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
Kojto 112:6f327212ef96 196 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
Kojto 112:6f327212ef96 197 /**
Kojto 112:6f327212ef96 198 * @}
Kojto 112:6f327212ef96 199 */
Kojto 112:6f327212ef96 200
Kojto 112:6f327212ef96 201 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
Kojto 112:6f327212ef96 202 * @{
Kojto 112:6f327212ef96 203 */
Kojto 112:6f327212ef96 204 #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
Kojto 112:6f327212ef96 205 #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
Kojto 112:6f327212ef96 206 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) )
Kojto 112:6f327212ef96 207 /**
Kojto 112:6f327212ef96 208 * @}
Kojto 112:6f327212ef96 209 */
Kojto 112:6f327212ef96 210
Kojto 112:6f327212ef96 211 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
Kojto 112:6f327212ef96 212 * @{
Kojto 112:6f327212ef96 213 */
Kojto 112:6f327212ef96 214
Kojto 112:6f327212ef96 215 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS_0
Kojto 112:6f327212ef96 216 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1
Kojto 112:6f327212ef96 217 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS
Kojto 112:6f327212ef96 218
Kojto 112:6f327212ef96 219 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
Kojto 112:6f327212ef96 220 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
Kojto 112:6f327212ef96 221 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
Kojto 112:6f327212ef96 222 /**
Kojto 112:6f327212ef96 223 * @}
Kojto 112:6f327212ef96 224 */
Kojto 112:6f327212ef96 225
Kojto 112:6f327212ef96 226 /** @defgroup PWR_Flag PWR Flag
Kojto 112:6f327212ef96 227 * @{
Kojto 112:6f327212ef96 228 */
Kojto 112:6f327212ef96 229 #define PWR_FLAG_WU PWR_CSR_WUF
Kojto 112:6f327212ef96 230 #define PWR_FLAG_SB PWR_CSR_SBF
Kojto 112:6f327212ef96 231 #define PWR_FLAG_PVDO PWR_CSR_PVDO
Kojto 112:6f327212ef96 232 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
Kojto 112:6f327212ef96 233 #define PWR_FLAG_VOS PWR_CSR_VOSF
Kojto 112:6f327212ef96 234 #define PWR_FLAG_REGLP PWR_CSR_REGLPF
Kojto 112:6f327212ef96 235
Kojto 112:6f327212ef96 236 /**
Kojto 112:6f327212ef96 237 * @}
Kojto 112:6f327212ef96 238 */
Kojto 112:6f327212ef96 239
Kojto 112:6f327212ef96 240 /**
Kojto 112:6f327212ef96 241 * @}
Kojto 112:6f327212ef96 242 */
Kojto 112:6f327212ef96 243
Kojto 112:6f327212ef96 244 /* Exported macro ------------------------------------------------------------*/
Kojto 112:6f327212ef96 245 /** @defgroup PWR_Exported_Macro PWR Exported Macro
Kojto 112:6f327212ef96 246 * @{
Kojto 112:6f327212ef96 247 */
Kojto 112:6f327212ef96 248
Kojto 112:6f327212ef96 249 /** @brief macros configure the main internal regulator output voltage.
Kojto 112:6f327212ef96 250 * @param __REGULATOR__: specifies the regulator output voltage to achieve
Kojto 112:6f327212ef96 251 * a tradeoff between performance and power consumption when the device does
Kojto 112:6f327212ef96 252 * not operate at the maximum frequency (refer to the datasheets for more details).
Kojto 112:6f327212ef96 253 * This parameter can be one of the following values:
Kojto 112:6f327212ef96 254 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode,
Kojto 112:6f327212ef96 255 * System frequency up to 32 MHz.
Kojto 112:6f327212ef96 256 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode,
Kojto 112:6f327212ef96 257 * System frequency up to 16 MHz.
Kojto 112:6f327212ef96 258 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode,
Kojto 112:6f327212ef96 259 * System frequency up to 4.2 MHz
Kojto 112:6f327212ef96 260 * @retval None
Kojto 112:6f327212ef96 261 */
Kojto 112:6f327212ef96 262 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
Kojto 112:6f327212ef96 263
Kojto 112:6f327212ef96 264 /** @brief Check PWR flag is set or not.
Kojto 112:6f327212ef96 265 * @param __FLAG__: specifies the flag to check.
Kojto 112:6f327212ef96 266 * This parameter can be one of the following values:
Kojto 112:6f327212ef96 267 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
Kojto 112:6f327212ef96 268 * was received from the WKUP pin or from the RTC alarm (Alarm B),
Kojto 112:6f327212ef96 269 * RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
Kojto 112:6f327212ef96 270 * An additional wakeup event is detected if the WKUP pin is enabled
Kojto 112:6f327212ef96 271 * (by setting the EWUP bit) when the WKUP pin level is already high.
Kojto 112:6f327212ef96 272 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
Kojto 112:6f327212ef96 273 * resumed from StandBy mode.
Kojto 112:6f327212ef96 274 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
Kojto 112:6f327212ef96 275 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
Kojto 112:6f327212ef96 276 * For this reason, this bit is equal to 0 after Standby or reset
Kojto 112:6f327212ef96 277 * until the PVDE bit is set.
Kojto 112:6f327212ef96 278 * @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag.
Kojto 112:6f327212ef96 279 * This bit indicates the state of the internal voltage reference, VREFINT.
Kojto 112:6f327212ef96 280 * @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for
Kojto 112:6f327212ef96 281 * the internal regulator to be ready after the voltage range is changed.
Kojto 112:6f327212ef96 282 * The VOSF bit indicates that the regulator has reached the voltage level
Kojto 112:6f327212ef96 283 * defined with bits VOS of PWR_CR register.
Kojto 112:6f327212ef96 284 * @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run
Kojto 112:6f327212ef96 285 * mode, this bit stays at 1 until the regulator is ready in main mode.
Kojto 112:6f327212ef96 286 * A polling on this bit is recommended to wait for the regulator main mode.
Kojto 112:6f327212ef96 287 * This bit is reset by hardware when the regulator is ready.
Kojto 112:6f327212ef96 288 * @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto 112:6f327212ef96 289 */
Kojto 112:6f327212ef96 290 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
Kojto 112:6f327212ef96 291
Kojto 112:6f327212ef96 292 /** @brief Clear the PWR's pending flags.
Kojto 112:6f327212ef96 293 * @param __FLAG__: specifies the flag to clear.
Kojto 112:6f327212ef96 294 * This parameter can be one of the following values:
Kojto 112:6f327212ef96 295 * @arg PWR_FLAG_WU: Wake Up flag
Kojto 112:6f327212ef96 296 * @arg PWR_FLAG_SB: StandBy flag
Kojto 112:6f327212ef96 297 */
Kojto 112:6f327212ef96 298 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2)
Kojto 112:6f327212ef96 299
Kojto 112:6f327212ef96 300 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
Kojto 112:6f327212ef96 301
Kojto 112:6f327212ef96 302 /**
Kojto 112:6f327212ef96 303 * @brief Enable interrupt on PVD Exti Line 16.
Kojto 112:6f327212ef96 304 * @retval None.
Kojto 112:6f327212ef96 305 */
Kojto 112:6f327212ef96 306 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
Kojto 112:6f327212ef96 307
Kojto 112:6f327212ef96 308 /**
Kojto 112:6f327212ef96 309 * @brief Disable interrupt on PVD Exti Line 16.
Kojto 112:6f327212ef96 310 * @retval None.
Kojto 112:6f327212ef96 311 */
Kojto 112:6f327212ef96 312 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
Kojto 112:6f327212ef96 313
Kojto 112:6f327212ef96 314 /**
Kojto 112:6f327212ef96 315 * @brief Enable event on PVD Exti Line 16.
Kojto 112:6f327212ef96 316 * @retval None.
Kojto 112:6f327212ef96 317 */
Kojto 112:6f327212ef96 318 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
Kojto 112:6f327212ef96 319
Kojto 112:6f327212ef96 320 /**
Kojto 112:6f327212ef96 321 * @brief Disable event on PVD Exti Line 16.
Kojto 112:6f327212ef96 322 * @retval None.
Kojto 112:6f327212ef96 323 */
Kojto 112:6f327212ef96 324 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
Kojto 112:6f327212ef96 325
Kojto 112:6f327212ef96 326 /**
Kojto 112:6f327212ef96 327 * @brief PVD EXTI line configuration: clear falling edge trigger and set rising edge.
Kojto 112:6f327212ef96 328 * @retval None.
Kojto 112:6f327212ef96 329 */
Kojto 112:6f327212ef96 330 #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_PVD); \
Kojto 112:6f327212ef96 331 EXTI->RTSR &= ~(PWR_EXTI_LINE_PVD)
Kojto 112:6f327212ef96 332
Kojto 112:6f327212ef96 333 /**
Kojto 112:6f327212ef96 334 * @brief PVD EXTI line configuration: set falling edge trigger.
Kojto 112:6f327212ef96 335 * @retval None.
Kojto 112:6f327212ef96 336 */
Kojto 112:6f327212ef96 337 #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_PVD)
Kojto 112:6f327212ef96 338
Kojto 112:6f327212ef96 339 /**
Kojto 112:6f327212ef96 340 * @brief PVD EXTI line configuration: set rising edge trigger.
Kojto 112:6f327212ef96 341 * @retval None.
Kojto 112:6f327212ef96 342 */
Kojto 112:6f327212ef96 343 #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER() EXTI->RTSR |= (PWR_EXTI_LINE_PVD)
Kojto 112:6f327212ef96 344
Kojto 112:6f327212ef96 345 /**
Kojto 112:6f327212ef96 346 * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
Kojto 112:6f327212ef96 347 * @retval EXTI PVD Line Status.
Kojto 112:6f327212ef96 348 */
Kojto 112:6f327212ef96 349 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
Kojto 112:6f327212ef96 350
Kojto 112:6f327212ef96 351 /**
Kojto 112:6f327212ef96 352 * @brief Clear the PVD EXTI flag.
Kojto 112:6f327212ef96 353 * @retval None.
Kojto 112:6f327212ef96 354 */
Kojto 112:6f327212ef96 355 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
Kojto 112:6f327212ef96 356
Kojto 112:6f327212ef96 357 /**
Kojto 112:6f327212ef96 358 * @brief Generate a Software interrupt on selected EXTI line.
Kojto 112:6f327212ef96 359 * @retval None.
Kojto 112:6f327212ef96 360 */
Kojto 112:6f327212ef96 361 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
Kojto 112:6f327212ef96 362 /**
Kojto 112:6f327212ef96 363 * @}
Kojto 112:6f327212ef96 364 */
Kojto 112:6f327212ef96 365
Kojto 112:6f327212ef96 366 /* Include PWR HAL Extension module */
Kojto 112:6f327212ef96 367 #include "stm32l1xx_hal_pwr_ex.h"
Kojto 112:6f327212ef96 368
Kojto 112:6f327212ef96 369 /* Exported functions --------------------------------------------------------*/
Kojto 112:6f327212ef96 370
Kojto 112:6f327212ef96 371 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
Kojto 112:6f327212ef96 372 * @{
Kojto 112:6f327212ef96 373 */
Kojto 112:6f327212ef96 374
Kojto 112:6f327212ef96 375 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 112:6f327212ef96 376 * @{
Kojto 112:6f327212ef96 377 */
Kojto 112:6f327212ef96 378
Kojto 112:6f327212ef96 379 /* Initialization and de-initialization functions *******************************/
Kojto 112:6f327212ef96 380 void HAL_PWR_DeInit(void);
Kojto 112:6f327212ef96 381 void HAL_PWR_EnableBkUpAccess(void);
Kojto 112:6f327212ef96 382 void HAL_PWR_DisableBkUpAccess(void);
Kojto 112:6f327212ef96 383
Kojto 112:6f327212ef96 384 /**
Kojto 112:6f327212ef96 385 * @}
Kojto 112:6f327212ef96 386 */
Kojto 112:6f327212ef96 387
Kojto 112:6f327212ef96 388 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
Kojto 112:6f327212ef96 389 * @{
Kojto 112:6f327212ef96 390 */
Kojto 112:6f327212ef96 391
Kojto 112:6f327212ef96 392 /* Peripheral Control functions ************************************************/
Kojto 112:6f327212ef96 393 void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD);
Kojto 112:6f327212ef96 394 void HAL_PWR_EnablePVD(void);
Kojto 112:6f327212ef96 395 void HAL_PWR_DisablePVD(void);
Kojto 112:6f327212ef96 396
Kojto 112:6f327212ef96 397 /* WakeUp pins configuration functions ****************************************/
Kojto 112:6f327212ef96 398 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
Kojto 112:6f327212ef96 399 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
Kojto 112:6f327212ef96 400
Kojto 112:6f327212ef96 401 /* Low Power modes configuration functions ************************************/
Kojto 112:6f327212ef96 402 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
Kojto 112:6f327212ef96 403 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
Kojto 112:6f327212ef96 404 void HAL_PWR_EnterSTANDBYMode(void);
Kojto 112:6f327212ef96 405
Kojto 112:6f327212ef96 406 void HAL_PWR_PVD_IRQHandler(void);
Kojto 112:6f327212ef96 407 void HAL_PWR_PVDCallback(void);
Kojto 112:6f327212ef96 408 /**
Kojto 112:6f327212ef96 409 * @}
Kojto 112:6f327212ef96 410 */
Kojto 112:6f327212ef96 411
Kojto 112:6f327212ef96 412 /**
Kojto 112:6f327212ef96 413 * @}
Kojto 112:6f327212ef96 414 */
Kojto 112:6f327212ef96 415
Kojto 112:6f327212ef96 416 /**
Kojto 112:6f327212ef96 417 * @}
Kojto 112:6f327212ef96 418 */
Kojto 112:6f327212ef96 419
Kojto 112:6f327212ef96 420 /**
Kojto 112:6f327212ef96 421 * @}
Kojto 112:6f327212ef96 422 */
Kojto 112:6f327212ef96 423
Kojto 112:6f327212ef96 424 #ifdef __cplusplus
Kojto 112:6f327212ef96 425 }
Kojto 112:6f327212ef96 426 #endif
Kojto 112:6f327212ef96 427
Kojto 112:6f327212ef96 428
Kojto 112:6f327212ef96 429 #endif /* __STM32L1xx_HAL_PWR_H */
Kojto 112:6f327212ef96 430
Kojto 112:6f327212ef96 431 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/