Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

TARGET_MAXWSNENV/spi_regs.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
111:4336505e4b1c 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 99:dbbf35b96557 1 /*******************************************************************************
Kojto 99:dbbf35b96557 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
Kojto 99:dbbf35b96557 3 *
Kojto 99:dbbf35b96557 4 * Permission is hereby granted, free of charge, to any person obtaining a
Kojto 99:dbbf35b96557 5 * copy of this software and associated documentation files (the "Software"),
Kojto 99:dbbf35b96557 6 * to deal in the Software without restriction, including without limitation
Kojto 99:dbbf35b96557 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
Kojto 99:dbbf35b96557 8 * and/or sell copies of the Software, and to permit persons to whom the
Kojto 99:dbbf35b96557 9 * Software is furnished to do so, subject to the following conditions:
Kojto 99:dbbf35b96557 10 *
Kojto 99:dbbf35b96557 11 * The above copyright notice and this permission notice shall be included
Kojto 99:dbbf35b96557 12 * in all copies or substantial portions of the Software.
Kojto 99:dbbf35b96557 13 *
Kojto 99:dbbf35b96557 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
Kojto 99:dbbf35b96557 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
Kojto 99:dbbf35b96557 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
Kojto 99:dbbf35b96557 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
Kojto 99:dbbf35b96557 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
Kojto 99:dbbf35b96557 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
Kojto 99:dbbf35b96557 20 * OTHER DEALINGS IN THE SOFTWARE.
Kojto 99:dbbf35b96557 21 *
Kojto 99:dbbf35b96557 22 * Except as contained in this notice, the name of Maxim Integrated
Kojto 99:dbbf35b96557 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
Kojto 99:dbbf35b96557 24 * Products, Inc. Branding Policy.
Kojto 99:dbbf35b96557 25 *
Kojto 99:dbbf35b96557 26 * The mere transfer of this software does not imply any licenses
Kojto 99:dbbf35b96557 27 * of trade secrets, proprietary technology, copyrights, patents,
Kojto 99:dbbf35b96557 28 * trademarks, maskwork rights, or any other form of intellectual
Kojto 99:dbbf35b96557 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
Kojto 99:dbbf35b96557 30 * ownership rights.
Kojto 99:dbbf35b96557 31 *******************************************************************************
Kojto 99:dbbf35b96557 32 */
Kojto 99:dbbf35b96557 33
Kojto 99:dbbf35b96557 34 #ifndef _MXC_SPI_REGS_H
Kojto 99:dbbf35b96557 35 #define _MXC_SPI_REGS_H
Kojto 99:dbbf35b96557 36
Kojto 99:dbbf35b96557 37 #ifdef __cplusplus
Kojto 99:dbbf35b96557 38 extern "C" {
Kojto 99:dbbf35b96557 39 #endif
Kojto 99:dbbf35b96557 40
Kojto 99:dbbf35b96557 41 #include <stdint.h>
Kojto 99:dbbf35b96557 42
Kojto 99:dbbf35b96557 43 /**
Kojto 99:dbbf35b96557 44 * @file spi_regs.h
Kojto 99:dbbf35b96557 45 * @addtogroup spi SPI
Kojto 99:dbbf35b96557 46 * @{
Kojto 99:dbbf35b96557 47 */
Kojto 99:dbbf35b96557 48
Kojto 99:dbbf35b96557 49 /* Offset Register Description
Kojto 99:dbbf35b96557 50 ====== ============================================ */
Kojto 99:dbbf35b96557 51 typedef struct {
Kojto 99:dbbf35b96557 52 __IO uint32_t mstr_cfg; /* 0x0000 SPI Master Configuration Register */
Kojto 99:dbbf35b96557 53 __IO uint32_t ss_sr_polarity; /* 0x0004 Polarity Control for SS and SR Signals */
Kojto 99:dbbf35b96557 54 __IO uint32_t gen_ctrl; /* 0x0008 SPI Master General Control Register */
Kojto 99:dbbf35b96557 55 __IO uint32_t fifo_ctrl; /* 0x000C SPI Master FIFO Control Register */
Kojto 99:dbbf35b96557 56 __IO uint32_t spcl_ctrl; /* 0x0010 SPI Master Special Mode Controls */
Kojto 99:dbbf35b96557 57 __IO uint32_t intfl; /* 0x0014 SPI Master Interrupt Flags */
Kojto 99:dbbf35b96557 58 __IO uint32_t inten; /* 0x0018 SPI Master Interrupt Enable/Disable Settings */
Kojto 99:dbbf35b96557 59 __I uint32_t rsv001C; /* 0x001C Deprecated - was SPI_AHB_RETRY */
Kojto 99:dbbf35b96557 60 } mxc_spi_regs_t;
Kojto 99:dbbf35b96557 61
Kojto 99:dbbf35b96557 62 /**
Kojto 99:dbbf35b96557 63 * @brief TX FIFO register. Can do 8, 16, or 32 bit access.
Kojto 99:dbbf35b96557 64 */
Kojto 99:dbbf35b96557 65 typedef struct {
Kojto 99:dbbf35b96557 66 union {
Kojto 99:dbbf35b96557 67 __O uint8_t txfifo_8;
Kojto 99:dbbf35b96557 68 __O uint16_t txfifo_16;
Kojto 99:dbbf35b96557 69 __O uint32_t txfifo_32;
Kojto 99:dbbf35b96557 70 };
Kojto 99:dbbf35b96557 71 } mxc_spi_txfifo_regs_t;
Kojto 99:dbbf35b96557 72
Kojto 99:dbbf35b96557 73 /**
Kojto 99:dbbf35b96557 74 * @brief RX FIFO register. Can do 8, 16, or 32 bit access.
Kojto 99:dbbf35b96557 75 */
Kojto 99:dbbf35b96557 76 typedef struct {
Kojto 99:dbbf35b96557 77 union {
Kojto 99:dbbf35b96557 78 __I uint8_t rxfifo_8;
Kojto 99:dbbf35b96557 79 __I uint16_t rxfifo_16;
Kojto 99:dbbf35b96557 80 __I uint32_t rxfifo_32;
Kojto 99:dbbf35b96557 81 };
Kojto 99:dbbf35b96557 82 } mxc_spi_rxfifo_regs_t;
Kojto 99:dbbf35b96557 83
Kojto 99:dbbf35b96557 84 /*
Kojto 99:dbbf35b96557 85 Register offsets for module SPI.
Kojto 99:dbbf35b96557 86 */
Kojto 99:dbbf35b96557 87 #define MXC_R_SPI_OFFS_MSTR_CFG ((uint32_t)0x00000000UL)
Kojto 99:dbbf35b96557 88 #define MXC_R_SPI_OFFS_SS_SR_POLARITY ((uint32_t)0x00000004UL)
Kojto 99:dbbf35b96557 89 #define MXC_R_SPI_OFFS_GEN_CTRL ((uint32_t)0x00000008UL)
Kojto 99:dbbf35b96557 90 #define MXC_R_SPI_OFFS_FIFO_CTRL ((uint32_t)0x0000000CUL)
Kojto 99:dbbf35b96557 91 #define MXC_R_SPI_OFFS_SPCL_CTRL ((uint32_t)0x00000010UL)
Kojto 99:dbbf35b96557 92 #define MXC_R_SPI_OFFS_INTFL ((uint32_t)0x00000014UL)
Kojto 99:dbbf35b96557 93 #define MXC_R_SPI_OFFS_INTEN ((uint32_t)0x00000018UL)
Kojto 99:dbbf35b96557 94
Kojto 99:dbbf35b96557 95 #define MXC_R_SPI_FIFO_OFFS_TRANS ((uint32_t)0x00000000UL)
Kojto 99:dbbf35b96557 96 #define MXC_R_SPI_FIFO_OFFS_RSLTS ((uint32_t)0x00000800UL)
Kojto 99:dbbf35b96557 97
Kojto 99:dbbf35b96557 98 /*
Kojto 99:dbbf35b96557 99 Field positions and masks for module SPI.
Kojto 99:dbbf35b96557 100 */
Kojto 99:dbbf35b96557 101 #define MXC_F_SPI_MSTR_CFG_SLAVE_SEL_POS 0
Kojto 99:dbbf35b96557 102 #define MXC_F_SPI_MSTR_CFG_SLAVE_SEL ((uint32_t)(0x00000007UL << MXC_F_SPI_MSTR_CFG_SLAVE_SEL_POS))
Kojto 99:dbbf35b96557 103 #define MXC_F_SPI_MSTR_CFG_THREE_WIRE_MODE_POS 3
Kojto 99:dbbf35b96557 104 #define MXC_F_SPI_MSTR_CFG_THREE_WIRE_MODE ((uint32_t)(0x00000001UL << MXC_F_SPI_MSTR_CFG_THREE_WIRE_MODE_POS))
Kojto 99:dbbf35b96557 105 #define MXC_F_SPI_MSTR_CFG_SPI_MODE_POS 4
Kojto 99:dbbf35b96557 106 #define MXC_F_SPI_MSTR_CFG_SPI_MODE ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_SPI_MODE_POS))
Kojto 99:dbbf35b96557 107 #define MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS 6
Kojto 99:dbbf35b96557 108 #define MXC_F_SPI_MSTR_CFG_PAGE_SIZE ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS))
Kojto 99:dbbf35b96557 109 #define MXC_F_SPI_MSTR_CFG_SCK_HI_CLK_POS 8
Kojto 99:dbbf35b96557 110 #define MXC_F_SPI_MSTR_CFG_SCK_HI_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_SCK_HI_CLK_POS))
Kojto 99:dbbf35b96557 111 #define MXC_F_SPI_MSTR_CFG_SCK_LO_CLK_POS 12
Kojto 99:dbbf35b96557 112 #define MXC_F_SPI_MSTR_CFG_SCK_LO_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_SCK_LO_CLK_POS))
Kojto 99:dbbf35b96557 113 #define MXC_F_SPI_MSTR_CFG_ACT_DELAY_POS 16
Kojto 99:dbbf35b96557 114 #define MXC_F_SPI_MSTR_CFG_ACT_DELAY ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_ACT_DELAY_POS))
Kojto 99:dbbf35b96557 115 #define MXC_F_SPI_MSTR_CFG_INACT_DELAY_POS 18
Kojto 99:dbbf35b96557 116 #define MXC_F_SPI_MSTR_CFG_INACT_DELAY ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_INACT_DELAY_POS))
Kojto 99:dbbf35b96557 117 #define MXC_F_SPI_MSTR_CFG_ALT_SCK_HI_CLK_POS 20
Kojto 99:dbbf35b96557 118 #define MXC_F_SPI_MSTR_CFG_ALT_SCK_HI_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_ALT_SCK_HI_CLK_POS))
Kojto 99:dbbf35b96557 119 #define MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK_POS 24
Kojto 99:dbbf35b96557 120 #define MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK_POS))
Kojto 99:dbbf35b96557 121
Kojto 111:4336505e4b1c 122 #define MXC_V_SPI_MSTR_CFG_PAGE_SIZE_4B ((uint32_t)0x00000000UL)
Kojto 111:4336505e4b1c 123 #define MXC_V_SPI_MSTR_CFG_PAGE_SIZE_8B ((uint32_t)0x00000001UL)
Kojto 111:4336505e4b1c 124 #define MXC_V_SPI_MSTR_CFG_PAGE_SIZE_16B ((uint32_t)0x00000002UL)
Kojto 111:4336505e4b1c 125 #define MXC_V_SPI_MSTR_CFG_PAGE_SIZE_32B ((uint32_t)0x00000003UL)
Kojto 111:4336505e4b1c 126
Kojto 111:4336505e4b1c 127 #define MXC_S_SPI_MSTR_CFG_PAGE_4B (MXC_V_SPI_MSTR_CFG_PAGE_SIZE_4B << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS)
Kojto 111:4336505e4b1c 128 #define MXC_S_SPI_MSTR_CFG_PAGE_8B (MXC_V_SPI_MSTR_CFG_PAGE_SIZE_8B << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS)
Kojto 111:4336505e4b1c 129 #define MXC_S_SPI_MSTR_CFG_PAGE_16B (MXC_V_SPI_MSTR_CFG_PAGE_SIZE_16B << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS)
Kojto 111:4336505e4b1c 130 #define MXC_S_SPI_MSTR_CFG_PAGE_32B (MXC_V_SPI_MSTR_CFG_PAGE_SIZE_32B << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS)
Kojto 111:4336505e4b1c 131
Kojto 99:dbbf35b96557 132 #define MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY_POS 0
Kojto 99:dbbf35b96557 133 #define MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY ((uint32_t)(0x000000FFUL << MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY_POS))
Kojto 99:dbbf35b96557 134 #define MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY_POS 8
Kojto 99:dbbf35b96557 135 #define MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY ((uint32_t)(0x000000FFUL << MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY_POS))
Kojto 99:dbbf35b96557 136
Kojto 99:dbbf35b96557 137 #define MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN_POS 0
Kojto 99:dbbf35b96557 138 #define MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN_POS))
Kojto 99:dbbf35b96557 139 #define MXC_F_SPI_GEN_CTRL_TX_FIFO_EN_POS 1
Kojto 99:dbbf35b96557 140 #define MXC_F_SPI_GEN_CTRL_TX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_TX_FIFO_EN_POS))
Kojto 99:dbbf35b96557 141 #define MXC_F_SPI_GEN_CTRL_RX_FIFO_EN_POS 2
Kojto 99:dbbf35b96557 142 #define MXC_F_SPI_GEN_CTRL_RX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_RX_FIFO_EN_POS))
Kojto 99:dbbf35b96557 143 #define MXC_F_SPI_GEN_CTRL_BIT_BANG_MODE_POS 3
Kojto 99:dbbf35b96557 144 #define MXC_F_SPI_GEN_CTRL_BIT_BANG_MODE ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BIT_BANG_MODE_POS))
Kojto 99:dbbf35b96557 145 #define MXC_F_SPI_GEN_CTRL_BB_SS_IN_OUT_POS 4
Kojto 99:dbbf35b96557 146 #define MXC_F_SPI_GEN_CTRL_BB_SS_IN_OUT ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BB_SS_IN_OUT_POS))
Kojto 99:dbbf35b96557 147 #define MXC_F_SPI_GEN_CTRL_BB_SR_IN_POS 5
Kojto 99:dbbf35b96557 148 #define MXC_F_SPI_GEN_CTRL_BB_SR_IN ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BB_SR_IN_POS))
Kojto 99:dbbf35b96557 149 #define MXC_F_SPI_GEN_CTRL_BB_SCK_IN_OUT_POS 6
Kojto 99:dbbf35b96557 150 #define MXC_F_SPI_GEN_CTRL_BB_SCK_IN_OUT ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BB_SCK_IN_OUT_POS))
Kojto 99:dbbf35b96557 151 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_IN_POS 8
Kojto 99:dbbf35b96557 152 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_IN ((uint32_t)(0x0000000FUL << MXC_F_SPI_GEN_CTRL_BB_SDIO_IN_POS))
Kojto 99:dbbf35b96557 153 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_OUT_POS 12
Kojto 99:dbbf35b96557 154 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_OUT ((uint32_t)(0x0000000FUL << MXC_F_SPI_GEN_CTRL_BB_SDIO_OUT_POS))
Kojto 99:dbbf35b96557 155 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_DR_EN_POS 16
Kojto 99:dbbf35b96557 156 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_DR_EN ((uint32_t)(0x0000000FUL << MXC_F_SPI_GEN_CTRL_BB_SDIO_DR_EN_POS))
Kojto 99:dbbf35b96557 157
Kojto 99:dbbf35b96557 158 #define MXC_F_SPI_FIFO_CTRL_TX_FIFO_AE_LVL_POS 0
Kojto 99:dbbf35b96557 159 #define MXC_F_SPI_FIFO_CTRL_TX_FIFO_AE_LVL ((uint32_t)(0x0000000FUL << MXC_F_SPI_FIFO_CTRL_TX_FIFO_AE_LVL_POS))
Kojto 99:dbbf35b96557 160 #define MXC_F_SPI_FIFO_CTRL_TX_FIFO_USED_POS 8
Kojto 99:dbbf35b96557 161 #define MXC_F_SPI_FIFO_CTRL_TX_FIFO_USED ((uint32_t)(0x0000001FUL << MXC_F_SPI_FIFO_CTRL_TX_FIFO_USED_POS))
Kojto 99:dbbf35b96557 162 #define MXC_F_SPI_FIFO_CTRL_RX_FIFO_AF_LVL_POS 16
Kojto 99:dbbf35b96557 163 #define MXC_F_SPI_FIFO_CTRL_RX_FIFO_AF_LVL ((uint32_t)(0x0000001FUL << MXC_F_SPI_FIFO_CTRL_RX_FIFO_AF_LVL_POS))
Kojto 99:dbbf35b96557 164 #define MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED_POS 24
Kojto 99:dbbf35b96557 165 #define MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED ((uint32_t)(0x0000003FUL << MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED_POS))
Kojto 99:dbbf35b96557 166
Kojto 99:dbbf35b96557 167 #define MXC_F_SPI_SPCL_CTRL_SS_SAMPLE_MODE_POS 0
Kojto 99:dbbf35b96557 168 #define MXC_F_SPI_SPCL_CTRL_SS_SAMPLE_MODE ((uint32_t)(0x00000001UL << MXC_F_SPI_SPCL_CTRL_SS_SAMPLE_MODE_POS))
Kojto 99:dbbf35b96557 169 #define MXC_F_SPI_SPCL_CTRL_MISO_FC_EN_POS 1
Kojto 99:dbbf35b96557 170 #define MXC_F_SPI_SPCL_CTRL_MISO_FC_EN ((uint32_t)(0x00000001UL << MXC_F_SPI_SPCL_CTRL_MISO_FC_EN_POS))
Kojto 99:dbbf35b96557 171 #define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_OUT_POS 4
Kojto 99:dbbf35b96557 172 #define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_OUT ((uint32_t)(0x0000000FUL << MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_OUT_POS))
Kojto 99:dbbf35b96557 173 #define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_DR_EN_POS 8
Kojto 99:dbbf35b96557 174 #define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_DR_EN ((uint32_t)(0x0000000FUL << MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_DR_EN_POS))
Kojto 99:dbbf35b96557 175
Kojto 99:dbbf35b96557 176 #define MXC_F_SPI_INTFL_TX_STALLED_POS 0
Kojto 99:dbbf35b96557 177 #define MXC_F_SPI_INTFL_TX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_TX_STALLED_POS))
Kojto 99:dbbf35b96557 178 #define MXC_F_SPI_INTFL_RX_STALLED_POS 1
Kojto 99:dbbf35b96557 179 #define MXC_F_SPI_INTFL_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_RX_STALLED_POS))
Kojto 99:dbbf35b96557 180 #define MXC_F_SPI_INTFL_TX_READY_POS 2
Kojto 99:dbbf35b96557 181 #define MXC_F_SPI_INTFL_TX_READY ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_TX_READY_POS))
Kojto 99:dbbf35b96557 182 #define MXC_F_SPI_INTFL_RX_DONE_POS 3
Kojto 99:dbbf35b96557 183 #define MXC_F_SPI_INTFL_RX_DONE ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_RX_DONE_POS))
Kojto 99:dbbf35b96557 184 #define MXC_F_SPI_INTFL_TX_FIFO_AE_POS 4
Kojto 99:dbbf35b96557 185 #define MXC_F_SPI_INTFL_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_TX_FIFO_AE_POS))
Kojto 99:dbbf35b96557 186 #define MXC_F_SPI_INTFL_RX_FIFO_AF_POS 5
Kojto 99:dbbf35b96557 187 #define MXC_F_SPI_INTFL_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_RX_FIFO_AF_POS))
Kojto 99:dbbf35b96557 188
Kojto 99:dbbf35b96557 189 #define MXC_F_SPI_INTEN_TX_STALLED_POS 0
Kojto 99:dbbf35b96557 190 #define MXC_F_SPI_INTEN_TX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_TX_STALLED_POS))
Kojto 99:dbbf35b96557 191 #define MXC_F_SPI_INTEN_RX_STALLED_POS 1
Kojto 99:dbbf35b96557 192 #define MXC_F_SPI_INTEN_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_RX_STALLED_POS))
Kojto 99:dbbf35b96557 193 #define MXC_F_SPI_INTEN_TX_READY_POS 2
Kojto 99:dbbf35b96557 194 #define MXC_F_SPI_INTEN_TX_READY ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_TX_READY_POS))
Kojto 99:dbbf35b96557 195 #define MXC_F_SPI_INTEN_RX_DONE_POS 3
Kojto 99:dbbf35b96557 196 #define MXC_F_SPI_INTEN_RX_DONE ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_RX_DONE_POS))
Kojto 99:dbbf35b96557 197 #define MXC_F_SPI_INTEN_TX_FIFO_AE_POS 4
Kojto 99:dbbf35b96557 198 #define MXC_F_SPI_INTEN_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_TX_FIFO_AE_POS))
Kojto 99:dbbf35b96557 199 #define MXC_F_SPI_INTEN_RX_FIFO_AF_POS 5
Kojto 99:dbbf35b96557 200 #define MXC_F_SPI_INTEN_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_RX_FIFO_AF_POS))
Kojto 99:dbbf35b96557 201
Kojto 99:dbbf35b96557 202 #define MXC_F_SPI_FIFO_DIR_POS 0
Kojto 99:dbbf35b96557 203 #define MXC_F_SPI_FIFO_DIR ((uint32_t)(0x00000003UL << MXC_F_SPI_FIFO_DIR_POS))
Kojto 99:dbbf35b96557 204 #define MXC_F_SPI_FIFO_UNIT_POS 2
Kojto 99:dbbf35b96557 205 #define MXC_F_SPI_FIFO_UNIT ((uint32_t)(0x00000003UL << MXC_F_SPI_FIFO_UNIT_POS))
Kojto 99:dbbf35b96557 206 #define MXC_F_SPI_FIFO_SIZE_POS 4
Kojto 99:dbbf35b96557 207 #define MXC_F_SPI_FIFO_SIZE ((uint32_t)(0x0000000FUL << MXC_F_SPI_FIFO_SIZE_POS))
Kojto 99:dbbf35b96557 208 #define MXC_F_SPI_FIFO_WIDTH_POS 9
Kojto 99:dbbf35b96557 209 #define MXC_F_SPI_FIFO_WIDTH ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_WIDTH_POS))
Kojto 99:dbbf35b96557 210 #define MXC_F_SPI_FIFO_ALT_POS 11
Kojto 99:dbbf35b96557 211 #define MXC_F_SPI_FIFO_ALT ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_ALT_POS))
Kojto 99:dbbf35b96557 212 #define MXC_F_SPI_FIFO_FLOW_POS 12
Kojto 99:dbbf35b96557 213 #define MXC_F_SPI_FIFO_FLOW ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_FLOW_POS))
Kojto 99:dbbf35b96557 214 #define MXC_F_SPI_FIFO_DASS_POS 13
Kojto 99:dbbf35b96557 215 #define MXC_F_SPI_FIFO_DASS ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_DASS_POS))
Kojto 99:dbbf35b96557 216
Kojto 99:dbbf35b96557 217 #ifdef __cplusplus
Kojto 99:dbbf35b96557 218 }
Kojto 99:dbbf35b96557 219 #endif
Kojto 99:dbbf35b96557 220
Kojto 99:dbbf35b96557 221 /**
Kojto 99:dbbf35b96557 222 * @}
Kojto 99:dbbf35b96557 223 */
Kojto 99:dbbf35b96557 224
Kojto 99:dbbf35b96557 225 #endif /* _MXC_SPI_REGS_H */