Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

TARGET_MAXWSNENV/flc_regs.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
99:dbbf35b96557 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 99:dbbf35b96557 1 /*******************************************************************************
Kojto 99:dbbf35b96557 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
Kojto 99:dbbf35b96557 3 *
Kojto 99:dbbf35b96557 4 * Permission is hereby granted, free of charge, to any person obtaining a
Kojto 99:dbbf35b96557 5 * copy of this software and associated documentation files (the "Software"),
Kojto 99:dbbf35b96557 6 * to deal in the Software without restriction, including without limitation
Kojto 99:dbbf35b96557 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
Kojto 99:dbbf35b96557 8 * and/or sell copies of the Software, and to permit persons to whom the
Kojto 99:dbbf35b96557 9 * Software is furnished to do so, subject to the following conditions:
Kojto 99:dbbf35b96557 10 *
Kojto 99:dbbf35b96557 11 * The above copyright notice and this permission notice shall be included
Kojto 99:dbbf35b96557 12 * in all copies or substantial portions of the Software.
Kojto 99:dbbf35b96557 13 *
Kojto 99:dbbf35b96557 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
Kojto 99:dbbf35b96557 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
Kojto 99:dbbf35b96557 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
Kojto 99:dbbf35b96557 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
Kojto 99:dbbf35b96557 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
Kojto 99:dbbf35b96557 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
Kojto 99:dbbf35b96557 20 * OTHER DEALINGS IN THE SOFTWARE.
Kojto 99:dbbf35b96557 21 *
Kojto 99:dbbf35b96557 22 * Except as contained in this notice, the name of Maxim Integrated
Kojto 99:dbbf35b96557 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
Kojto 99:dbbf35b96557 24 * Products, Inc. Branding Policy.
Kojto 99:dbbf35b96557 25 *
Kojto 99:dbbf35b96557 26 * The mere transfer of this software does not imply any licenses
Kojto 99:dbbf35b96557 27 * of trade secrets, proprietary technology, copyrights, patents,
Kojto 99:dbbf35b96557 28 * trademarks, maskwork rights, or any other form of intellectual
Kojto 99:dbbf35b96557 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
Kojto 99:dbbf35b96557 30 * ownership rights.
Kojto 99:dbbf35b96557 31 *******************************************************************************
Kojto 99:dbbf35b96557 32 */
Kojto 99:dbbf35b96557 33
Kojto 99:dbbf35b96557 34 #ifndef _MXC_FLC_REGS_H
Kojto 99:dbbf35b96557 35 #define _MXC_FLC_REGS_H
Kojto 99:dbbf35b96557 36
Kojto 99:dbbf35b96557 37 #ifdef __cplusplus
Kojto 99:dbbf35b96557 38 extern "C" {
Kojto 99:dbbf35b96557 39 #endif
Kojto 99:dbbf35b96557 40
Kojto 99:dbbf35b96557 41 #include <stdint.h>
Kojto 99:dbbf35b96557 42
Kojto 99:dbbf35b96557 43 /**
Kojto 99:dbbf35b96557 44 * @file flc_regs.h
Kojto 99:dbbf35b96557 45 * @addtogroup flc FLC
Kojto 99:dbbf35b96557 46 * @{
Kojto 99:dbbf35b96557 47 */
Kojto 99:dbbf35b96557 48 /* Offset Register Description
Kojto 99:dbbf35b96557 49 ====== ======================================================= */
Kojto 99:dbbf35b96557 50 typedef struct {
Kojto 99:dbbf35b96557 51 __IO uint32_t faddr; /* 0x0000 Flash Operation Address */
Kojto 99:dbbf35b96557 52 __IO uint32_t fckdiv; /* 0x0004 Flash Clock Rate Divisor */
Kojto 99:dbbf35b96557 53 __IO uint32_t ctrl; /* 0x0008 Flash Control Register */
Kojto 99:dbbf35b96557 54 __I uint32_t rsv000C[6]; /* 0x000C */
Kojto 99:dbbf35b96557 55 __IO uint32_t intr; /* 0x0024 Flash Controller Interrupt Flags and Enable/Disable 0 */
Kojto 99:dbbf35b96557 56 __I uint32_t rsv0028[2]; /* 0x0028 */
Kojto 99:dbbf35b96557 57 __IO uint32_t fdata; /* 0x0030 Flash Operation Data Register */
Kojto 99:dbbf35b96557 58 __I uint32_t rsv0034[7]; /* 0x0034 */
Kojto 99:dbbf35b96557 59 __IO uint32_t perform; /* 0x0050 Flash Performance Settings */
Kojto 99:dbbf35b96557 60 __I uint32_t rsv0054[11]; /* 0x0054 */
Kojto 99:dbbf35b96557 61 __IO uint32_t status; /* 0x0080 Security Status Flags */
Kojto 99:dbbf35b96557 62 __I uint32_t rsv0084; /* 0x0084 */
Kojto 99:dbbf35b96557 63 __IO uint32_t security; /* 0x0088 Flash Controller Security Settings */
Kojto 99:dbbf35b96557 64 __I uint32_t rsv008C[4]; /* 0x008C */
Kojto 99:dbbf35b96557 65 __IO uint32_t bypass; /* 0x009C Status Flags for DSB Operations */
Kojto 99:dbbf35b96557 66 __IO uint32_t user_option; /* 0x0100 Used to set DSB Access code and Auto-Lock in info block */
Kojto 99:dbbf35b96557 67 __I uint32_t rsv0104[15]; /* 0x0104 */
Kojto 99:dbbf35b96557 68 __IO uint32_t ctrl2; /* 0x0140 Flash Control Register 2 */
Kojto 99:dbbf35b96557 69 __IO uint32_t intfl1; /* 0x0144 Interrupt Flags Register 1 */
Kojto 99:dbbf35b96557 70 __IO uint32_t inten1; /* 0x0148 Interrupt Enable/Disable Register 1 */
Kojto 99:dbbf35b96557 71 __I uint32_t rsv014C; /* 0x014C */
Kojto 99:dbbf35b96557 72 __IO uint32_t disable_xr0; /* 0x0150 Disable Flash Page Exec/Read Register 0 */
Kojto 99:dbbf35b96557 73 __IO uint32_t disable_xr1; /* 0x0154 Disable Flash Page Exec/Read Register 1 */
Kojto 99:dbbf35b96557 74 __IO uint32_t disable_xr2; /* 0x0158 Disable Flash Page Exec/Read Register 2 */
Kojto 99:dbbf35b96557 75 __IO uint32_t disable_xr3; /* 0x015C Disable Flash Page Exec/Read Register 3 */
Kojto 99:dbbf35b96557 76 __IO uint32_t disable_we0; /* 0x0160 Disable Flash Page Write/Erase Register 0 */
Kojto 99:dbbf35b96557 77 __IO uint32_t disable_we1; /* 0x0164 Disable Flash Page Write/Erase Register 1 */
Kojto 99:dbbf35b96557 78 __IO uint32_t disable_we2; /* 0x0168 Disable Flash Page Write/Erase Register 2 */
Kojto 99:dbbf35b96557 79 __IO uint32_t disable_we3; /* 0x016C Disable Flash Page Write/Erase Register 3 */
Kojto 99:dbbf35b96557 80 } mxc_flc_regs_t;
Kojto 99:dbbf35b96557 81
Kojto 99:dbbf35b96557 82 /*
Kojto 99:dbbf35b96557 83 Register offsets for module FLC.
Kojto 99:dbbf35b96557 84 */
Kojto 99:dbbf35b96557 85 #define MXC_R_FLC_OFFS_FADDR ((uint32_t)0x00000000UL)
Kojto 99:dbbf35b96557 86 #define MXC_R_FLC_OFFS_FCKDIV ((uint32_t)0x00000004UL)
Kojto 99:dbbf35b96557 87 #define MXC_R_FLC_OFFS_CTRL ((uint32_t)0x00000008UL)
Kojto 99:dbbf35b96557 88 #define MXC_R_FLC_OFFS_INTR ((uint32_t)0x00000024UL)
Kojto 99:dbbf35b96557 89 #define MXC_R_FLC_OFFS_FDATA ((uint32_t)0x00000030UL)
Kojto 99:dbbf35b96557 90 #define MXC_R_FLC_OFFS_PERFORM ((uint32_t)0x00000050UL)
Kojto 99:dbbf35b96557 91 #define MXC_R_FLC_OFFS_STATUS ((uint32_t)0x00000080UL)
Kojto 99:dbbf35b96557 92 #define MXC_R_FLC_OFFS_SECURITY ((uint32_t)0x00000088UL)
Kojto 99:dbbf35b96557 93 #define MXC_R_FLC_OFFS_BYPASS ((uint32_t)0x0000009CUL)
Kojto 99:dbbf35b96557 94 #define MXC_R_FLC_OFFS_USER_OPTION ((uint32_t)0x00000100UL)
Kojto 99:dbbf35b96557 95 #define MXC_R_FLC_OFFS_CTRL2 ((uint32_t)0x00000140UL)
Kojto 99:dbbf35b96557 96 #define MXC_R_FLC_OFFS_INTFL1 ((uint32_t)0x00000144UL)
Kojto 99:dbbf35b96557 97 #define MXC_R_FLC_OFFS_INTEN1 ((uint32_t)0x00000148UL)
Kojto 99:dbbf35b96557 98 #define MXC_R_FLC_OFFS_DISABLE_XR0 ((uint32_t)0x00000150UL)
Kojto 99:dbbf35b96557 99 #define MXC_R_FLC_OFFS_DISABLE_XR1 ((uint32_t)0x00000154UL)
Kojto 99:dbbf35b96557 100 #define MXC_R_FLC_OFFS_DISABLE_XR2 ((uint32_t)0x00000158UL)
Kojto 99:dbbf35b96557 101 #define MXC_R_FLC_OFFS_DISABLE_XR3 ((uint32_t)0x0000015CUL)
Kojto 99:dbbf35b96557 102 #define MXC_R_FLC_OFFS_DISABLE_WE0 ((uint32_t)0x00000160UL)
Kojto 99:dbbf35b96557 103 #define MXC_R_FLC_OFFS_DISABLE_WE1 ((uint32_t)0x00000164UL)
Kojto 99:dbbf35b96557 104 #define MXC_R_FLC_OFFS_DISABLE_WE2 ((uint32_t)0x00000168UL)
Kojto 99:dbbf35b96557 105 #define MXC_R_FLC_OFFS_DISABLE_WE3 ((uint32_t)0x0000016CUL)
Kojto 99:dbbf35b96557 106
Kojto 99:dbbf35b96557 107 #define MXC_V_FLC_ERASE_CODE_PAGE_ERASE ((uint8_t)0x55)
Kojto 99:dbbf35b96557 108 #define MXC_V_FLC_ERASE_CODE_MASS_ERASE ((uint8_t)0xAA)
Kojto 99:dbbf35b96557 109
Kojto 99:dbbf35b96557 110 #define MXC_V_FLC_FLSH_UNLOCK_KEY ((uint8_t)0x2)
Kojto 99:dbbf35b96557 111
Kojto 99:dbbf35b96557 112 /*
Kojto 99:dbbf35b96557 113 Field positions and masks for module FLC.
Kojto 99:dbbf35b96557 114 */
Kojto 99:dbbf35b96557 115 #define MXC_F_FLC_FADDR_FADDR_POS 0
Kojto 99:dbbf35b96557 116 #define MXC_F_FLC_FADDR_FADDR ((uint32_t)(0x0003FFFFUL << MXC_F_FLC_FADDR_FADDR_POS))
Kojto 99:dbbf35b96557 117
Kojto 99:dbbf35b96557 118 #define MXC_F_FLC_FCKDIV_FCKDIV_POS 0
Kojto 99:dbbf35b96557 119 #define MXC_F_FLC_FCKDIV_FCKDIV ((uint32_t)(0x0000001FUL << MXC_F_FLC_FCKDIV_FCKDIV_POS))
Kojto 99:dbbf35b96557 120
Kojto 99:dbbf35b96557 121 #define MXC_F_FLC_CTRL_WRITE_POS 0
Kojto 99:dbbf35b96557 122 #define MXC_F_FLC_CTRL_WRITE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_WRITE_POS))
Kojto 99:dbbf35b96557 123 #define MXC_F_FLC_CTRL_MASS_ERASE_POS 1
Kojto 99:dbbf35b96557 124 #define MXC_F_FLC_CTRL_MASS_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_MASS_ERASE_POS))
Kojto 99:dbbf35b96557 125 #define MXC_F_FLC_CTRL_PAGE_ERASE_POS 2
Kojto 99:dbbf35b96557 126 #define MXC_F_FLC_CTRL_PAGE_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_PAGE_ERASE_POS))
Kojto 99:dbbf35b96557 127 #define MXC_F_FLC_CTRL_ERASE_CODE_POS 8
Kojto 99:dbbf35b96557 128 #define MXC_F_FLC_CTRL_ERASE_CODE ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL_ERASE_CODE_POS))
Kojto 99:dbbf35b96557 129 #define MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK_POS 16
Kojto 99:dbbf35b96557 130 #define MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK_POS))
Kojto 99:dbbf35b96557 131 #define MXC_F_FLC_CTRL_WRITE_ENABLE_POS 17
Kojto 99:dbbf35b96557 132 #define MXC_F_FLC_CTRL_WRITE_ENABLE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_WRITE_ENABLE_POS))
Kojto 99:dbbf35b96557 133 #define MXC_F_FLC_CTRL_PENDING_POS 24
Kojto 99:dbbf35b96557 134 #define MXC_F_FLC_CTRL_PENDING ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_PENDING_POS))
Kojto 99:dbbf35b96557 135 #define MXC_F_FLC_CTRL_INFO_BLOCK_VALID_POS 25
Kojto 99:dbbf35b96557 136 #define MXC_F_FLC_CTRL_INFO_BLOCK_VALID ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_INFO_BLOCK_VALID_POS))
Kojto 99:dbbf35b96557 137 #define MXC_F_FLC_CTRL_AUTO_INCRE_MODE_POS 27
Kojto 99:dbbf35b96557 138 #define MXC_F_FLC_CTRL_AUTO_INCRE_MODE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_AUTO_INCRE_MODE_POS))
Kojto 99:dbbf35b96557 139 #define MXC_F_FLC_CTRL_FLSH_UNLOCK_POS 28
Kojto 99:dbbf35b96557 140 #define MXC_F_FLC_CTRL_FLSH_UNLOCK ((uint32_t)(0x0000000FUL << MXC_F_FLC_CTRL_FLSH_UNLOCK_POS))
Kojto 99:dbbf35b96557 141
Kojto 99:dbbf35b96557 142 #define MXC_F_FLC_INTR_FLASH_OP_DONE_IF_POS 0
Kojto 99:dbbf35b96557 143 #define MXC_F_FLC_INTR_FLASH_OP_DONE_IF ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_DONE_IF_POS))
Kojto 99:dbbf35b96557 144 #define MXC_F_FLC_INTR_FLASH_OP_FAILED_IF_POS 1
Kojto 99:dbbf35b96557 145 #define MXC_F_FLC_INTR_FLASH_OP_FAILED_IF ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_FAILED_IF_POS))
Kojto 99:dbbf35b96557 146 #define MXC_F_FLC_INTR_FLASH_OP_DONE_IE_POS 9
Kojto 99:dbbf35b96557 147 #define MXC_F_FLC_INTR_FLASH_OP_DONE_IE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_DONE_IE_POS))
Kojto 99:dbbf35b96557 148 #define MXC_F_FLC_INTR_FLASH_OP_FAILED_IE_POS 10
Kojto 99:dbbf35b96557 149 #define MXC_F_FLC_INTR_FLASH_OP_FAILED_IE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_FAILED_IE_POS))
Kojto 99:dbbf35b96557 150
Kojto 99:dbbf35b96557 151 #define MXC_F_FLC_PERFORM_FAST_READ_MODE_EN_POS 8
Kojto 99:dbbf35b96557 152 #define MXC_F_FLC_PERFORM_FAST_READ_MODE_EN ((uint32_t)(0x00000001UL << MXC_F_FLC_PERFORM_FAST_READ_MODE_EN_POS))
Kojto 99:dbbf35b96557 153 #define MXC_F_FLC_PERFORM_DELAY_SE_EN_POS 0
Kojto 99:dbbf35b96557 154 #define MXC_F_FLC_PERFORM_DELAY_SE_EN ((uint32_t)(0x00000001UL << MXC_F_FLC_PERFORM_DELAY_SE_EN_POS))
Kojto 99:dbbf35b96557 155
Kojto 99:dbbf35b96557 156 #define MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW_POS 0
Kojto 99:dbbf35b96557 157 #define MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW_POS))
Kojto 99:dbbf35b96557 158 #define MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC_POS 1
Kojto 99:dbbf35b96557 159 #define MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC_POS))
Kojto 99:dbbf35b96557 160 #define MXC_F_FLC_STATUS_AUTO_LOCK_POS 3
Kojto 99:dbbf35b96557 161 #define MXC_F_FLC_STATUS_AUTO_LOCK ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_AUTO_LOCK_POS))
Kojto 99:dbbf35b96557 162
Kojto 99:dbbf35b96557 163 #define MXC_F_FLC_SECURITY_DEBUG_DISABLE_POS 0
Kojto 99:dbbf35b96557 164 #define MXC_F_FLC_SECURITY_DEBUG_DISABLE ((uint32_t)(0x000000FFUL << MXC_F_FLC_SECURITY_DEBUG_DISABLE_POS))
Kojto 99:dbbf35b96557 165 #define MXC_F_FLC_SECURITY_MASS_ERASE_LOCK_POS 8
Kojto 99:dbbf35b96557 166 #define MXC_F_FLC_SECURITY_MASS_ERASE_LOCK ((uint32_t)(0x0000000FUL << MXC_F_FLC_SECURITY_MASS_ERASE_LOCK_POS))
Kojto 99:dbbf35b96557 167 #define MXC_F_FLC_SECURITY_SECURITY_LOCK_POS 31
Kojto 99:dbbf35b96557 168 #define MXC_F_FLC_SECURITY_SECURITY_LOCK ((uint32_t)(0x00000001UL << MXC_F_FLC_SECURITY_SECURITY_LOCK_POS))
Kojto 99:dbbf35b96557 169
Kojto 99:dbbf35b96557 170 #define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE_POS 0
Kojto 99:dbbf35b96557 171 #define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE_POS))
Kojto 99:dbbf35b96557 172 #define MXC_F_FLC_BYPASS_SUPERWIPE_ERASE_POS 1
Kojto 99:dbbf35b96557 173 #define MXC_F_FLC_BYPASS_SUPERWIPE_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_SUPERWIPE_ERASE_POS))
Kojto 99:dbbf35b96557 174 #define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE_POS 2
Kojto 99:dbbf35b96557 175 #define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE_POS))
Kojto 99:dbbf35b96557 176 #define MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE_POS 3
Kojto 99:dbbf35b96557 177 #define MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE_POS))
Kojto 99:dbbf35b96557 178
Kojto 99:dbbf35b96557 179 #define MXC_F_FLC_CTRL2_FLASH_LVE_POS 0
Kojto 99:dbbf35b96557 180 #define MXC_F_FLC_CTRL2_FLASH_LVE ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL2_FLASH_LVE_POS))
Kojto 99:dbbf35b96557 181 #define MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL_POS 8
Kojto 99:dbbf35b96557 182 #define MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL_POS))
Kojto 99:dbbf35b96557 183
Kojto 99:dbbf35b96557 184 #define MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED_POS 0
Kojto 99:dbbf35b96557 185 #define MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED_POS))
Kojto 99:dbbf35b96557 186 #define MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR_POS 1
Kojto 99:dbbf35b96557 187 #define MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR_POS))
Kojto 99:dbbf35b96557 188 #define MXC_F_FLC_INTFL1_FLASH_READ_LOCKED_POS 2
Kojto 99:dbbf35b96557 189 #define MXC_F_FLC_INTFL1_FLASH_READ_LOCKED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_FLASH_READ_LOCKED_POS))
Kojto 99:dbbf35b96557 190 #define MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE_POS 3
Kojto 99:dbbf35b96557 191 #define MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE_POS))
Kojto 99:dbbf35b96557 192
Kojto 99:dbbf35b96557 193 #define MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED_POS 0
Kojto 99:dbbf35b96557 194 #define MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED_POS))
Kojto 99:dbbf35b96557 195 #define MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR_POS 1
Kojto 99:dbbf35b96557 196 #define MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR_POS))
Kojto 99:dbbf35b96557 197 #define MXC_F_FLC_INTEN1_FLASH_READ_LOCKED_POS 2
Kojto 99:dbbf35b96557 198 #define MXC_F_FLC_INTEN1_FLASH_READ_LOCKED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_FLASH_READ_LOCKED_POS))
Kojto 99:dbbf35b96557 199 #define MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE_POS 3
Kojto 99:dbbf35b96557 200 #define MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE_POS))
Kojto 99:dbbf35b96557 201
Kojto 99:dbbf35b96557 202 #ifdef __cplusplus
Kojto 99:dbbf35b96557 203 }
Kojto 99:dbbf35b96557 204 #endif
Kojto 99:dbbf35b96557 205
Kojto 99:dbbf35b96557 206 /**
Kojto 99:dbbf35b96557 207 * @}
Kojto 99:dbbf35b96557 208 */
Kojto 99:dbbf35b96557 209
Kojto 99:dbbf35b96557 210 #endif /* _MXC_FLC_REGS_H_ */