Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

TARGET_LPC2460/core_arm7.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
102:da0ca467f8b5 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 102:da0ca467f8b5 1 /* mbed Microcontroller Library
Kojto 102:da0ca467f8b5 2 * Copyright (C) 2008-2015 ARM Limited. All rights reserved.
Kojto 102:da0ca467f8b5 3 *
Kojto 102:da0ca467f8b5 4 * ARM7 version of CMSIS-like functionality - not advised for use outside mbed!
Kojto 102:da0ca467f8b5 5 * based on core_cm3.h, V1.20
Kojto 102:da0ca467f8b5 6 */
Kojto 102:da0ca467f8b5 7
Kojto 102:da0ca467f8b5 8 #ifndef __ARM7_CORE_H__
Kojto 102:da0ca467f8b5 9 #define __ARM7_CORE_H__
Kojto 102:da0ca467f8b5 10
Kojto 102:da0ca467f8b5 11 #include "vector_defns.h"
Kojto 102:da0ca467f8b5 12 #ifdef __cplusplus
Kojto 102:da0ca467f8b5 13 extern "C" {
Kojto 102:da0ca467f8b5 14 #endif
Kojto 102:da0ca467f8b5 15 //#include "cmsis_nvic.h"
Kojto 102:da0ca467f8b5 16
Kojto 102:da0ca467f8b5 17 #define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */
Kojto 102:da0ca467f8b5 18 #define __CM3_CMSIS_VERSION_SUB (0x20) /*!< [15:0] CMSIS HAL sub version */
Kojto 102:da0ca467f8b5 19 #define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */
Kojto 102:da0ca467f8b5 20
Kojto 102:da0ca467f8b5 21 #define __CORTEX_M (0x00) /*!< Cortex core */
Kojto 102:da0ca467f8b5 22
Kojto 102:da0ca467f8b5 23 /**
Kojto 102:da0ca467f8b5 24 * Lint configuration \n
Kojto 102:da0ca467f8b5 25 * ----------------------- \n
Kojto 102:da0ca467f8b5 26 *
Kojto 102:da0ca467f8b5 27 * The following Lint messages will be suppressed and not shown: \n
Kojto 102:da0ca467f8b5 28 * \n
Kojto 102:da0ca467f8b5 29 * --- Error 10: --- \n
Kojto 102:da0ca467f8b5 30 * register uint32_t __regBasePri __asm("basepri"); \n
Kojto 102:da0ca467f8b5 31 * Error 10: Expecting ';' \n
Kojto 102:da0ca467f8b5 32 * \n
Kojto 102:da0ca467f8b5 33 * --- Error 530: --- \n
Kojto 102:da0ca467f8b5 34 * return(__regBasePri); \n
Kojto 102:da0ca467f8b5 35 * Warning 530: Symbol '__regBasePri' (line 264) not initialized \n
Kojto 102:da0ca467f8b5 36 * \n
Kojto 102:da0ca467f8b5 37 * --- Error 550: --- \n
Kojto 102:da0ca467f8b5 38 * __regBasePri = (basePri & 0x1ff); \n
Kojto 102:da0ca467f8b5 39 * } \n
Kojto 102:da0ca467f8b5 40 * Warning 550: Symbol '__regBasePri' (line 271) not accessed \n
Kojto 102:da0ca467f8b5 41 * \n
Kojto 102:da0ca467f8b5 42 * --- Error 754: --- \n
Kojto 102:da0ca467f8b5 43 * uint32_t RESERVED0[24]; \n
Kojto 102:da0ca467f8b5 44 * Info 754: local structure member '<some, not used in the HAL>' (line 109, file ./cm3_core.h) not referenced \n
Kojto 102:da0ca467f8b5 45 * \n
Kojto 102:da0ca467f8b5 46 * --- Error 750: --- \n
Kojto 102:da0ca467f8b5 47 * #define __CM3_CORE_H__ \n
Kojto 102:da0ca467f8b5 48 * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced \n
Kojto 102:da0ca467f8b5 49 * \n
Kojto 102:da0ca467f8b5 50 * --- Error 528: --- \n
Kojto 102:da0ca467f8b5 51 * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n
Kojto 102:da0ca467f8b5 52 * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced \n
Kojto 102:da0ca467f8b5 53 * \n
Kojto 102:da0ca467f8b5 54 * --- Error 751: --- \n
Kojto 102:da0ca467f8b5 55 * } InterruptType_Type; \n
Kojto 102:da0ca467f8b5 56 * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced \n
Kojto 102:da0ca467f8b5 57 * \n
Kojto 102:da0ca467f8b5 58 * \n
Kojto 102:da0ca467f8b5 59 * Note: To re-enable a Message, insert a space before 'lint' * \n
Kojto 102:da0ca467f8b5 60 *
Kojto 102:da0ca467f8b5 61 */
Kojto 102:da0ca467f8b5 62
Kojto 102:da0ca467f8b5 63 /*lint -save */
Kojto 102:da0ca467f8b5 64 /*lint -e10 */
Kojto 102:da0ca467f8b5 65 /*lint -e530 */
Kojto 102:da0ca467f8b5 66 /*lint -e550 */
Kojto 102:da0ca467f8b5 67 /*lint -e754 */
Kojto 102:da0ca467f8b5 68 /*lint -e750 */
Kojto 102:da0ca467f8b5 69 /*lint -e528 */
Kojto 102:da0ca467f8b5 70 /*lint -e751 */
Kojto 102:da0ca467f8b5 71
Kojto 102:da0ca467f8b5 72 #include <stdint.h> /* Include standard types */
Kojto 102:da0ca467f8b5 73
Kojto 102:da0ca467f8b5 74 #if defined ( __CC_ARM )
Kojto 102:da0ca467f8b5 75 /**
Kojto 102:da0ca467f8b5 76 * @brief Return the Main Stack Pointer (current ARM7 stack)
Kojto 102:da0ca467f8b5 77 *
Kojto 102:da0ca467f8b5 78 * @param none
Kojto 102:da0ca467f8b5 79 * @return uint32_t Main Stack Pointer
Kojto 102:da0ca467f8b5 80 *
Kojto 102:da0ca467f8b5 81 * Return the current value of the MSP (main stack pointer)
Kojto 102:da0ca467f8b5 82 * Cortex processor register
Kojto 102:da0ca467f8b5 83 */
Kojto 102:da0ca467f8b5 84 extern uint32_t __get_MSP(void);
Kojto 102:da0ca467f8b5 85 #endif
Kojto 102:da0ca467f8b5 86
Kojto 102:da0ca467f8b5 87
Kojto 102:da0ca467f8b5 88 #if defined (__ICCARM__)
Kojto 102:da0ca467f8b5 89 #include <intrinsics.h> /* IAR Intrinsics */
Kojto 102:da0ca467f8b5 90 #endif
Kojto 102:da0ca467f8b5 91
Kojto 102:da0ca467f8b5 92
Kojto 102:da0ca467f8b5 93 #ifndef __NVIC_PRIO_BITS
Kojto 102:da0ca467f8b5 94 #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */
Kojto 102:da0ca467f8b5 95 #endif
Kojto 102:da0ca467f8b5 96
Kojto 102:da0ca467f8b5 97 typedef struct
Kojto 102:da0ca467f8b5 98 {
Kojto 102:da0ca467f8b5 99 uint32_t IRQStatus;
Kojto 102:da0ca467f8b5 100 uint32_t FIQStatus;
Kojto 102:da0ca467f8b5 101 uint32_t RawIntr;
Kojto 102:da0ca467f8b5 102 uint32_t IntSelect;
Kojto 102:da0ca467f8b5 103 uint32_t IntEnable;
Kojto 102:da0ca467f8b5 104 uint32_t IntEnClr;
Kojto 102:da0ca467f8b5 105 uint32_t SoftInt;
Kojto 102:da0ca467f8b5 106 uint32_t SoftIntClr;
Kojto 102:da0ca467f8b5 107 uint32_t Protection;
Kojto 102:da0ca467f8b5 108 uint32_t SWPriorityMask;
Kojto 102:da0ca467f8b5 109 uint32_t RESERVED0[54];
Kojto 102:da0ca467f8b5 110 uint32_t VectAddr[32];
Kojto 102:da0ca467f8b5 111 uint32_t RESERVED1[32];
Kojto 102:da0ca467f8b5 112 uint32_t VectPriority[32];
Kojto 102:da0ca467f8b5 113 uint32_t RESERVED2[800];
Kojto 102:da0ca467f8b5 114 uint32_t Address;
Kojto 102:da0ca467f8b5 115 } NVIC_TypeDef;
Kojto 102:da0ca467f8b5 116
Kojto 102:da0ca467f8b5 117 #define NVIC_BASE (0xFFFFF000)
Kojto 102:da0ca467f8b5 118 #define NVIC (( NVIC_TypeDef *) NVIC_BASE)
Kojto 102:da0ca467f8b5 119
Kojto 102:da0ca467f8b5 120
Kojto 102:da0ca467f8b5 121
Kojto 102:da0ca467f8b5 122 /**
Kojto 102:da0ca467f8b5 123 * IO definitions
Kojto 102:da0ca467f8b5 124 *
Kojto 102:da0ca467f8b5 125 * define access restrictions to peripheral registers
Kojto 102:da0ca467f8b5 126 */
Kojto 102:da0ca467f8b5 127
Kojto 102:da0ca467f8b5 128 #ifdef __cplusplus
Kojto 102:da0ca467f8b5 129 #define __I volatile /*!< defines 'read only' permissions */
Kojto 102:da0ca467f8b5 130 #else
Kojto 102:da0ca467f8b5 131 #define __I volatile const /*!< defines 'read only' permissions */
Kojto 102:da0ca467f8b5 132 #endif
Kojto 102:da0ca467f8b5 133 #define __O volatile /*!< defines 'write only' permissions */
Kojto 102:da0ca467f8b5 134 #define __IO volatile /*!< defines 'read / write' permissions */
Kojto 102:da0ca467f8b5 135
Kojto 102:da0ca467f8b5 136
Kojto 102:da0ca467f8b5 137
Kojto 102:da0ca467f8b5 138
Kojto 102:da0ca467f8b5 139
Kojto 102:da0ca467f8b5 140 #if defined ( __CC_ARM )
Kojto 102:da0ca467f8b5 141 #define __ASM __asm /*!< asm keyword for ARM Compiler */
Kojto 102:da0ca467f8b5 142 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
Kojto 102:da0ca467f8b5 143
Kojto 102:da0ca467f8b5 144 #elif defined ( __ICCARM__ )
Kojto 102:da0ca467f8b5 145 #define __ASM __asm /*!< asm keyword for IAR Compiler */
Kojto 102:da0ca467f8b5 146 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
Kojto 102:da0ca467f8b5 147
Kojto 102:da0ca467f8b5 148 #elif defined ( __GNUC__ )
Kojto 102:da0ca467f8b5 149 #define __ASM __asm /*!< asm keyword for GNU Compiler */
Kojto 102:da0ca467f8b5 150 #define __INLINE inline /*!< inline keyword for GNU Compiler */
Kojto 102:da0ca467f8b5 151
Kojto 102:da0ca467f8b5 152 #elif defined ( __TASKING__ )
Kojto 102:da0ca467f8b5 153 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
Kojto 102:da0ca467f8b5 154 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
Kojto 102:da0ca467f8b5 155
Kojto 102:da0ca467f8b5 156 #endif
Kojto 102:da0ca467f8b5 157
Kojto 102:da0ca467f8b5 158
Kojto 102:da0ca467f8b5 159 /* ################### Compiler specific Intrinsics ########################### */
Kojto 102:da0ca467f8b5 160
Kojto 102:da0ca467f8b5 161 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Kojto 102:da0ca467f8b5 162 /* ARM armcc specific functions */
Kojto 102:da0ca467f8b5 163
Kojto 102:da0ca467f8b5 164 #define __enable_fault_irq __enable_fiq
Kojto 102:da0ca467f8b5 165 #define __disable_fault_irq __disable_fiq
Kojto 102:da0ca467f8b5 166
Kojto 102:da0ca467f8b5 167 #define __NOP __nop
Kojto 102:da0ca467f8b5 168 //#define __WFI __wfi
Kojto 102:da0ca467f8b5 169 //#define __WFE __wfe
Kojto 102:da0ca467f8b5 170 //#define __SEV __sev
Kojto 102:da0ca467f8b5 171 //#define __ISB() __isb(0)
Kojto 102:da0ca467f8b5 172 //#define __DSB() __dsb(0)
Kojto 102:da0ca467f8b5 173 //#define __DMB() __dmb(0)
Kojto 102:da0ca467f8b5 174 //#define __REV __rev
Kojto 102:da0ca467f8b5 175 //#define __RBIT __rbit
Kojto 102:da0ca467f8b5 176 #define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr))
Kojto 102:da0ca467f8b5 177 #define __LDREXH(ptr) ((unsigned short) __ldrex(ptr))
Kojto 102:da0ca467f8b5 178 #define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr))
Kojto 102:da0ca467f8b5 179 #define __STREXB(value, ptr) __strex(value, ptr)
Kojto 102:da0ca467f8b5 180 #define __STREXH(value, ptr) __strex(value, ptr)
Kojto 102:da0ca467f8b5 181 #define __STREXW(value, ptr) __strex(value, ptr)
Kojto 102:da0ca467f8b5 182
Kojto 102:da0ca467f8b5 183 #define __disable_irq() unsigned tmp_IntEnable = LPC_VIC->IntEnable; \
Kojto 102:da0ca467f8b5 184 LPC_VIC->IntEnClr = 0xffffffff
Kojto 102:da0ca467f8b5 185
Kojto 102:da0ca467f8b5 186 #define __enable_irq() LPC_VIC->IntEnable = tmp_IntEnable
Kojto 102:da0ca467f8b5 187
Kojto 102:da0ca467f8b5 188 #elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
Kojto 102:da0ca467f8b5 189
Kojto 102:da0ca467f8b5 190 #define __enable_irq __enable_interrupt /*!< global Interrupt enable */
Kojto 102:da0ca467f8b5 191 #define __disable_irq __disable_interrupt /*!< global Interrupt disable */
Kojto 102:da0ca467f8b5 192 #define __NOP __no_operation() /*!< no operation intrinsic in IAR Compiler */
Kojto 102:da0ca467f8b5 193
Kojto 102:da0ca467f8b5 194 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
Kojto 102:da0ca467f8b5 195
Kojto 102:da0ca467f8b5 196 static __INLINE void __enable_irq() {
Kojto 102:da0ca467f8b5 197 unsigned long temp;
Kojto 102:da0ca467f8b5 198 __asm__ __volatile__("mrs %0, cpsr\n"
Kojto 102:da0ca467f8b5 199 "bic %0, %0, #0x80\n"
Kojto 102:da0ca467f8b5 200 "msr cpsr_c, %0"
Kojto 102:da0ca467f8b5 201 : "=r" (temp)
Kojto 102:da0ca467f8b5 202 :
Kojto 102:da0ca467f8b5 203 : "memory");
Kojto 102:da0ca467f8b5 204 }
Kojto 102:da0ca467f8b5 205
Kojto 102:da0ca467f8b5 206 static __INLINE uint32_t __disable_irq() {
Kojto 102:da0ca467f8b5 207 unsigned long old,temp;
Kojto 102:da0ca467f8b5 208 __asm__ __volatile__("mrs %0, cpsr\n"
Kojto 102:da0ca467f8b5 209 "orr %1, %0, #0xc0\n"
Kojto 102:da0ca467f8b5 210 "msr cpsr_c, %1"
Kojto 102:da0ca467f8b5 211 : "=r" (old), "=r" (temp)
Kojto 102:da0ca467f8b5 212 :
Kojto 102:da0ca467f8b5 213 : "memory");
Kojto 102:da0ca467f8b5 214 return (old & 0x80) == 0;
Kojto 102:da0ca467f8b5 215 }
Kojto 102:da0ca467f8b5 216
Kojto 102:da0ca467f8b5 217 static __INLINE void __NOP() { __ASM volatile ("nop"); }
Kojto 102:da0ca467f8b5 218
Kojto 102:da0ca467f8b5 219 /** \brief Get Control Bits of Status Register
Kojto 102:da0ca467f8b5 220
Kojto 102:da0ca467f8b5 221 This function returns the content of the Control Bits from the Program Status Register.
Kojto 102:da0ca467f8b5 222
Kojto 102:da0ca467f8b5 223 \return Control Bits value
Kojto 102:da0ca467f8b5 224 */
Kojto 102:da0ca467f8b5 225 __attribute__( ( always_inline ) ) static inline uint32_t __get_CONTROL(void)
Kojto 102:da0ca467f8b5 226 {
Kojto 102:da0ca467f8b5 227 uint32_t result;
Kojto 102:da0ca467f8b5 228
Kojto 102:da0ca467f8b5 229 __asm__ __volatile__ ("MRS %0, CPSR \n"
Kojto 102:da0ca467f8b5 230 "AND %0,%0,#31" : "=r" (result) );
Kojto 102:da0ca467f8b5 231 return(result);
Kojto 102:da0ca467f8b5 232 }
Kojto 102:da0ca467f8b5 233 #define MODE_USER 0x10
Kojto 102:da0ca467f8b5 234 #define MODE_FIQ 0x11
Kojto 102:da0ca467f8b5 235 #define MODE_IRQ 0x12
Kojto 102:da0ca467f8b5 236 #define MODE_SUPERVISOR 0x13
Kojto 102:da0ca467f8b5 237 #define MODE_ABORT 0x17
Kojto 102:da0ca467f8b5 238 #define MODE_UNDEFINED 0x1B
Kojto 102:da0ca467f8b5 239 #define MODE_SYSTEM 0x1F
Kojto 102:da0ca467f8b5 240
Kojto 102:da0ca467f8b5 241
Kojto 102:da0ca467f8b5 242 #elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
Kojto 102:da0ca467f8b5 243 /* TASKING carm specific functions */
Kojto 102:da0ca467f8b5 244
Kojto 102:da0ca467f8b5 245 /*
Kojto 102:da0ca467f8b5 246 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 102:da0ca467f8b5 247 * Please use "carm -?i" to get an up to date list of all instrinsics,
Kojto 102:da0ca467f8b5 248 * Including the CMSIS ones.
Kojto 102:da0ca467f8b5 249 */
Kojto 102:da0ca467f8b5 250
Kojto 102:da0ca467f8b5 251 #endif
Kojto 102:da0ca467f8b5 252
Kojto 102:da0ca467f8b5 253
Kojto 102:da0ca467f8b5 254 /**
Kojto 102:da0ca467f8b5 255 * @brief Enable Interrupt in NVIC Interrupt Controller
Kojto 102:da0ca467f8b5 256 *
Kojto 102:da0ca467f8b5 257 * @param IRQn_Type IRQn specifies the interrupt number
Kojto 102:da0ca467f8b5 258 * @return none
Kojto 102:da0ca467f8b5 259 *
Kojto 102:da0ca467f8b5 260 * Enable a device specific interupt in the NVIC interrupt controller.
Kojto 102:da0ca467f8b5 261 * The interrupt number cannot be a negative value.
Kojto 102:da0ca467f8b5 262 */
Kojto 102:da0ca467f8b5 263 static __INLINE void NVIC_EnableIRQ(uint32_t IRQn)
Kojto 102:da0ca467f8b5 264 {
Kojto 102:da0ca467f8b5 265 NVIC->IntEnable = 1 << (uint32_t)IRQn;
Kojto 102:da0ca467f8b5 266 }
Kojto 102:da0ca467f8b5 267
Kojto 102:da0ca467f8b5 268
Kojto 102:da0ca467f8b5 269 /**
Kojto 102:da0ca467f8b5 270 * @brief Disable the interrupt line for external interrupt specified
Kojto 102:da0ca467f8b5 271 *
Kojto 102:da0ca467f8b5 272 * @param IRQn_Type IRQn is the positive number of the external interrupt
Kojto 102:da0ca467f8b5 273 * @return none
Kojto 102:da0ca467f8b5 274 *
Kojto 102:da0ca467f8b5 275 * Disable a device specific interupt in the NVIC interrupt controller.
Kojto 102:da0ca467f8b5 276 * The interrupt number cannot be a negative value.
Kojto 102:da0ca467f8b5 277 */
Kojto 102:da0ca467f8b5 278 static __INLINE void NVIC_DisableIRQ(uint32_t IRQn)
Kojto 102:da0ca467f8b5 279 {
Kojto 102:da0ca467f8b5 280 NVIC->IntEnClr = 1 << (uint32_t)IRQn;
Kojto 102:da0ca467f8b5 281 }
Kojto 102:da0ca467f8b5 282
Kojto 102:da0ca467f8b5 283 /**
Kojto 102:da0ca467f8b5 284 * @brief Pend Interrupt in NVIC Interrupt Controller
Kojto 102:da0ca467f8b5 285 *
Kojto 102:da0ca467f8b5 286 * @param IRQn_Type IRQn specifies the interrupt number
Kojto 102:da0ca467f8b5 287 * @return none
Kojto 102:da0ca467f8b5 288 *
Kojto 102:da0ca467f8b5 289 * Force software a device specific interupt in the NVIC interrupt controller.
Kojto 102:da0ca467f8b5 290 * The interrupt number cannot be a negative value.
Kojto 102:da0ca467f8b5 291 */
Kojto 102:da0ca467f8b5 292 static __INLINE void NVIC_PendIRQ(uint32_t IRQn)
Kojto 102:da0ca467f8b5 293 {
Kojto 102:da0ca467f8b5 294 NVIC->SoftInt = 1 << (uint32_t)IRQn;
Kojto 102:da0ca467f8b5 295 }
Kojto 102:da0ca467f8b5 296
Kojto 102:da0ca467f8b5 297
Kojto 102:da0ca467f8b5 298 /**
Kojto 102:da0ca467f8b5 299 * @brief Unpend the interrupt in NVIC Interrupt Controller
Kojto 102:da0ca467f8b5 300 *
Kojto 102:da0ca467f8b5 301 * @param IRQn_Type IRQn is the positive number of the external interrupt
Kojto 102:da0ca467f8b5 302 * @return none
Kojto 102:da0ca467f8b5 303 *
Kojto 102:da0ca467f8b5 304 * Clear software device specific interupt in the NVIC interrupt controller.
Kojto 102:da0ca467f8b5 305 * The interrupt number cannot be a negative value.
Kojto 102:da0ca467f8b5 306 */
Kojto 102:da0ca467f8b5 307 static __INLINE void NVIC_UnpendIRQ(uint32_t IRQn)
Kojto 102:da0ca467f8b5 308 {
Kojto 102:da0ca467f8b5 309 NVIC->SoftIntClr = 1 << (uint32_t)IRQn;
Kojto 102:da0ca467f8b5 310 }
Kojto 102:da0ca467f8b5 311
Kojto 102:da0ca467f8b5 312 /**
Kojto 102:da0ca467f8b5 313 * @brief Is IRQ pending
Kojto 102:da0ca467f8b5 314 *
Kojto 102:da0ca467f8b5 315 * @param IRQn_Type IRQn is the positive number of the external interrupt
Kojto 102:da0ca467f8b5 316 * @return 0 if IRQ is not pending
Kojto 102:da0ca467f8b5 317 * 1 if IRQ is pending
Kojto 102:da0ca467f8b5 318 *
Kojto 102:da0ca467f8b5 319 * Returns software device specific interupt in the NVIC interrupt controller.
Kojto 102:da0ca467f8b5 320 * The interrupt number cannot be a negative value.
Kojto 102:da0ca467f8b5 321 */
Kojto 102:da0ca467f8b5 322 static __INLINE uint32_t NVIC_Pending(uint32_t IRQn)
Kojto 102:da0ca467f8b5 323 {
Kojto 102:da0ca467f8b5 324 return (NVIC->SoftInt & (1 << (uint32_t)IRQn)) != 0;
Kojto 102:da0ca467f8b5 325 }
Kojto 102:da0ca467f8b5 326
Kojto 102:da0ca467f8b5 327 static __INLINE uint32_t __get_IPSR(void)
Kojto 102:da0ca467f8b5 328 {
Kojto 102:da0ca467f8b5 329 unsigned i;
Kojto 102:da0ca467f8b5 330
Kojto 102:da0ca467f8b5 331 for(i = 0; i < 32; i ++)
Kojto 102:da0ca467f8b5 332 if(NVIC->Address == NVIC->VectAddr[i])
Kojto 102:da0ca467f8b5 333 return i;
Kojto 102:da0ca467f8b5 334 return 1; // 1 is an invalid entry in the interrupt table on LPC2460
Kojto 102:da0ca467f8b5 335 }
Kojto 102:da0ca467f8b5 336
Kojto 102:da0ca467f8b5 337 #ifdef __cplusplus
Kojto 102:da0ca467f8b5 338 }
Kojto 102:da0ca467f8b5 339 #endif
Kojto 102:da0ca467f8b5 340
Kojto 102:da0ca467f8b5 341 #endif /* __ARM7_CORE_H__ */
Kojto 102:da0ca467f8b5 342
Kojto 102:da0ca467f8b5 343 /*lint -restore */