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Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

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TARGET_ELMO_F411RE/stm32f4xx_hal_pwr_ex.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
110:165afa46840b 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 108:34e6b704fe68 1 /**
Kojto 108:34e6b704fe68 2 ******************************************************************************
Kojto 108:34e6b704fe68 3 * @file stm32f4xx_hal_pwr_ex.h
Kojto 108:34e6b704fe68 4 * @author MCD Application Team
Kojto 110:165afa46840b 5 * @version V1.4.1
Kojto 110:165afa46840b 6 * @date 09-October-2015
Kojto 108:34e6b704fe68 7 * @brief Header file of PWR HAL Extension module.
Kojto 108:34e6b704fe68 8 ******************************************************************************
Kojto 108:34e6b704fe68 9 * @attention
Kojto 108:34e6b704fe68 10 *
Kojto 108:34e6b704fe68 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 108:34e6b704fe68 12 *
Kojto 108:34e6b704fe68 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 108:34e6b704fe68 14 * are permitted provided that the following conditions are met:
Kojto 108:34e6b704fe68 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 108:34e6b704fe68 16 * this list of conditions and the following disclaimer.
Kojto 108:34e6b704fe68 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 108:34e6b704fe68 18 * this list of conditions and the following disclaimer in the documentation
Kojto 108:34e6b704fe68 19 * and/or other materials provided with the distribution.
Kojto 108:34e6b704fe68 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 108:34e6b704fe68 21 * may be used to endorse or promote products derived from this software
Kojto 108:34e6b704fe68 22 * without specific prior written permission.
Kojto 108:34e6b704fe68 23 *
Kojto 108:34e6b704fe68 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 108:34e6b704fe68 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 108:34e6b704fe68 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 108:34e6b704fe68 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 108:34e6b704fe68 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 108:34e6b704fe68 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 108:34e6b704fe68 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 108:34e6b704fe68 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 108:34e6b704fe68 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 108:34e6b704fe68 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 108:34e6b704fe68 34 *
Kojto 108:34e6b704fe68 35 ******************************************************************************
Kojto 108:34e6b704fe68 36 */
Kojto 108:34e6b704fe68 37
Kojto 108:34e6b704fe68 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 108:34e6b704fe68 39 #ifndef __STM32F4xx_HAL_PWR_EX_H
Kojto 108:34e6b704fe68 40 #define __STM32F4xx_HAL_PWR_EX_H
Kojto 108:34e6b704fe68 41
Kojto 108:34e6b704fe68 42 #ifdef __cplusplus
Kojto 108:34e6b704fe68 43 extern "C" {
Kojto 108:34e6b704fe68 44 #endif
Kojto 108:34e6b704fe68 45
Kojto 108:34e6b704fe68 46 /* Includes ------------------------------------------------------------------*/
Kojto 108:34e6b704fe68 47 #include "stm32f4xx_hal_def.h"
Kojto 108:34e6b704fe68 48
Kojto 108:34e6b704fe68 49 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 108:34e6b704fe68 50 * @{
Kojto 108:34e6b704fe68 51 */
Kojto 108:34e6b704fe68 52
Kojto 108:34e6b704fe68 53 /** @addtogroup PWREx
Kojto 108:34e6b704fe68 54 * @{
Kojto 108:34e6b704fe68 55 */
Kojto 108:34e6b704fe68 56
Kojto 108:34e6b704fe68 57 /* Exported types ------------------------------------------------------------*/
Kojto 108:34e6b704fe68 58 /* Exported constants --------------------------------------------------------*/
Kojto 108:34e6b704fe68 59 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
Kojto 108:34e6b704fe68 60 * @{
Kojto 108:34e6b704fe68 61 */
Kojto 110:165afa46840b 62 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 110:165afa46840b 63 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
Kojto 108:34e6b704fe68 64
Kojto 108:34e6b704fe68 65 /** @defgroup PWREx_Regulator_state_in_UnderDrive_mode PWREx Regulator state in UnderDrive mode
Kojto 108:34e6b704fe68 66 * @{
Kojto 108:34e6b704fe68 67 */
Kojto 108:34e6b704fe68 68 #define PWR_MAINREGULATOR_UNDERDRIVE_ON PWR_CR_MRUDS
Kojto 108:34e6b704fe68 69 #define PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
Kojto 108:34e6b704fe68 70 /**
Kojto 108:34e6b704fe68 71 * @}
Kojto 108:34e6b704fe68 72 */
Kojto 108:34e6b704fe68 73
Kojto 108:34e6b704fe68 74 /** @defgroup PWREx_Over_Under_Drive_Flag PWREx Over Under Drive Flag
Kojto 108:34e6b704fe68 75 * @{
Kojto 108:34e6b704fe68 76 */
Kojto 108:34e6b704fe68 77 #define PWR_FLAG_ODRDY PWR_CSR_ODRDY
Kojto 108:34e6b704fe68 78 #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
Kojto 108:34e6b704fe68 79 #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
Kojto 108:34e6b704fe68 80 /**
Kojto 108:34e6b704fe68 81 * @}
Kojto 108:34e6b704fe68 82 */
Kojto 110:165afa46840b 83 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 108:34e6b704fe68 84
Kojto 110:165afa46840b 85 /** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale
Kojto 108:34e6b704fe68 86 * @{
Kojto 108:34e6b704fe68 87 */
Kojto 108:34e6b704fe68 88 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
Kojto 108:34e6b704fe68 89 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK = 168 MHz. */
Kojto 108:34e6b704fe68 90 #define PWR_REGULATOR_VOLTAGE_SCALE2 ((uint32_t)0x00000000) /* Scale 2 mode: the maximum value of fHCLK = 144 MHz. */
Kojto 108:34e6b704fe68 91 #else
Kojto 108:34e6b704fe68 92 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK is 168 MHz. It can be extended to
Kojto 108:34e6b704fe68 93 180 MHz by activating the over-drive mode. */
Kojto 108:34e6b704fe68 94 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 /* Scale 2 mode: the maximum value of fHCLK is 144 MHz. It can be extended to
Kojto 108:34e6b704fe68 95 168 MHz by activating the over-drive mode. */
Kojto 108:34e6b704fe68 96 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
Kojto 108:34e6b704fe68 97 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
Kojto 108:34e6b704fe68 98 /**
Kojto 108:34e6b704fe68 99 * @}
Kojto 108:34e6b704fe68 100 */
Kojto 110:165afa46840b 101 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx)
Kojto 110:165afa46840b 102 /** @defgroup PWREx_WakeUp_Pins PWREx WakeUp Pins
Kojto 110:165afa46840b 103 * @{
Kojto 110:165afa46840b 104 */
Kojto 110:165afa46840b 105 #define PWR_WAKEUP_PIN2 ((uint32_t)0x00000080)
Kojto 110:165afa46840b 106 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
Kojto 110:165afa46840b 107 #define PWR_WAKEUP_PIN3 ((uint32_t)0x00000040)
Kojto 110:165afa46840b 108 #endif /* STM32F410xx */
Kojto 110:165afa46840b 109 /**
Kojto 110:165afa46840b 110 * @}
Kojto 110:165afa46840b 111 */
Kojto 110:165afa46840b 112 #endif /* STM32F410xx || STM32F446xx */
Kojto 110:165afa46840b 113
Kojto 108:34e6b704fe68 114 /**
Kojto 108:34e6b704fe68 115 * @}
Kojto 108:34e6b704fe68 116 */
Kojto 108:34e6b704fe68 117
Kojto 108:34e6b704fe68 118 /* Exported macro ------------------------------------------------------------*/
Kojto 108:34e6b704fe68 119 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
Kojto 108:34e6b704fe68 120 * @{
Kojto 108:34e6b704fe68 121 */
Kojto 110:165afa46840b 122
Kojto 110:165afa46840b 123 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
Kojto 110:165afa46840b 124 /** @brief macros configure the main internal regulator output voltage.
Kojto 110:165afa46840b 125 * @param __REGULATOR__: specifies the regulator output voltage to achieve
Kojto 110:165afa46840b 126 * a tradeoff between performance and power consumption when the device does
Kojto 110:165afa46840b 127 * not operate at the maximum frequency (refer to the datasheets for more details).
Kojto 110:165afa46840b 128 * This parameter can be one of the following values:
Kojto 110:165afa46840b 129 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
Kojto 110:165afa46840b 130 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
Kojto 110:165afa46840b 131 * @retval None
Kojto 110:165afa46840b 132 */
Kojto 110:165afa46840b 133 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
Kojto 110:165afa46840b 134 __IO uint32_t tmpreg; \
Kojto 110:165afa46840b 135 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
Kojto 110:165afa46840b 136 /* Delay after an RCC peripheral clock enabling */ \
Kojto 110:165afa46840b 137 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
Kojto 110:165afa46840b 138 UNUSED(tmpreg); \
Kojto 110:165afa46840b 139 } while(0)
Kojto 110:165afa46840b 140 #else
Kojto 110:165afa46840b 141 /** @brief macros configure the main internal regulator output voltage.
Kojto 110:165afa46840b 142 * @param __REGULATOR__: specifies the regulator output voltage to achieve
Kojto 110:165afa46840b 143 * a tradeoff between performance and power consumption when the device does
Kojto 110:165afa46840b 144 * not operate at the maximum frequency (refer to the datasheets for more details).
Kojto 110:165afa46840b 145 * This parameter can be one of the following values:
Kojto 110:165afa46840b 146 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
Kojto 110:165afa46840b 147 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
Kojto 110:165afa46840b 148 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
Kojto 110:165afa46840b 149 * @retval None
Kojto 110:165afa46840b 150 */
Kojto 110:165afa46840b 151 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
Kojto 110:165afa46840b 152 __IO uint32_t tmpreg; \
Kojto 110:165afa46840b 153 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
Kojto 110:165afa46840b 154 /* Delay after an RCC peripheral clock enabling */ \
Kojto 110:165afa46840b 155 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
Kojto 110:165afa46840b 156 UNUSED(tmpreg); \
Kojto 110:165afa46840b 157 } while(0)
Kojto 110:165afa46840b 158 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
Kojto 110:165afa46840b 159
Kojto 110:165afa46840b 160 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 110:165afa46840b 161 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
Kojto 108:34e6b704fe68 162 /** @brief Macros to enable or disable the Over drive mode.
Kojto 108:34e6b704fe68 163 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
Kojto 108:34e6b704fe68 164 */
Kojto 108:34e6b704fe68 165 #define __HAL_PWR_OVERDRIVE_ENABLE() (*(__IO uint32_t *) CR_ODEN_BB = ENABLE)
Kojto 108:34e6b704fe68 166 #define __HAL_PWR_OVERDRIVE_DISABLE() (*(__IO uint32_t *) CR_ODEN_BB = DISABLE)
Kojto 108:34e6b704fe68 167
Kojto 108:34e6b704fe68 168 /** @brief Macros to enable or disable the Over drive switching.
Kojto 108:34e6b704fe68 169 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
Kojto 108:34e6b704fe68 170 */
Kojto 108:34e6b704fe68 171 #define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = ENABLE)
Kojto 108:34e6b704fe68 172 #define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = DISABLE)
Kojto 108:34e6b704fe68 173
Kojto 108:34e6b704fe68 174 /** @brief Macros to enable or disable the Under drive mode.
Kojto 108:34e6b704fe68 175 * @note This mode is enabled only with STOP low power mode.
Kojto 108:34e6b704fe68 176 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
Kojto 108:34e6b704fe68 177 * mode is only available when the main regulator or the low power regulator
Kojto 108:34e6b704fe68 178 * is in low voltage mode.
Kojto 108:34e6b704fe68 179 * @note If the Under-drive mode was enabled, it is automatically disabled after
Kojto 108:34e6b704fe68 180 * exiting Stop mode.
Kojto 108:34e6b704fe68 181 * When the voltage regulator operates in Under-drive mode, an additional
Kojto 108:34e6b704fe68 182 * startup delay is induced when waking up from Stop mode.
Kojto 108:34e6b704fe68 183 */
Kojto 108:34e6b704fe68 184 #define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR |= (uint32_t)PWR_CR_UDEN)
Kojto 108:34e6b704fe68 185 #define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR &= (uint32_t)(~PWR_CR_UDEN))
Kojto 108:34e6b704fe68 186
Kojto 108:34e6b704fe68 187 /** @brief Check PWR flag is set or not.
Kojto 108:34e6b704fe68 188 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
Kojto 108:34e6b704fe68 189 * @param __FLAG__: specifies the flag to check.
Kojto 108:34e6b704fe68 190 * This parameter can be one of the following values:
Kojto 108:34e6b704fe68 191 * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode
Kojto 108:34e6b704fe68 192 * is ready
Kojto 108:34e6b704fe68 193 * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode
Kojto 108:34e6b704fe68 194 * switching is ready
Kojto 108:34e6b704fe68 195 * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode
Kojto 108:34e6b704fe68 196 * is enabled in Stop mode
Kojto 108:34e6b704fe68 197 * @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto 108:34e6b704fe68 198 */
Kojto 108:34e6b704fe68 199 #define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
Kojto 108:34e6b704fe68 200
Kojto 108:34e6b704fe68 201 /** @brief Clear the Under-Drive Ready flag.
Kojto 108:34e6b704fe68 202 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
Kojto 108:34e6b704fe68 203 */
Kojto 108:34e6b704fe68 204 #define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR |= PWR_FLAG_UDRDY)
Kojto 108:34e6b704fe68 205
Kojto 110:165afa46840b 206 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 108:34e6b704fe68 207 /**
Kojto 108:34e6b704fe68 208 * @}
Kojto 108:34e6b704fe68 209 */
Kojto 108:34e6b704fe68 210
Kojto 108:34e6b704fe68 211 /* Exported functions --------------------------------------------------------*/
Kojto 108:34e6b704fe68 212 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
Kojto 108:34e6b704fe68 213 * @{
Kojto 108:34e6b704fe68 214 */
Kojto 108:34e6b704fe68 215
Kojto 108:34e6b704fe68 216 /** @addtogroup PWREx_Exported_Functions_Group1
Kojto 108:34e6b704fe68 217 * @{
Kojto 108:34e6b704fe68 218 */
Kojto 108:34e6b704fe68 219 void HAL_PWREx_EnableFlashPowerDown(void);
Kojto 108:34e6b704fe68 220 void HAL_PWREx_DisableFlashPowerDown(void);
Kojto 108:34e6b704fe68 221 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
Kojto 108:34e6b704fe68 222 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
Kojto 108:34e6b704fe68 223 uint32_t HAL_PWREx_GetVoltageRange(void);
Kojto 108:34e6b704fe68 224 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
Kojto 108:34e6b704fe68 225
Kojto 110:165afa46840b 226 #if defined(STM32F469xx) || defined(STM32F479xx)
Kojto 110:165afa46840b 227 void HAL_PWREx_EnableWakeUpPinPolarityRisingEdge(void);
Kojto 110:165afa46840b 228 void HAL_PWREx_EnableWakeUpPinPolarityFallingEdge(void);
Kojto 110:165afa46840b 229 #endif /* STM32F469xx || STM32F479xx */
Kojto 110:165afa46840b 230
Kojto 110:165afa46840b 231 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F401xC) ||\
Kojto 110:165afa46840b 232 defined(STM32F401xE) || defined(STM32F411xE)
Kojto 108:34e6b704fe68 233 void HAL_PWREx_EnableMainRegulatorLowVoltage(void);
Kojto 108:34e6b704fe68 234 void HAL_PWREx_DisableMainRegulatorLowVoltage(void);
Kojto 108:34e6b704fe68 235 void HAL_PWREx_EnableLowRegulatorLowVoltage(void);
Kojto 108:34e6b704fe68 236 void HAL_PWREx_DisableLowRegulatorLowVoltage(void);
Kojto 110:165afa46840b 237 #endif /* STM32F410xx || STM32F401xC || STM32F401xE || STM32F411xE */
Kojto 108:34e6b704fe68 238
Kojto 110:165afa46840b 239 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) ||\
Kojto 110:165afa46840b 240 defined(STM32F469xx) || defined(STM32F479xx)
Kojto 108:34e6b704fe68 241 HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void);
Kojto 108:34e6b704fe68 242 HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void);
Kojto 108:34e6b704fe68 243 HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
Kojto 110:165afa46840b 244 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 108:34e6b704fe68 245
Kojto 108:34e6b704fe68 246 /**
Kojto 108:34e6b704fe68 247 * @}
Kojto 108:34e6b704fe68 248 */
Kojto 108:34e6b704fe68 249
Kojto 108:34e6b704fe68 250 /**
Kojto 108:34e6b704fe68 251 * @}
Kojto 108:34e6b704fe68 252 */
Kojto 108:34e6b704fe68 253 /* Private types -------------------------------------------------------------*/
Kojto 108:34e6b704fe68 254 /* Private variables ---------------------------------------------------------*/
Kojto 108:34e6b704fe68 255 /* Private constants ---------------------------------------------------------*/
Kojto 108:34e6b704fe68 256 /** @defgroup PWREx_Private_Constants PWREx Private Constants
Kojto 108:34e6b704fe68 257 * @{
Kojto 108:34e6b704fe68 258 */
Kojto 108:34e6b704fe68 259
Kojto 108:34e6b704fe68 260 /** @defgroup PWREx_register_alias_address PWREx Register alias address
Kojto 108:34e6b704fe68 261 * @{
Kojto 108:34e6b704fe68 262 */
Kojto 108:34e6b704fe68 263 /* ------------- PWR registers bit address in the alias region ---------------*/
Kojto 108:34e6b704fe68 264 /* --- CR Register ---*/
Kojto 108:34e6b704fe68 265 /* Alias word address of FPDS bit */
Kojto 108:34e6b704fe68 266 #define FPDS_BIT_NUMBER POSITION_VAL(PWR_CR_FPDS)
Kojto 108:34e6b704fe68 267 #define CR_FPDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FPDS_BIT_NUMBER * 4))
Kojto 108:34e6b704fe68 268
Kojto 108:34e6b704fe68 269 /* Alias word address of ODEN bit */
Kojto 108:34e6b704fe68 270 #define ODEN_BIT_NUMBER POSITION_VAL(PWR_CR_ODEN)
Kojto 108:34e6b704fe68 271 #define CR_ODEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ODEN_BIT_NUMBER * 4))
Kojto 108:34e6b704fe68 272
Kojto 108:34e6b704fe68 273 /* Alias word address of ODSWEN bit */
Kojto 108:34e6b704fe68 274 #define ODSWEN_BIT_NUMBER POSITION_VAL(PWR_CR_ODSWEN)
Kojto 108:34e6b704fe68 275 #define CR_ODSWEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ODSWEN_BIT_NUMBER * 4))
Kojto 108:34e6b704fe68 276
Kojto 108:34e6b704fe68 277 /* Alias word address of MRLVDS bit */
Kojto 108:34e6b704fe68 278 #define MRLVDS_BIT_NUMBER POSITION_VAL(PWR_CR_MRLVDS)
Kojto 108:34e6b704fe68 279 #define CR_MRLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (MRLVDS_BIT_NUMBER * 4))
Kojto 108:34e6b704fe68 280
Kojto 108:34e6b704fe68 281 /* Alias word address of LPLVDS bit */
Kojto 108:34e6b704fe68 282 #define LPLVDS_BIT_NUMBER POSITION_VAL(PWR_CR_LPLVDS)
Kojto 108:34e6b704fe68 283 #define CR_LPLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPLVDS_BIT_NUMBER * 4))
Kojto 108:34e6b704fe68 284
Kojto 108:34e6b704fe68 285 /**
Kojto 108:34e6b704fe68 286 * @}
Kojto 108:34e6b704fe68 287 */
Kojto 108:34e6b704fe68 288
Kojto 108:34e6b704fe68 289 /** @defgroup PWREx_CSR_register_alias PWRx CSR Register alias address
Kojto 108:34e6b704fe68 290 * @{
Kojto 108:34e6b704fe68 291 */
Kojto 108:34e6b704fe68 292 /* --- CSR Register ---*/
Kojto 108:34e6b704fe68 293 /* Alias word address of BRE bit */
Kojto 108:34e6b704fe68 294 #define BRE_BIT_NUMBER POSITION_VAL(PWR_CSR_BRE)
Kojto 110:165afa46840b 295 #define CSR_BRE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (BRE_BIT_NUMBER * 4))
Kojto 110:165afa46840b 296
Kojto 110:165afa46840b 297 #if defined(STM32F469xx) || defined(STM32F479xx)
Kojto 110:165afa46840b 298 /* Alias word address of WUPP bit */
Kojto 110:165afa46840b 299 #define WUPP_BIT_NUMBER POSITION_VAL(PWR_CSR_WUPP)
Kojto 110:165afa46840b 300 #define CSR_WUPP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (WUPP_BIT_NUMBER * 4))
Kojto 110:165afa46840b 301 #endif /* STM32F469xx || STM32F479xx */
Kojto 108:34e6b704fe68 302 /**
Kojto 108:34e6b704fe68 303 * @}
Kojto 108:34e6b704fe68 304 */
Kojto 108:34e6b704fe68 305
Kojto 108:34e6b704fe68 306 /**
Kojto 108:34e6b704fe68 307 * @}
Kojto 108:34e6b704fe68 308 */
Kojto 108:34e6b704fe68 309
Kojto 108:34e6b704fe68 310 /* Private macros ------------------------------------------------------------*/
Kojto 108:34e6b704fe68 311 /** @defgroup PWREx_Private_Macros PWREx Private Macros
Kojto 108:34e6b704fe68 312 * @{
Kojto 108:34e6b704fe68 313 */
Kojto 108:34e6b704fe68 314
Kojto 108:34e6b704fe68 315 /** @defgroup PWREx_IS_PWR_Definitions PWREx Private macros to check input parameters
Kojto 108:34e6b704fe68 316 * @{
Kojto 108:34e6b704fe68 317 */
Kojto 110:165afa46840b 318 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 110:165afa46840b 319 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
Kojto 108:34e6b704fe68 320 #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_UNDERDRIVE_ON) || \
Kojto 108:34e6b704fe68 321 ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON))
Kojto 110:165afa46840b 322 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 108:34e6b704fe68 323
Kojto 108:34e6b704fe68 324 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
Kojto 108:34e6b704fe68 325 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
Kojto 108:34e6b704fe68 326 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
Kojto 108:34e6b704fe68 327 #else
Kojto 108:34e6b704fe68 328 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
Kojto 108:34e6b704fe68 329 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
Kojto 108:34e6b704fe68 330 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
Kojto 108:34e6b704fe68 331 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
Kojto 108:34e6b704fe68 332
Kojto 110:165afa46840b 333 #if defined(STM32F446xx)
Kojto 110:165afa46840b 334 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2))
Kojto 110:165afa46840b 335 #elif defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
Kojto 110:165afa46840b 336 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2) || \
Kojto 110:165afa46840b 337 ((PIN) == PWR_WAKEUP_PIN3))
Kojto 110:165afa46840b 338 #else
Kojto 110:165afa46840b 339 #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
Kojto 110:165afa46840b 340 #endif /* STM32F446xx */
Kojto 108:34e6b704fe68 341 /**
Kojto 108:34e6b704fe68 342 * @}
Kojto 108:34e6b704fe68 343 */
Kojto 108:34e6b704fe68 344
Kojto 108:34e6b704fe68 345 /**
Kojto 108:34e6b704fe68 346 * @}
Kojto 108:34e6b704fe68 347 */
Kojto 108:34e6b704fe68 348
Kojto 108:34e6b704fe68 349 /**
Kojto 108:34e6b704fe68 350 * @}
Kojto 108:34e6b704fe68 351 */
Kojto 108:34e6b704fe68 352
Kojto 108:34e6b704fe68 353 /**
Kojto 108:34e6b704fe68 354 * @}
Kojto 108:34e6b704fe68 355 */
Kojto 108:34e6b704fe68 356
Kojto 108:34e6b704fe68 357 #ifdef __cplusplus
Kojto 108:34e6b704fe68 358 }
Kojto 108:34e6b704fe68 359 #endif
Kojto 108:34e6b704fe68 360
Kojto 108:34e6b704fe68 361
Kojto 108:34e6b704fe68 362 #endif /* __STM32F4xx_HAL_PWR_EX_H */
Kojto 108:34e6b704fe68 363
Kojto 108:34e6b704fe68 364 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/