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TARGET_DISCO_L053C8/stm32l0xx_hal_dma.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
99:dbbf35b96557 
.

Who changed what in which revision?

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Kojto 99:dbbf35b96557 1 /**
Kojto 99:dbbf35b96557 2 ******************************************************************************
Kojto 99:dbbf35b96557 3 * @file stm32l0xx_hal_dma.h
Kojto 99:dbbf35b96557 4 * @author MCD Application Team
Kojto 99:dbbf35b96557 5 * @version V1.2.0
Kojto 99:dbbf35b96557 6 * @date 06-February-2015
Kojto 99:dbbf35b96557 7 * @brief Header file of DMA HAL module.
Kojto 99:dbbf35b96557 8 ******************************************************************************
Kojto 99:dbbf35b96557 9 * @attention
Kojto 99:dbbf35b96557 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 99:dbbf35b96557 12 *
Kojto 99:dbbf35b96557 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 99:dbbf35b96557 14 * are permitted provided that the following conditions are met:
Kojto 99:dbbf35b96557 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 99:dbbf35b96557 16 * this list of conditions and the following disclaimer.
Kojto 99:dbbf35b96557 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 99:dbbf35b96557 18 * this list of conditions and the following disclaimer in the documentation
Kojto 99:dbbf35b96557 19 * and/or other materials provided with the distribution.
Kojto 99:dbbf35b96557 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 99:dbbf35b96557 21 * may be used to endorse or promote products derived from this software
Kojto 99:dbbf35b96557 22 * without specific prior written permission.
Kojto 99:dbbf35b96557 23 *
Kojto 99:dbbf35b96557 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 99:dbbf35b96557 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 99:dbbf35b96557 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 99:dbbf35b96557 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 99:dbbf35b96557 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 99:dbbf35b96557 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 99:dbbf35b96557 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 99:dbbf35b96557 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 99:dbbf35b96557 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 99:dbbf35b96557 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 99:dbbf35b96557 34 *
Kojto 99:dbbf35b96557 35 ******************************************************************************
Kojto 99:dbbf35b96557 36 */
Kojto 99:dbbf35b96557 37
Kojto 99:dbbf35b96557 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 99:dbbf35b96557 39 #ifndef __STM32L0xx_HAL_DMA_H
Kojto 99:dbbf35b96557 40 #define __STM32L0xx_HAL_DMA_H
Kojto 99:dbbf35b96557 41
Kojto 99:dbbf35b96557 42 #ifdef __cplusplus
Kojto 99:dbbf35b96557 43 extern "C" {
Kojto 99:dbbf35b96557 44 #endif
Kojto 99:dbbf35b96557 45
Kojto 99:dbbf35b96557 46 /* Includes ------------------------------------------------------------------*/
Kojto 99:dbbf35b96557 47 #include "stm32l0xx_hal_def.h"
Kojto 99:dbbf35b96557 48
Kojto 99:dbbf35b96557 49 /** @addtogroup STM32L0xx_HAL_Driver
Kojto 99:dbbf35b96557 50 * @{
Kojto 99:dbbf35b96557 51 */
Kojto 99:dbbf35b96557 52
Kojto 99:dbbf35b96557 53 /** @defgroup DMA DMA
Kojto 99:dbbf35b96557 54 * @{
Kojto 99:dbbf35b96557 55 */
Kojto 99:dbbf35b96557 56
Kojto 99:dbbf35b96557 57 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 58
Kojto 99:dbbf35b96557 59 /**
Kojto 99:dbbf35b96557 60 * @brief DMA Configuration Structure definition
Kojto 99:dbbf35b96557 61 */
Kojto 99:dbbf35b96557 62 typedef struct
Kojto 99:dbbf35b96557 63 {
Kojto 99:dbbf35b96557 64 uint32_t Request; /*!< Specifies the request selected for the specified channel.
Kojto 99:dbbf35b96557 65 This parameter can be a value of @ref DMA_request */
Kojto 99:dbbf35b96557 66
Kojto 99:dbbf35b96557 67 uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
Kojto 99:dbbf35b96557 68 from memory to memory or from peripheral to memory.
Kojto 99:dbbf35b96557 69 This parameter can be a value of @ref DMA_Data_transfer_direction */
Kojto 99:dbbf35b96557 70
Kojto 99:dbbf35b96557 71 uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
Kojto 99:dbbf35b96557 72 When Memory to Memory transfer is used, this is the Source Increment mode
Kojto 99:dbbf35b96557 73 This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
Kojto 99:dbbf35b96557 74
Kojto 99:dbbf35b96557 75 uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
Kojto 99:dbbf35b96557 76 When Memory to Memory transfer is used, this is the Destination Increment mode
Kojto 99:dbbf35b96557 77 This parameter can be a value of @ref DMA_Memory_incremented_mode */
Kojto 99:dbbf35b96557 78
Kojto 99:dbbf35b96557 79 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
Kojto 99:dbbf35b96557 80 When Memory to Memory transfer is used, this is the Source Alignment format
Kojto 99:dbbf35b96557 81 This parameter can be a value of @ref DMA_Peripheral_data_size */
Kojto 99:dbbf35b96557 82
Kojto 99:dbbf35b96557 83 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
Kojto 99:dbbf35b96557 84 When Memory to Memory transfer is used, this is the Destination Alignment format
Kojto 99:dbbf35b96557 85 This parameter can be a value of @ref DMA_Memory_data_size */
Kojto 99:dbbf35b96557 86
Kojto 99:dbbf35b96557 87 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx (Normal or Circular).
Kojto 99:dbbf35b96557 88 This parameter can be a value of @ref DMA_mode
Kojto 99:dbbf35b96557 89 @note The circular buffer mode cannot be used if the memory-to-memory
Kojto 99:dbbf35b96557 90 data transfer is configured on the selected Channel */
Kojto 99:dbbf35b96557 91
Kojto 99:dbbf35b96557 92 uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
Kojto 99:dbbf35b96557 93 This parameter can be a value of @ref DMA_Priority_level */
Kojto 99:dbbf35b96557 94 } DMA_InitTypeDef;
Kojto 99:dbbf35b96557 95
Kojto 99:dbbf35b96557 96 /**
Kojto 99:dbbf35b96557 97 * @brief DMA Configuration enumeration values definition
Kojto 99:dbbf35b96557 98 */
Kojto 99:dbbf35b96557 99 typedef enum
Kojto 99:dbbf35b96557 100 {
Kojto 99:dbbf35b96557 101 DMA_MODE = 0, /*!< Control related DMA mode Parameter in DMA_InitTypeDef */
Kojto 99:dbbf35b96557 102 DMA_PRIORITY = 1, /*!< Control related priority level Parameter in DMA_InitTypeDef */
Kojto 99:dbbf35b96557 103
Kojto 99:dbbf35b96557 104 } DMA_ControlTypeDef;
Kojto 99:dbbf35b96557 105
Kojto 99:dbbf35b96557 106 /**
Kojto 99:dbbf35b96557 107 * @brief HAL DMA State structures definition
Kojto 99:dbbf35b96557 108 */
Kojto 99:dbbf35b96557 109 typedef enum
Kojto 99:dbbf35b96557 110 {
Kojto 99:dbbf35b96557 111 HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
Kojto 99:dbbf35b96557 112 HAL_DMA_STATE_READY = 0x01, /*!< DMA process success and ready for use */
Kojto 99:dbbf35b96557 113 HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
Kojto 99:dbbf35b96557 114 HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
Kojto 99:dbbf35b96557 115 HAL_DMA_STATE_ERROR = 0x04, /*!< DMA error state */
Kojto 99:dbbf35b96557 116 HAL_DMA_STATE_READY_HALF = 0x05, /*!< DMA Half process success */
Kojto 99:dbbf35b96557 117 }HAL_DMA_StateTypeDef;
Kojto 99:dbbf35b96557 118
Kojto 99:dbbf35b96557 119 /**
Kojto 99:dbbf35b96557 120 * @brief HAL DMA Error Code structure definition
Kojto 99:dbbf35b96557 121 */
Kojto 99:dbbf35b96557 122 typedef enum
Kojto 99:dbbf35b96557 123 {
Kojto 99:dbbf35b96557 124 HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
Kojto 99:dbbf35b96557 125 HAL_DMA_HALF_TRANSFER = 0x01, /*!< Half Transfer */
Kojto 99:dbbf35b96557 126
Kojto 99:dbbf35b96557 127 }HAL_DMA_LevelCompleteTypeDef;
Kojto 99:dbbf35b96557 128
Kojto 99:dbbf35b96557 129
Kojto 99:dbbf35b96557 130 /**
Kojto 99:dbbf35b96557 131 * @brief DMA handle Structure definition
Kojto 99:dbbf35b96557 132 */
Kojto 99:dbbf35b96557 133 typedef struct __DMA_HandleTypeDef
Kojto 99:dbbf35b96557 134 {
Kojto 99:dbbf35b96557 135 DMA_Channel_TypeDef *Instance; /*!< Register base address */
Kojto 99:dbbf35b96557 136
Kojto 99:dbbf35b96557 137 DMA_InitTypeDef Init; /*!< DMA communication parameters */
Kojto 99:dbbf35b96557 138
Kojto 99:dbbf35b96557 139 HAL_LockTypeDef Lock; /*!< DMA locking object */
Kojto 99:dbbf35b96557 140
Kojto 99:dbbf35b96557 141 __IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
Kojto 99:dbbf35b96557 142
Kojto 99:dbbf35b96557 143 void *Parent; /*!< Parent object state */
Kojto 99:dbbf35b96557 144
Kojto 99:dbbf35b96557 145 void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
Kojto 99:dbbf35b96557 146
Kojto 99:dbbf35b96557 147 void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
Kojto 99:dbbf35b96557 148
Kojto 99:dbbf35b96557 149 void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
Kojto 99:dbbf35b96557 150
Kojto 99:dbbf35b96557 151 __IO uint32_t ErrorCode; /*!< DMA Error code */
Kojto 99:dbbf35b96557 152
Kojto 99:dbbf35b96557 153 } DMA_HandleTypeDef;
Kojto 99:dbbf35b96557 154
Kojto 99:dbbf35b96557 155 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 156
Kojto 99:dbbf35b96557 157 /** @defgroup DMA_Exported_Constants DMA Exported Constants
Kojto 99:dbbf35b96557 158 * @{
Kojto 99:dbbf35b96557 159 */
Kojto 99:dbbf35b96557 160
Kojto 99:dbbf35b96557 161 /** @defgroup DMA_Error_Code DMA Error Codes
Kojto 99:dbbf35b96557 162 * @{
Kojto 99:dbbf35b96557 163 */
Kojto 99:dbbf35b96557 164 #define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 99:dbbf35b96557 165 #define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
Kojto 99:dbbf35b96557 166 #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
Kojto 99:dbbf35b96557 167
Kojto 99:dbbf35b96557 168 #define IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || \
Kojto 99:dbbf35b96557 169 ((PERIPH) == DMA1_Channel2) || \
Kojto 99:dbbf35b96557 170 ((PERIPH) == DMA1_Channel3) || \
Kojto 99:dbbf35b96557 171 ((PERIPH) == DMA1_Channel4) || \
Kojto 99:dbbf35b96557 172 ((PERIPH) == DMA1_Channel5) || \
Kojto 99:dbbf35b96557 173 ((PERIPH) == DMA1_Channel6) || \
Kojto 99:dbbf35b96557 174 ((PERIPH) == DMA1_Channel7))
Kojto 99:dbbf35b96557 175
Kojto 99:dbbf35b96557 176 #define IS_DMA_ALL_CONTROLLER(CONTROLLER) (((CONTROLLER) == DMA1))
Kojto 99:dbbf35b96557 177
Kojto 99:dbbf35b96557 178 /**
Kojto 99:dbbf35b96557 179 * @}
Kojto 99:dbbf35b96557 180 */
Kojto 99:dbbf35b96557 181
Kojto 99:dbbf35b96557 182 /** @defgroup DMA_request DMA request defintiions
Kojto 99:dbbf35b96557 183 * @{
Kojto 99:dbbf35b96557 184 */
Kojto 99:dbbf35b96557 185
Kojto 99:dbbf35b96557 186 #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
Kojto 99:dbbf35b96557 187
Kojto 99:dbbf35b96557 188 #define DMA_REQUEST_0 ((uint32_t)0x00000000)
Kojto 99:dbbf35b96557 189 #define DMA_REQUEST_1 ((uint32_t)0x00000001)
Kojto 99:dbbf35b96557 190 #define DMA_REQUEST_2 ((uint32_t)0x00000002)
Kojto 99:dbbf35b96557 191 #define DMA_REQUEST_3 ((uint32_t)0x00000003)
Kojto 99:dbbf35b96557 192 #define DMA_REQUEST_4 ((uint32_t)0x00000004)
Kojto 99:dbbf35b96557 193 #define DMA_REQUEST_5 ((uint32_t)0x00000005)
Kojto 99:dbbf35b96557 194 #define DMA_REQUEST_6 ((uint32_t)0x00000006)
Kojto 99:dbbf35b96557 195 #define DMA_REQUEST_7 ((uint32_t)0x00000007)
Kojto 99:dbbf35b96557 196 #define DMA_REQUEST_8 ((uint32_t)0x00000008)
Kojto 99:dbbf35b96557 197 #define DMA_REQUEST_9 ((uint32_t)0x00000009)
Kojto 99:dbbf35b96557 198 #define DMA_REQUEST_10 ((uint32_t)0x0000000A)
Kojto 99:dbbf35b96557 199 #define DMA_REQUEST_11 ((uint32_t)0x0000000B)
Kojto 99:dbbf35b96557 200 #define DMA_REQUEST_12 ((uint32_t)0x0000000C)
Kojto 99:dbbf35b96557 201 #define DMA_REQUEST_13 ((uint32_t)0x0000000D)
Kojto 99:dbbf35b96557 202 #define DMA_REQUEST_14 ((uint32_t)0x0000000E)
Kojto 99:dbbf35b96557 203 #define DMA_REQUEST_15 ((uint32_t)0x0000000F)
Kojto 99:dbbf35b96557 204
Kojto 99:dbbf35b96557 205 #define IS_DMA_ALL_REQUEST(REQUEST) (((REQUEST) == DMA_REQUEST_0) || \
Kojto 99:dbbf35b96557 206 ((REQUEST) == DMA_REQUEST_1) || \
Kojto 99:dbbf35b96557 207 ((REQUEST) == DMA_REQUEST_2) || \
Kojto 99:dbbf35b96557 208 ((REQUEST) == DMA_REQUEST_3) || \
Kojto 99:dbbf35b96557 209 ((REQUEST) == DMA_REQUEST_4) || \
Kojto 99:dbbf35b96557 210 ((REQUEST) == DMA_REQUEST_5) || \
Kojto 99:dbbf35b96557 211 ((REQUEST) == DMA_REQUEST_6) || \
Kojto 99:dbbf35b96557 212 ((REQUEST) == DMA_REQUEST_7) || \
Kojto 99:dbbf35b96557 213 ((REQUEST) == DMA_REQUEST_8) || \
Kojto 99:dbbf35b96557 214 ((REQUEST) == DMA_REQUEST_9) || \
Kojto 99:dbbf35b96557 215 ((REQUEST) == DMA_REQUEST_10) || \
Kojto 99:dbbf35b96557 216 ((REQUEST) == DMA_REQUEST_11) || \
Kojto 99:dbbf35b96557 217 ((REQUEST) == DMA_REQUEST_12) || \
Kojto 99:dbbf35b96557 218 ((REQUEST) == DMA_REQUEST_13) || \
Kojto 99:dbbf35b96557 219 ((REQUEST) == DMA_REQUEST_14) || \
Kojto 99:dbbf35b96557 220 ((REQUEST) == DMA_REQUEST_15))
Kojto 99:dbbf35b96557 221
Kojto 99:dbbf35b96557 222 #else /* #if STM32L071xx || STM32L072xx || STM32L073xx || STM32L081xx || STM32L082xx || STM32L083xx */
Kojto 99:dbbf35b96557 223
Kojto 99:dbbf35b96557 224 #define DMA_REQUEST_0 ((uint32_t)0x00000000)
Kojto 99:dbbf35b96557 225 #define DMA_REQUEST_1 ((uint32_t)0x00000001)
Kojto 99:dbbf35b96557 226 #define DMA_REQUEST_2 ((uint32_t)0x00000002)
Kojto 99:dbbf35b96557 227 #define DMA_REQUEST_3 ((uint32_t)0x00000003)
Kojto 99:dbbf35b96557 228 #define DMA_REQUEST_4 ((uint32_t)0x00000004)
Kojto 99:dbbf35b96557 229 #define DMA_REQUEST_5 ((uint32_t)0x00000005)
Kojto 99:dbbf35b96557 230 #define DMA_REQUEST_6 ((uint32_t)0x00000006)
Kojto 99:dbbf35b96557 231 #define DMA_REQUEST_7 ((uint32_t)0x00000007)
Kojto 99:dbbf35b96557 232 #define DMA_REQUEST_8 ((uint32_t)0x00000008)
Kojto 99:dbbf35b96557 233 #define DMA_REQUEST_9 ((uint32_t)0x00000009)
Kojto 99:dbbf35b96557 234 #define DMA_REQUEST_11 ((uint32_t)0x0000000B)
Kojto 99:dbbf35b96557 235
Kojto 99:dbbf35b96557 236 #define IS_DMA_ALL_REQUEST(REQUEST) (((REQUEST) == DMA_REQUEST_0) || \
Kojto 99:dbbf35b96557 237 ((REQUEST) == DMA_REQUEST_1) || \
Kojto 99:dbbf35b96557 238 ((REQUEST) == DMA_REQUEST_2) || \
Kojto 99:dbbf35b96557 239 ((REQUEST) == DMA_REQUEST_3) || \
Kojto 99:dbbf35b96557 240 ((REQUEST) == DMA_REQUEST_4) || \
Kojto 99:dbbf35b96557 241 ((REQUEST) == DMA_REQUEST_5) || \
Kojto 99:dbbf35b96557 242 ((REQUEST) == DMA_REQUEST_6) || \
Kojto 99:dbbf35b96557 243 ((REQUEST) == DMA_REQUEST_7) || \
Kojto 99:dbbf35b96557 244 ((REQUEST) == DMA_REQUEST_8) || \
Kojto 99:dbbf35b96557 245 ((REQUEST) == DMA_REQUEST_9) || \
Kojto 99:dbbf35b96557 246 ((REQUEST) == DMA_REQUEST_11))
Kojto 99:dbbf35b96557 247 #endif /* #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) */
Kojto 99:dbbf35b96557 248
Kojto 99:dbbf35b96557 249 /**
Kojto 99:dbbf35b96557 250 * @}
Kojto 99:dbbf35b96557 251 */
Kojto 99:dbbf35b96557 252
Kojto 99:dbbf35b96557 253 /** @defgroup DMA_Data_transfer_direction DMA Data Transfer directions
Kojto 99:dbbf35b96557 254 * @{
Kojto 99:dbbf35b96557 255 */
Kojto 99:dbbf35b96557 256 #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
Kojto 99:dbbf35b96557 257 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */
Kojto 99:dbbf35b96557 258 #define DMA_MEMORY_TO_MEMORY ((uint32_t)(DMA_CCR_MEM2MEM)) /*!< Memory to memory direction */
Kojto 99:dbbf35b96557 259
Kojto 99:dbbf35b96557 260 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
Kojto 99:dbbf35b96557 261 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
Kojto 99:dbbf35b96557 262 ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
Kojto 99:dbbf35b96557 263 /**
Kojto 99:dbbf35b96557 264 * @}
Kojto 99:dbbf35b96557 265 */
Kojto 99:dbbf35b96557 266
Kojto 99:dbbf35b96557 267 /** @defgroup DMA_Data_buffer_size
Kojto 99:dbbf35b96557 268 * @{
Kojto 99:dbbf35b96557 269 */
Kojto 99:dbbf35b96557 270 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
Kojto 99:dbbf35b96557 271 /**
Kojto 99:dbbf35b96557 272 * @}
Kojto 99:dbbf35b96557 273 */
Kojto 99:dbbf35b96557 274
Kojto 99:dbbf35b96557 275 /** @defgroup DMA_Peripheral_incremented_mode
Kojto 99:dbbf35b96557 276 * @{
Kojto 99:dbbf35b96557 277 */
Kojto 99:dbbf35b96557 278 #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
Kojto 99:dbbf35b96557 279 #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */
Kojto 99:dbbf35b96557 280
Kojto 99:dbbf35b96557 281 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
Kojto 99:dbbf35b96557 282 ((STATE) == DMA_PINC_DISABLE))
Kojto 99:dbbf35b96557 283 /**
Kojto 99:dbbf35b96557 284 * @}
Kojto 99:dbbf35b96557 285 */
Kojto 99:dbbf35b96557 286
Kojto 99:dbbf35b96557 287 /** @defgroup DMA_Memory_incremented_mode
Kojto 99:dbbf35b96557 288 * @{
Kojto 99:dbbf35b96557 289 */
Kojto 99:dbbf35b96557 290 #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
Kojto 99:dbbf35b96557 291 #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */
Kojto 99:dbbf35b96557 292
Kojto 99:dbbf35b96557 293 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
Kojto 99:dbbf35b96557 294 ((STATE) == DMA_MINC_DISABLE))
Kojto 99:dbbf35b96557 295 /**
Kojto 99:dbbf35b96557 296 * @}
Kojto 99:dbbf35b96557 297 */
Kojto 99:dbbf35b96557 298
Kojto 99:dbbf35b96557 299 /** @defgroup DMA_Peripheral_data_size
Kojto 99:dbbf35b96557 300 * @{
Kojto 99:dbbf35b96557 301 */
Kojto 99:dbbf35b96557 302 #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */
Kojto 99:dbbf35b96557 303 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */
Kojto 99:dbbf35b96557 304 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */
Kojto 99:dbbf35b96557 305
Kojto 99:dbbf35b96557 306 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
Kojto 99:dbbf35b96557 307 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
Kojto 99:dbbf35b96557 308 ((SIZE) == DMA_PDATAALIGN_WORD))
Kojto 99:dbbf35b96557 309 /**
Kojto 99:dbbf35b96557 310 * @}
Kojto 99:dbbf35b96557 311 */
Kojto 99:dbbf35b96557 312
Kojto 99:dbbf35b96557 313
Kojto 99:dbbf35b96557 314 /** @defgroup DMA_Memory_data_size
Kojto 99:dbbf35b96557 315 * @{
Kojto 99:dbbf35b96557 316 */
Kojto 99:dbbf35b96557 317 #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */
Kojto 99:dbbf35b96557 318 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */
Kojto 99:dbbf35b96557 319 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */
Kojto 99:dbbf35b96557 320
Kojto 99:dbbf35b96557 321 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
Kojto 99:dbbf35b96557 322 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
Kojto 99:dbbf35b96557 323 ((SIZE) == DMA_MDATAALIGN_WORD ))
Kojto 99:dbbf35b96557 324 /**
Kojto 99:dbbf35b96557 325 * @}
Kojto 99:dbbf35b96557 326 */
Kojto 99:dbbf35b96557 327
Kojto 99:dbbf35b96557 328 /** @defgroup DMA_mode
Kojto 99:dbbf35b96557 329 * @{
Kojto 99:dbbf35b96557 330 */
Kojto 99:dbbf35b96557 331 #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal Mode */
Kojto 99:dbbf35b96557 332 #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular Mode */
Kojto 99:dbbf35b96557 333
Kojto 99:dbbf35b96557 334 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
Kojto 99:dbbf35b96557 335 ((MODE) == DMA_CIRCULAR))
Kojto 99:dbbf35b96557 336 /**
Kojto 99:dbbf35b96557 337 * @}
Kojto 99:dbbf35b96557 338 */
Kojto 99:dbbf35b96557 339
Kojto 99:dbbf35b96557 340 /** @defgroup DMA_Priority_level
Kojto 99:dbbf35b96557 341 * @{
Kojto 99:dbbf35b96557 342 */
Kojto 99:dbbf35b96557 343 #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */
Kojto 99:dbbf35b96557 344 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
Kojto 99:dbbf35b96557 345 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
Kojto 99:dbbf35b96557 346 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
Kojto 99:dbbf35b96557 347
Kojto 99:dbbf35b96557 348 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
Kojto 99:dbbf35b96557 349 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
Kojto 99:dbbf35b96557 350 ((PRIORITY) == DMA_PRIORITY_HIGH) || \
Kojto 99:dbbf35b96557 351 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
Kojto 99:dbbf35b96557 352 /**
Kojto 99:dbbf35b96557 353 * @}
Kojto 99:dbbf35b96557 354 */
Kojto 99:dbbf35b96557 355
Kojto 99:dbbf35b96557 356
Kojto 99:dbbf35b96557 357 /** @defgroup DMA_interrupt_enable_definitions
Kojto 99:dbbf35b96557 358 * @{
Kojto 99:dbbf35b96557 359 */
Kojto 99:dbbf35b96557 360
Kojto 99:dbbf35b96557 361 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
Kojto 99:dbbf35b96557 362 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
Kojto 99:dbbf35b96557 363 #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE)
Kojto 99:dbbf35b96557 364
Kojto 99:dbbf35b96557 365 /**
Kojto 99:dbbf35b96557 366 * @}
Kojto 99:dbbf35b96557 367 */
Kojto 99:dbbf35b96557 368
Kojto 99:dbbf35b96557 369 /** @defgroup DMA_flag_definitions
Kojto 99:dbbf35b96557 370 * @{
Kojto 99:dbbf35b96557 371 */
Kojto 99:dbbf35b96557 372
Kojto 99:dbbf35b96557 373 #define DMA_FLAG_GL1 ((uint32_t)0x00000001)
Kojto 99:dbbf35b96557 374 #define DMA_FLAG_TC1 ((uint32_t)0x00000002)
Kojto 99:dbbf35b96557 375 #define DMA_FLAG_HT1 ((uint32_t)0x00000004)
Kojto 99:dbbf35b96557 376 #define DMA_FLAG_TE1 ((uint32_t)0x00000008)
Kojto 99:dbbf35b96557 377 #define DMA_FLAG_GL2 ((uint32_t)0x00000010)
Kojto 99:dbbf35b96557 378 #define DMA_FLAG_TC2 ((uint32_t)0x00000020)
Kojto 99:dbbf35b96557 379 #define DMA_FLAG_HT2 ((uint32_t)0x00000040)
Kojto 99:dbbf35b96557 380 #define DMA_FLAG_TE2 ((uint32_t)0x00000080)
Kojto 99:dbbf35b96557 381 #define DMA_FLAG_GL3 ((uint32_t)0x00000100)
Kojto 99:dbbf35b96557 382 #define DMA_FLAG_TC3 ((uint32_t)0x00000200)
Kojto 99:dbbf35b96557 383 #define DMA_FLAG_HT3 ((uint32_t)0x00000400)
Kojto 99:dbbf35b96557 384 #define DMA_FLAG_TE3 ((uint32_t)0x00000800)
Kojto 99:dbbf35b96557 385 #define DMA_FLAG_GL4 ((uint32_t)0x00001000)
Kojto 99:dbbf35b96557 386 #define DMA_FLAG_TC4 ((uint32_t)0x00002000)
Kojto 99:dbbf35b96557 387 #define DMA_FLAG_HT4 ((uint32_t)0x00004000)
Kojto 99:dbbf35b96557 388 #define DMA_FLAG_TE4 ((uint32_t)0x00008000)
Kojto 99:dbbf35b96557 389 #define DMA_FLAG_GL5 ((uint32_t)0x00010000)
Kojto 99:dbbf35b96557 390 #define DMA_FLAG_TC5 ((uint32_t)0x00020000)
Kojto 99:dbbf35b96557 391 #define DMA_FLAG_HT5 ((uint32_t)0x00040000)
Kojto 99:dbbf35b96557 392 #define DMA_FLAG_TE5 ((uint32_t)0x00080000)
Kojto 99:dbbf35b96557 393 #define DMA_FLAG_GL6 ((uint32_t)0x00100000)
Kojto 99:dbbf35b96557 394 #define DMA_FLAG_TC6 ((uint32_t)0x00200000)
Kojto 99:dbbf35b96557 395 #define DMA_FLAG_HT6 ((uint32_t)0x00400000)
Kojto 99:dbbf35b96557 396 #define DMA_FLAG_TE6 ((uint32_t)0x00800000)
Kojto 99:dbbf35b96557 397 #define DMA_FLAG_GL7 ((uint32_t)0x01000000)
Kojto 99:dbbf35b96557 398 #define DMA_FLAG_TC7 ((uint32_t)0x02000000)
Kojto 99:dbbf35b96557 399 #define DMA_FLAG_HT7 ((uint32_t)0x04000000)
Kojto 99:dbbf35b96557 400 #define DMA_FLAG_TE7 ((uint32_t)0x08000000)
Kojto 99:dbbf35b96557 401
Kojto 99:dbbf35b96557 402
Kojto 99:dbbf35b96557 403 /**
Kojto 99:dbbf35b96557 404 * @}
Kojto 99:dbbf35b96557 405 */
Kojto 99:dbbf35b96557 406
Kojto 99:dbbf35b96557 407 /**
Kojto 99:dbbf35b96557 408 * @}
Kojto 99:dbbf35b96557 409 */
Kojto 99:dbbf35b96557 410
Kojto 99:dbbf35b96557 411 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 412
Kojto 99:dbbf35b96557 413 /** @defgroup DMA_Exported_Macros DMA Exported Macros
Kojto 99:dbbf35b96557 414 * @{
Kojto 99:dbbf35b96557 415 */
Kojto 99:dbbf35b96557 416
Kojto 99:dbbf35b96557 417 /** @brief Reset DMA handle state
Kojto 99:dbbf35b96557 418 * @param __HANDLE__: DMA handle
Kojto 99:dbbf35b96557 419 * @retval None
Kojto 99:dbbf35b96557 420 */
Kojto 99:dbbf35b96557 421 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
Kojto 99:dbbf35b96557 422
Kojto 99:dbbf35b96557 423 /**
Kojto 99:dbbf35b96557 424 * @brief Enable the specified DMA Channel.
Kojto 99:dbbf35b96557 425 * @param __HANDLE__: DMA handle
Kojto 99:dbbf35b96557 426 * @retval None.
Kojto 99:dbbf35b96557 427 */
Kojto 99:dbbf35b96557 428 #define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN)
Kojto 99:dbbf35b96557 429
Kojto 99:dbbf35b96557 430 /**
Kojto 99:dbbf35b96557 431 * @brief Disable the specified DMA Channel.
Kojto 99:dbbf35b96557 432 * @param __HANDLE__: DMA handle
Kojto 99:dbbf35b96557 433 * @retval None.
Kojto 99:dbbf35b96557 434 */
Kojto 99:dbbf35b96557 435 #define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN)
Kojto 99:dbbf35b96557 436
Kojto 99:dbbf35b96557 437
Kojto 99:dbbf35b96557 438 /* Interrupt & Flag management */
Kojto 99:dbbf35b96557 439
Kojto 99:dbbf35b96557 440 /**
Kojto 99:dbbf35b96557 441 * @brief Returns the current DMA Channel transfer complete flag.
Kojto 99:dbbf35b96557 442 * @param __HANDLE__: DMA handle
Kojto 99:dbbf35b96557 443 * @retval The specified transfer complete flag index.
Kojto 99:dbbf35b96557 444 */
Kojto 99:dbbf35b96557 445
Kojto 99:dbbf35b96557 446 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
Kojto 99:dbbf35b96557 447 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
Kojto 99:dbbf35b96557 448 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
Kojto 99:dbbf35b96557 449 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
Kojto 99:dbbf35b96557 450 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
Kojto 99:dbbf35b96557 451 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
Kojto 99:dbbf35b96557 452 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
Kojto 99:dbbf35b96557 453 DMA_FLAG_TC7)
Kojto 99:dbbf35b96557 454
Kojto 99:dbbf35b96557 455 /**
Kojto 99:dbbf35b96557 456 * @brief Returns the current DMA Channel half transfer complete flag.
Kojto 99:dbbf35b96557 457 * @param __HANDLE__: DMA handle
Kojto 99:dbbf35b96557 458 * @retval The specified half transfer complete flag index.
Kojto 99:dbbf35b96557 459 */
Kojto 99:dbbf35b96557 460 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
Kojto 99:dbbf35b96557 461 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
Kojto 99:dbbf35b96557 462 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
Kojto 99:dbbf35b96557 463 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
Kojto 99:dbbf35b96557 464 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
Kojto 99:dbbf35b96557 465 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
Kojto 99:dbbf35b96557 466 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
Kojto 99:dbbf35b96557 467 DMA_FLAG_HT7)
Kojto 99:dbbf35b96557 468
Kojto 99:dbbf35b96557 469 /**
Kojto 99:dbbf35b96557 470 * @brief Returns the current DMA Channel transfer error flag.
Kojto 99:dbbf35b96557 471 * @param __HANDLE__: DMA handle
Kojto 99:dbbf35b96557 472 * @retval The specified transfer error flag index.
Kojto 99:dbbf35b96557 473 */
Kojto 99:dbbf35b96557 474 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
Kojto 99:dbbf35b96557 475 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
Kojto 99:dbbf35b96557 476 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
Kojto 99:dbbf35b96557 477 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
Kojto 99:dbbf35b96557 478 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
Kojto 99:dbbf35b96557 479 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
Kojto 99:dbbf35b96557 480 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
Kojto 99:dbbf35b96557 481 DMA_FLAG_TE7)
Kojto 99:dbbf35b96557 482
Kojto 99:dbbf35b96557 483 /**
Kojto 99:dbbf35b96557 484 * @brief Returns the current DMA Channel Global interrupt flag.
Kojto 99:dbbf35b96557 485 * @param __HANDLE__: DMA handle
Kojto 99:dbbf35b96557 486 * @retval The specified transfer error flag index.
Kojto 99:dbbf35b96557 487 */
Kojto 99:dbbf35b96557 488 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
Kojto 99:dbbf35b96557 489 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_ISR_GIF1 :\
Kojto 99:dbbf35b96557 490 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_ISR_GIF2 :\
Kojto 99:dbbf35b96557 491 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_ISR_GIF3 :\
Kojto 99:dbbf35b96557 492 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_ISR_GIF4 :\
Kojto 99:dbbf35b96557 493 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_ISR_GIF5 :\
Kojto 99:dbbf35b96557 494 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_ISR_GIF6 :\
Kojto 99:dbbf35b96557 495 DMA_ISR_GIF7)
Kojto 99:dbbf35b96557 496 /**
Kojto 99:dbbf35b96557 497 * @brief Get the DMA Channel pending flags.
Kojto 99:dbbf35b96557 498 * @param __HANDLE__: DMA handle
Kojto 99:dbbf35b96557 499 * @param __FLAG__: Get the specified flag.
Kojto 99:dbbf35b96557 500 * This parameter can be any combination of the following values:
Kojto 99:dbbf35b96557 501 * @arg DMA_FLAG_TCIFx: Transfer complete flag
Kojto 99:dbbf35b96557 502 * @arg DMA_FLAG_HTIFx: Half transfer complete flag
Kojto 99:dbbf35b96557 503 * @arg DMA_FLAG_TEIFx: Transfer error flag
Kojto 99:dbbf35b96557 504 * @arg DMA_ISR_GIFx: Global interrupt flag
Kojto 99:dbbf35b96557 505 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag.
Kojto 99:dbbf35b96557 506 * @retval The state of FLAG (SET or RESET).
Kojto 99:dbbf35b96557 507 */
Kojto 99:dbbf35b96557 508 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
Kojto 99:dbbf35b96557 509
Kojto 99:dbbf35b96557 510 /**
Kojto 99:dbbf35b96557 511 * @brief Clears the DMA Channel pending flags.
Kojto 99:dbbf35b96557 512 * @param __HANDLE__: DMA handle
Kojto 99:dbbf35b96557 513 * @param __FLAG__: specifies the flag to clear.
Kojto 99:dbbf35b96557 514 * This parameter can be any combination of the following values:
Kojto 99:dbbf35b96557 515 * @arg DMA_FLAG_TCIFx: Transfer complete flag
Kojto 99:dbbf35b96557 516 * @arg DMA_FLAG_HTIFx: Half transfer complete flag
Kojto 99:dbbf35b96557 517 * @arg DMA_FLAG_TEIFx: Transfer error flag
Kojto 99:dbbf35b96557 518 * @arg DMA_ISR_GIFx: Global interrupt flag
Kojto 99:dbbf35b96557 519 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag.
Kojto 99:dbbf35b96557 520 * @retval None
Kojto 99:dbbf35b96557 521 */
Kojto 99:dbbf35b96557 522 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
Kojto 99:dbbf35b96557 523
Kojto 99:dbbf35b96557 524 /**
Kojto 99:dbbf35b96557 525 * @brief Enables the specified DMA Channel interrupts.
Kojto 99:dbbf35b96557 526 * @param __HANDLE__: DMA handle
Kojto 99:dbbf35b96557 527 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 99:dbbf35b96557 528 * This parameter can be any combination of the following values:
Kojto 99:dbbf35b96557 529 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 99:dbbf35b96557 530 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 99:dbbf35b96557 531 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 99:dbbf35b96557 532 * @retval None
Kojto 99:dbbf35b96557 533 */
Kojto 99:dbbf35b96557 534 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__))
Kojto 99:dbbf35b96557 535
Kojto 99:dbbf35b96557 536 /**
Kojto 99:dbbf35b96557 537 * @brief Disables the specified DMA Channel interrupts.
Kojto 99:dbbf35b96557 538 * @param __HANDLE__: DMA handle
Kojto 99:dbbf35b96557 539 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 99:dbbf35b96557 540 * This parameter can be any combination of the following values:
Kojto 99:dbbf35b96557 541 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 99:dbbf35b96557 542 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 99:dbbf35b96557 543 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 99:dbbf35b96557 544 * @retval None
Kojto 99:dbbf35b96557 545 */
Kojto 99:dbbf35b96557 546 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__))
Kojto 99:dbbf35b96557 547
Kojto 99:dbbf35b96557 548 /**
Kojto 99:dbbf35b96557 549 * @brief Checks whether the specified DMA Channel interrupt has occurred or not.
Kojto 99:dbbf35b96557 550 * @param __HANDLE__: DMA handle
Kojto 99:dbbf35b96557 551 * @param __INTERRUPT__: specifies the DMA interrupt source to check.
Kojto 99:dbbf35b96557 552 * This parameter can be one of the following values:
Kojto 99:dbbf35b96557 553 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 99:dbbf35b96557 554 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 99:dbbf35b96557 555 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 99:dbbf35b96557 556 * @retval The state of DMA_IT (SET or RESET).
Kojto 99:dbbf35b96557 557 */
Kojto 99:dbbf35b96557 558 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CCR & (__INTERRUPT__)))
Kojto 99:dbbf35b96557 559
Kojto 99:dbbf35b96557 560 /**
Kojto 99:dbbf35b96557 561 * @}
Kojto 99:dbbf35b96557 562 */
Kojto 99:dbbf35b96557 563
Kojto 99:dbbf35b96557 564 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 565
Kojto 99:dbbf35b96557 566 /** @defgroup DMA_Exported_Functions DMA Exported Functions
Kojto 99:dbbf35b96557 567 * @{
Kojto 99:dbbf35b96557 568 */
Kojto 99:dbbf35b96557 569
Kojto 99:dbbf35b96557 570 /** @defgroup DMA_Exported_Functions_Group1 Initialization/de-initialization functions
Kojto 99:dbbf35b96557 571 * @{
Kojto 99:dbbf35b96557 572 */
Kojto 99:dbbf35b96557 573
Kojto 99:dbbf35b96557 574 /* Initialization and de-initialization functions *****************************/
Kojto 99:dbbf35b96557 575 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
Kojto 99:dbbf35b96557 576 HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
Kojto 99:dbbf35b96557 577
Kojto 99:dbbf35b96557 578 /**
Kojto 99:dbbf35b96557 579 * @}
Kojto 99:dbbf35b96557 580 */
Kojto 99:dbbf35b96557 581
Kojto 99:dbbf35b96557 582 /** @defgroup DMA_Exported_Functions_Group2 I/O operation functions
Kojto 99:dbbf35b96557 583 * @{
Kojto 99:dbbf35b96557 584 */
Kojto 99:dbbf35b96557 585
Kojto 99:dbbf35b96557 586 /* IO operation functions *****************************************************/
Kojto 99:dbbf35b96557 587 HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 99:dbbf35b96557 588 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 99:dbbf35b96557 589 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
Kojto 99:dbbf35b96557 590 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
Kojto 99:dbbf35b96557 591 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
Kojto 99:dbbf35b96557 592 /**
Kojto 99:dbbf35b96557 593 * @}
Kojto 99:dbbf35b96557 594 */
Kojto 99:dbbf35b96557 595
Kojto 99:dbbf35b96557 596 /** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions
Kojto 99:dbbf35b96557 597 * @{
Kojto 99:dbbf35b96557 598 */
Kojto 99:dbbf35b96557 599
Kojto 99:dbbf35b96557 600 /* Peripheral State and Error functions ***************************************/
Kojto 99:dbbf35b96557 601 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
Kojto 99:dbbf35b96557 602 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
Kojto 99:dbbf35b96557 603
Kojto 99:dbbf35b96557 604 /**
Kojto 99:dbbf35b96557 605 * @}
Kojto 99:dbbf35b96557 606 */
Kojto 99:dbbf35b96557 607
Kojto 99:dbbf35b96557 608 /**
Kojto 99:dbbf35b96557 609 * @}
Kojto 99:dbbf35b96557 610 */
Kojto 99:dbbf35b96557 611
Kojto 99:dbbf35b96557 612 /**
Kojto 99:dbbf35b96557 613 * @}
Kojto 99:dbbf35b96557 614 */
Kojto 99:dbbf35b96557 615
Kojto 99:dbbf35b96557 616 /**
Kojto 99:dbbf35b96557 617 * @}
Kojto 99:dbbf35b96557 618 */
Kojto 99:dbbf35b96557 619
Kojto 99:dbbf35b96557 620 #ifdef __cplusplus
Kojto 99:dbbf35b96557 621 }
Kojto 99:dbbf35b96557 622 #endif
Kojto 99:dbbf35b96557 623
Kojto 99:dbbf35b96557 624 #endif /* __STM32L0xx_HAL_DMA_H */
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Kojto 99:dbbf35b96557 626 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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