Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

TARGET_NUCLEO_F401RE/stm32f4xx_hal_nor.h@110:165afa46840b, 2015-11-25 (annotated)

Committer:
Kojto
Date:
Wed Nov 25 13:21:40 2015 +0000
Revision:
110:165afa46840b
Parent:
106:ba1f97679dad 
Release 110  of the mbed library



Changes:

- new platforms - STM32F410R, DISCO_F429ZI, DISCO_F469NI

- Nucleo L476 - gcc and uvision template

- k22,k64f targets - ADC channels A addition

- EFM32 - bugfixes in sleep, serial and spi

- Delta DFCM NNN40 - pinnames update

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_nor.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
Kojto 110:165afa46840b 5 * @version V1.4.1
Kojto 110:165afa46840b 6 * @date 09-October-2015
emilmont 77:869cf507173a 7 * @brief Header file of NOR HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_NOR_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_NOR_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 /* Includes ------------------------------------------------------------------*/
Kojto 110:165afa46840b 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
emilmont 77:869cf507173a 48 #include "stm32f4xx_ll_fsmc.h"
Kojto 110:165afa46840b 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
emilmont 77:869cf507173a 50
Kojto 110:165afa46840b 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 110:165afa46840b 52 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
emilmont 77:869cf507173a 53 #include "stm32f4xx_ll_fmc.h"
Kojto 110:165afa46840b 54 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
emilmont 77:869cf507173a 55
emilmont 77:869cf507173a 56 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 57 * @{
emilmont 77:869cf507173a 58 */
emilmont 77:869cf507173a 59
emilmont 77:869cf507173a 60 /** @addtogroup NOR
emilmont 77:869cf507173a 61 * @{
emilmont 77:869cf507173a 62 */
emilmont 77:869cf507173a 63
Kojto 99:dbbf35b96557 64 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
Kojto 99:dbbf35b96557 65 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 110:165afa46840b 66 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
emilmont 77:869cf507173a 67
bogdanm 85:024bf7f99721 68 /* Exported typedef ----------------------------------------------------------*/
Kojto 99:dbbf35b96557 69 /** @defgroup NOR_Exported_Types NOR Exported Types
Kojto 99:dbbf35b96557 70 * @{
Kojto 99:dbbf35b96557 71 */
Kojto 99:dbbf35b96557 72
emilmont 77:869cf507173a 73 /**
emilmont 77:869cf507173a 74 * @brief HAL SRAM State structures definition
emilmont 77:869cf507173a 75 */
emilmont 77:869cf507173a 76 typedef enum
emilmont 77:869cf507173a 77 {
emilmont 77:869cf507173a 78 HAL_NOR_STATE_RESET = 0x00, /*!< NOR not yet initialized or disabled */
emilmont 77:869cf507173a 79 HAL_NOR_STATE_READY = 0x01, /*!< NOR initialized and ready for use */
emilmont 77:869cf507173a 80 HAL_NOR_STATE_BUSY = 0x02, /*!< NOR internal processing is ongoing */
bogdanm 85:024bf7f99721 81 HAL_NOR_STATE_ERROR = 0x03, /*!< NOR error state */
bogdanm 85:024bf7f99721 82 HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */
bogdanm 85:024bf7f99721 83 }HAL_NOR_StateTypeDef;
emilmont 77:869cf507173a 84
emilmont 77:869cf507173a 85 /**
emilmont 77:869cf507173a 86 * @brief FMC NOR Status typedef
emilmont 77:869cf507173a 87 */
emilmont 77:869cf507173a 88 typedef enum
emilmont 77:869cf507173a 89 {
Kojto 99:dbbf35b96557 90 HAL_NOR_STATUS_SUCCESS = 0,
Kojto 99:dbbf35b96557 91 HAL_NOR_STATUS_ONGOING,
Kojto 99:dbbf35b96557 92 HAL_NOR_STATUS_ERROR,
Kojto 99:dbbf35b96557 93 HAL_NOR_STATUS_TIMEOUT
Kojto 99:dbbf35b96557 94 }HAL_NOR_StatusTypeDef;
emilmont 77:869cf507173a 95
emilmont 77:869cf507173a 96 /**
emilmont 77:869cf507173a 97 * @brief FMC NOR ID typedef
emilmont 77:869cf507173a 98 */
emilmont 77:869cf507173a 99 typedef struct
emilmont 77:869cf507173a 100 {
emilmont 77:869cf507173a 101 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
bogdanm 85:024bf7f99721 102
bogdanm 85:024bf7f99721 103 uint16_t Device_Code1;
bogdanm 85:024bf7f99721 104
bogdanm 85:024bf7f99721 105 uint16_t Device_Code2;
bogdanm 85:024bf7f99721 106
Kojto 99:dbbf35b96557 107 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
emilmont 77:869cf507173a 108 These codes can be accessed by performing read operations with specific
emilmont 77:869cf507173a 109 control signals and addresses set.They can also be accessed by issuing
bogdanm 85:024bf7f99721 110 an Auto Select command */
emilmont 77:869cf507173a 111 }NOR_IDTypeDef;
emilmont 77:869cf507173a 112
emilmont 77:869cf507173a 113 /**
emilmont 77:869cf507173a 114 * @brief FMC NOR CFI typedef
emilmont 77:869cf507173a 115 */
emilmont 77:869cf507173a 116 typedef struct
emilmont 77:869cf507173a 117 {
emilmont 77:869cf507173a 118 /*!< Defines the information stored in the memory's Common flash interface
emilmont 77:869cf507173a 119 which contains a description of various electrical and timing parameters,
emilmont 77:869cf507173a 120 density information and functions supported by the memory */
bogdanm 85:024bf7f99721 121
bogdanm 85:024bf7f99721 122 uint16_t CFI_1;
bogdanm 85:024bf7f99721 123
bogdanm 85:024bf7f99721 124 uint16_t CFI_2;
bogdanm 85:024bf7f99721 125
bogdanm 85:024bf7f99721 126 uint16_t CFI_3;
bogdanm 85:024bf7f99721 127
bogdanm 85:024bf7f99721 128 uint16_t CFI_4;
emilmont 77:869cf507173a 129 }NOR_CFITypeDef;
emilmont 77:869cf507173a 130
emilmont 77:869cf507173a 131 /**
bogdanm 85:024bf7f99721 132 * @brief NOR handle Structure definition
emilmont 77:869cf507173a 133 */
emilmont 77:869cf507173a 134 typedef struct
emilmont 77:869cf507173a 135 {
bogdanm 85:024bf7f99721 136 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
bogdanm 85:024bf7f99721 137
emilmont 77:869cf507173a 138 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
bogdanm 85:024bf7f99721 139
emilmont 77:869cf507173a 140 FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
emilmont 77:869cf507173a 141
bogdanm 85:024bf7f99721 142 HAL_LockTypeDef Lock; /*!< NOR locking object */
bogdanm 85:024bf7f99721 143
emilmont 77:869cf507173a 144 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
bogdanm 85:024bf7f99721 145
Kojto 99:dbbf35b96557 146 }NOR_HandleTypeDef;
Kojto 99:dbbf35b96557 147 /**
Kojto 99:dbbf35b96557 148 * @}
Kojto 99:dbbf35b96557 149 */
Kojto 99:dbbf35b96557 150
Kojto 99:dbbf35b96557 151 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 152 /* Exported macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 153 /** @defgroup NOR_Exported_Macros NOR Exported Macros
Kojto 99:dbbf35b96557 154 * @{
Kojto 99:dbbf35b96557 155 */
Kojto 99:dbbf35b96557 156 /** @brief Reset NOR handle state
Kojto 99:dbbf35b96557 157 * @param __HANDLE__: specifies the NOR handle.
Kojto 99:dbbf35b96557 158 * @retval None
Kojto 99:dbbf35b96557 159 */
Kojto 99:dbbf35b96557 160 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
Kojto 99:dbbf35b96557 161 /**
Kojto 99:dbbf35b96557 162 * @}
Kojto 99:dbbf35b96557 163 */
Kojto 99:dbbf35b96557 164
Kojto 99:dbbf35b96557 165 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 166 /** @addtogroup NOR_Exported_Functions
Kojto 99:dbbf35b96557 167 * @{
Kojto 99:dbbf35b96557 168 */
emilmont 77:869cf507173a 169
Kojto 99:dbbf35b96557 170 /** @addtogroup NOR_Exported_Functions_Group1
Kojto 99:dbbf35b96557 171 * @{
Kojto 99:dbbf35b96557 172 */
Kojto 99:dbbf35b96557 173 /* Initialization/de-initialization functions ********************************/
Kojto 99:dbbf35b96557 174 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
Kojto 99:dbbf35b96557 175 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
Kojto 99:dbbf35b96557 176 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
Kojto 99:dbbf35b96557 177 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
Kojto 99:dbbf35b96557 178 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
Kojto 99:dbbf35b96557 179 /**
Kojto 99:dbbf35b96557 180 * @}
Kojto 99:dbbf35b96557 181 */
Kojto 99:dbbf35b96557 182
Kojto 99:dbbf35b96557 183 /** @addtogroup NOR_Exported_Functions_Group2
Kojto 99:dbbf35b96557 184 * @{
Kojto 99:dbbf35b96557 185 */
Kojto 99:dbbf35b96557 186 /* I/O operation functions ***************************************************/
Kojto 99:dbbf35b96557 187 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
Kojto 99:dbbf35b96557 188 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
Kojto 99:dbbf35b96557 189 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
Kojto 99:dbbf35b96557 190 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
Kojto 99:dbbf35b96557 191
Kojto 99:dbbf35b96557 192 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
Kojto 99:dbbf35b96557 193 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
Kojto 99:dbbf35b96557 194
Kojto 99:dbbf35b96557 195 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
Kojto 99:dbbf35b96557 196 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
Kojto 99:dbbf35b96557 197 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
Kojto 99:dbbf35b96557 198 /**
Kojto 99:dbbf35b96557 199 * @}
Kojto 99:dbbf35b96557 200 */
Kojto 99:dbbf35b96557 201
Kojto 99:dbbf35b96557 202 /** @addtogroup NOR_Exported_Functions_Group3
Kojto 99:dbbf35b96557 203 * @{
Kojto 99:dbbf35b96557 204 */
Kojto 99:dbbf35b96557 205 /* NOR Control functions *****************************************************/
Kojto 99:dbbf35b96557 206 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
Kojto 99:dbbf35b96557 207 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
Kojto 99:dbbf35b96557 208 /**
Kojto 99:dbbf35b96557 209 * @}
Kojto 99:dbbf35b96557 210 */
Kojto 99:dbbf35b96557 211
Kojto 99:dbbf35b96557 212 /** @addtogroup NOR_Exported_Functions_Group4
Kojto 99:dbbf35b96557 213 * @{
Kojto 99:dbbf35b96557 214 */
Kojto 99:dbbf35b96557 215 /* NOR State functions ********************************************************/
Kojto 99:dbbf35b96557 216 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
Kojto 99:dbbf35b96557 217 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
Kojto 99:dbbf35b96557 218 /**
Kojto 99:dbbf35b96557 219 * @}
Kojto 99:dbbf35b96557 220 */
Kojto 99:dbbf35b96557 221
Kojto 99:dbbf35b96557 222 /**
Kojto 99:dbbf35b96557 223 * @}
Kojto 99:dbbf35b96557 224 */
Kojto 99:dbbf35b96557 225
Kojto 99:dbbf35b96557 226 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 227 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 228 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 229 /** @defgroup NOR_Private_Constants NOR Private Constants
emilmont 77:869cf507173a 230 * @{
emilmont 77:869cf507173a 231 */
emilmont 77:869cf507173a 232 /* NOR device IDs addresses */
emilmont 77:869cf507173a 233 #define MC_ADDRESS ((uint16_t)0x0000)
emilmont 77:869cf507173a 234 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
emilmont 77:869cf507173a 235 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
emilmont 77:869cf507173a 236 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
emilmont 77:869cf507173a 237
emilmont 77:869cf507173a 238 /* NOR CFI IDs addresses */
emilmont 77:869cf507173a 239 #define CFI1_ADDRESS ((uint16_t)0x61)
emilmont 77:869cf507173a 240 #define CFI2_ADDRESS ((uint16_t)0x62)
emilmont 77:869cf507173a 241 #define CFI3_ADDRESS ((uint16_t)0x63)
emilmont 77:869cf507173a 242 #define CFI4_ADDRESS ((uint16_t)0x64)
emilmont 77:869cf507173a 243
emilmont 77:869cf507173a 244 /* NOR operation wait timeout */
emilmont 77:869cf507173a 245 #define NOR_TMEOUT ((uint16_t)0xFFFF)
emilmont 77:869cf507173a 246
Kojto 90:cb3d968589d8 247 /* NOR memory data width */
Kojto 90:cb3d968589d8 248 #define NOR_MEMORY_8B ((uint8_t)0x0)
Kojto 90:cb3d968589d8 249 #define NOR_MEMORY_16B ((uint8_t)0x1)
emilmont 77:869cf507173a 250
emilmont 77:869cf507173a 251 /* NOR memory device read/write start address */
Kojto 90:cb3d968589d8 252 #define NOR_MEMORY_ADRESS1 ((uint32_t)0x60000000)
Kojto 90:cb3d968589d8 253 #define NOR_MEMORY_ADRESS2 ((uint32_t)0x64000000)
Kojto 90:cb3d968589d8 254 #define NOR_MEMORY_ADRESS3 ((uint32_t)0x68000000)
Kojto 90:cb3d968589d8 255 #define NOR_MEMORY_ADRESS4 ((uint32_t)0x6C000000)
emilmont 77:869cf507173a 256 /**
emilmont 77:869cf507173a 257 * @}
emilmont 77:869cf507173a 258 */
emilmont 77:869cf507173a 259
Kojto 99:dbbf35b96557 260 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 261 /** @defgroup NOR_Private_Macros NOR Private Macros
Kojto 99:dbbf35b96557 262 * @{
bogdanm 85:024bf7f99721 263 */
emilmont 77:869cf507173a 264 /**
emilmont 77:869cf507173a 265 * @brief NOR memory address shifting.
Kojto 99:dbbf35b96557 266 * @param __NOR_ADDRESS__: NOR base address
Kojto 99:dbbf35b96557 267 * @param NOR_MEMORY_WIDTH: NOR memory width
Kojto 99:dbbf35b96557 268 * @param ADDRESS: NOR memory address
emilmont 77:869cf507173a 269 * @retval NOR shifted address value
emilmont 77:869cf507173a 270 */
Kojto 99:dbbf35b96557 271 #define NOR_ADDR_SHIFT(__NOR_ADDRESS__, NOR_MEMORY_WIDTH, ADDRESS) (uint32_t)(((NOR_MEMORY_WIDTH) == NOR_MEMORY_8B)? ((uint32_t)((__NOR_ADDRESS__) + (2 * (ADDRESS)))):\
Kojto 99:dbbf35b96557 272 ((uint32_t)((__NOR_ADDRESS__) + (ADDRESS))))
emilmont 77:869cf507173a 273
emilmont 77:869cf507173a 274 /**
emilmont 77:869cf507173a 275 * @brief NOR memory write data to specified address.
Kojto 99:dbbf35b96557 276 * @param ADDRESS: NOR memory address
Kojto 99:dbbf35b96557 277 * @param DATA: Data to write
emilmont 77:869cf507173a 278 * @retval None
emilmont 77:869cf507173a 279 */
Kojto 99:dbbf35b96557 280 #define NOR_WRITE(ADDRESS, DATA) (*(__IO uint16_t *)((uint32_t)(ADDRESS)) = (DATA))
emilmont 77:869cf507173a 281
Kojto 99:dbbf35b96557 282 /**
Kojto 99:dbbf35b96557 283 * @}
Kojto 99:dbbf35b96557 284 */
Kojto 99:dbbf35b96557 285 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
Kojto 99:dbbf35b96557 286 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
Kojto 110:165afa46840b 287 STM32F446xx || STM32F469xx || STM32F479xx */
emilmont 77:869cf507173a 288 /**
emilmont 77:869cf507173a 289 * @}
emilmont 77:869cf507173a 290 */
emilmont 77:869cf507173a 291
emilmont 77:869cf507173a 292 /**
emilmont 77:869cf507173a 293 * @}
emilmont 77:869cf507173a 294 */
emilmont 77:869cf507173a 295
emilmont 77:869cf507173a 296 #ifdef __cplusplus
emilmont 77:869cf507173a 297 }
emilmont 77:869cf507173a 298 #endif
emilmont 77:869cf507173a 299
emilmont 77:869cf507173a 300 #endif /* __STM32F4xx_HAL_NOR_H */
emilmont 77:869cf507173a 301
emilmont 77:869cf507173a 302 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/