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stm32f4xx_flash.h
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_flash.h 00004 * @author MCD Application Team 00005 * @version V1.7.1 00006 * @date 20-May-2016 00007 * @brief This file contains all the functions prototypes for the FLASH 00008 * firmware library. 00009 ****************************************************************************** 00010 * @attention 00011 * 00012 * <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2> 00013 * 00014 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00015 * You may not use this file except in compliance with the License. 00016 * You may obtain a copy of the License at: 00017 * 00018 * http://www.st.com/software_license_agreement_liberty_v2 00019 * 00020 * Unless required by applicable law or agreed to in writing, software 00021 * distributed under the License is distributed on an "AS IS" BASIS, 00022 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00023 * See the License for the specific language governing permissions and 00024 * limitations under the License. 00025 * 00026 ****************************************************************************** 00027 */ 00028 00029 /* Define to prevent recursive inclusion -------------------------------------*/ 00030 #ifndef __STM32F4xx_FLASH_H 00031 #define __STM32F4xx_FLASH_H 00032 00033 #ifdef __cplusplus 00034 extern "C" { 00035 #endif 00036 00037 /* Includes ------------------------------------------------------------------*/ 00038 #include "stm32f4xx.h" 00039 00040 /** @addtogroup STM32F4xx_StdPeriph_Driver 00041 * @{ 00042 */ 00043 00044 /** @addtogroup FLASH 00045 * @{ 00046 */ 00047 00048 /* Exported types ------------------------------------------------------------*/ 00049 /** 00050 * @brief FLASH Status 00051 */ 00052 typedef enum 00053 { 00054 FLASH_BUSY2 = 1, 00055 FLASH_ERROR_RD2, 00056 FLASH_ERROR_PGS2, 00057 FLASH_ERROR_PGP2, 00058 FLASH_ERROR_PGA2, 00059 FLASH_ERROR_WRP2, 00060 FLASH_ERROR_PROGRAM2, 00061 FLASH_ERROR_OPERATION2, 00062 FLASH_COMPLETE2 00063 }FLASH_Status; 00064 00065 /* Exported constants --------------------------------------------------------*/ 00066 00067 /** @defgroup FLASH_Exported_Constants 00068 * @{ 00069 */ 00070 00071 /** @defgroup Flash_Latency 00072 * @{ 00073 */ 00074 #define FLASH_Latency_0 ((uint8_t)0x0000) /*!< FLASH Zero Latency cycle */ 00075 #define FLASH_Latency_1 ((uint8_t)0x0001) /*!< FLASH One Latency cycle */ 00076 #define FLASH_Latency_2 ((uint8_t)0x0002) /*!< FLASH Two Latency cycles */ 00077 #define FLASH_Latency_3 ((uint8_t)0x0003) /*!< FLASH Three Latency cycles */ 00078 #define FLASH_Latency_4 ((uint8_t)0x0004) /*!< FLASH Four Latency cycles */ 00079 #define FLASH_Latency_5 ((uint8_t)0x0005) /*!< FLASH Five Latency cycles */ 00080 #define FLASH_Latency_6 ((uint8_t)0x0006) /*!< FLASH Six Latency cycles */ 00081 #define FLASH_Latency_7 ((uint8_t)0x0007) /*!< FLASH Seven Latency cycles */ 00082 #define FLASH_Latency_8 ((uint8_t)0x0008) /*!< FLASH Eight Latency cycles */ 00083 #define FLASH_Latency_9 ((uint8_t)0x0009) /*!< FLASH Nine Latency cycles */ 00084 #define FLASH_Latency_10 ((uint8_t)0x000A) /*!< FLASH Ten Latency cycles */ 00085 #define FLASH_Latency_11 ((uint8_t)0x000B) /*!< FLASH Eleven Latency cycles */ 00086 #define FLASH_Latency_12 ((uint8_t)0x000C) /*!< FLASH Twelve Latency cycles */ 00087 #define FLASH_Latency_13 ((uint8_t)0x000D) /*!< FLASH Thirteen Latency cycles */ 00088 #define FLASH_Latency_14 ((uint8_t)0x000E) /*!< FLASH Fourteen Latency cycles */ 00089 #define FLASH_Latency_15 ((uint8_t)0x000F) /*!< FLASH Fifteen Latency cycles */ 00090 00091 /** 00092 * @} 00093 */ 00094 00095 /** @defgroup FLASH_Voltage_Range 00096 * @{ 00097 */ 00098 #define VoltageRange_1 ((uint8_t)0x00) /*!< Device operating range: 1.8V to 2.1V */ 00099 #define VoltageRange_2 ((uint8_t)0x01) /*!<Device operating range: 2.1V to 2.7V */ 00100 #define VoltageRange_3 ((uint8_t)0x02) /*!<Device operating range: 2.7V to 3.6V */ 00101 #define VoltageRange_4 ((uint8_t)0x03) /*!<Device operating range: 2.7V to 3.6V + External Vpp */ 00102 00103 /* 00104 #define IS_VOLTAGERANGE(RANGE)(((RANGE) == VoltageRange_1) || \ 00105 ((RANGE) == VoltageRange_2) || \ 00106 ((RANGE) == VoltageRange_3) || \ 00107 ((RANGE) == VoltageRange_4)) 00108 */ 00109 00110 /** 00111 * @} 00112 */ 00113 00114 /** @defgroup FLASH_Sectors 00115 * @{ 00116 */ 00117 #define FLASH_Sector_0 ((uint16_t)0x0000) /*!< Sector Number 0 */ 00118 #define FLASH_Sector_1 ((uint16_t)0x0008) /*!< Sector Number 1 */ 00119 #define FLASH_Sector_2 ((uint16_t)0x0010) /*!< Sector Number 2 */ 00120 #define FLASH_Sector_3 ((uint16_t)0x0018) /*!< Sector Number 3 */ 00121 #define FLASH_Sector_4 ((uint16_t)0x0020) /*!< Sector Number 4 */ 00122 #define FLASH_Sector_5 ((uint16_t)0x0028) /*!< Sector Number 5 */ 00123 #define FLASH_Sector_6 ((uint16_t)0x0030) /*!< Sector Number 6 */ 00124 #define FLASH_Sector_7 ((uint16_t)0x0038) /*!< Sector Number 7 */ 00125 #define FLASH_Sector_8 ((uint16_t)0x0040) /*!< Sector Number 8 */ 00126 #define FLASH_Sector_9 ((uint16_t)0x0048) /*!< Sector Number 9 */ 00127 #define FLASH_Sector_10 ((uint16_t)0x0050) /*!< Sector Number 10 */ 00128 #define FLASH_Sector_11 ((uint16_t)0x0058) /*!< Sector Number 11 */ 00129 #define FLASH_Sector_12 ((uint16_t)0x0080) /*!< Sector Number 12 */ 00130 #define FLASH_Sector_13 ((uint16_t)0x0088) /*!< Sector Number 13 */ 00131 #define FLASH_Sector_14 ((uint16_t)0x0090) /*!< Sector Number 14 */ 00132 #define FLASH_Sector_15 ((uint16_t)0x0098) /*!< Sector Number 15 */ 00133 #define FLASH_Sector_16 ((uint16_t)0x00A0) /*!< Sector Number 16 */ 00134 #define FLASH_Sector_17 ((uint16_t)0x00A8) /*!< Sector Number 17 */ 00135 #define FLASH_Sector_18 ((uint16_t)0x00B0) /*!< Sector Number 18 */ 00136 #define FLASH_Sector_19 ((uint16_t)0x00B8) /*!< Sector Number 19 */ 00137 #define FLASH_Sector_20 ((uint16_t)0x00C0) /*!< Sector Number 20 */ 00138 #define FLASH_Sector_21 ((uint16_t)0x00C8) /*!< Sector Number 21 */ 00139 #define FLASH_Sector_22 ((uint16_t)0x00D0) /*!< Sector Number 22 */ 00140 #define FLASH_Sector_23 ((uint16_t)0x00D8) /*!< Sector Number 23 */ 00141 00142 #if defined (STM32F427_437xx) || defined (STM32F429_439xx) || defined (STM32F469_479xx) 00143 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x081FFFFF)) ||\ 00144 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) 00145 #endif /* STM32F427_437xx || STM32F429_439xx || STM32F469_479xx */ 00146 00147 #if defined (STM32F40_41xxx) || defined(STM32F412xG) 00148 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x080FFFFF)) ||\ 00149 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) 00150 #endif /* STM32F40_41xxx || STM32F412xG */ 00151 00152 #if defined (STM32F401xx) 00153 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0803FFFF)) ||\ 00154 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) 00155 #endif /* STM32F401xx */ 00156 00157 #if defined (STM32F411xE) || defined (STM32F446xx) 00158 //#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0807FFFF)) ||\ 00159 // (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) 00160 #endif /* STM32F411xE || STM32F446xx */ 00161 00162 #if defined (STM32F410xx) 00163 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0801FFFF)) ||\ 00164 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) 00165 #endif /* STM32F410xx */ 00166 00167 /** 00168 * @} 00169 */ 00170 00171 /** @defgroup Option_Bytes_Write_Protection 00172 * @{ 00173 */ 00174 #define OB_WRP_Sector_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ 00175 #define OB_WRP_Sector_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ 00176 #define OB_WRP_Sector_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ 00177 #define OB_WRP_Sector_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ 00178 #define OB_WRP_Sector_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ 00179 #define OB_WRP_Sector_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ 00180 #define OB_WRP_Sector_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */ 00181 #define OB_WRP_Sector_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */ 00182 #define OB_WRP_Sector_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */ 00183 #define OB_WRP_Sector_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */ 00184 #define OB_WRP_Sector_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */ 00185 #define OB_WRP_Sector_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */ 00186 #define OB_WRP_Sector_12 ((uint32_t)0x00000001) /*!< Write protection of Sector12 */ 00187 #define OB_WRP_Sector_13 ((uint32_t)0x00000002) /*!< Write protection of Sector13 */ 00188 #define OB_WRP_Sector_14 ((uint32_t)0x00000004) /*!< Write protection of Sector14 */ 00189 #define OB_WRP_Sector_15 ((uint32_t)0x00000008) /*!< Write protection of Sector15 */ 00190 #define OB_WRP_Sector_16 ((uint32_t)0x00000010) /*!< Write protection of Sector16 */ 00191 #define OB_WRP_Sector_17 ((uint32_t)0x00000020) /*!< Write protection of Sector17 */ 00192 #define OB_WRP_Sector_18 ((uint32_t)0x00000040) /*!< Write protection of Sector18 */ 00193 #define OB_WRP_Sector_19 ((uint32_t)0x00000080) /*!< Write protection of Sector19 */ 00194 #define OB_WRP_Sector_20 ((uint32_t)0x00000100) /*!< Write protection of Sector20 */ 00195 #define OB_WRP_Sector_21 ((uint32_t)0x00000200) /*!< Write protection of Sector21 */ 00196 #define OB_WRP_Sector_22 ((uint32_t)0x00000400) /*!< Write protection of Sector22 */ 00197 #define OB_WRP_Sector_23 ((uint32_t)0x00000800) /*!< Write protection of Sector23 */ 00198 #define OB_WRP_Sector_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */ 00199 00200 #define IS_OB_WRP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) 00201 /** 00202 * @} 00203 */ 00204 00205 /** @defgroup Selection_Protection_Mode 00206 * @{ 00207 */ 00208 #define OB_PcROP_Disable ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */ 00209 #define OB_PcROP_Enable ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */ 00210 00211 /** 00212 * @} 00213 */ 00214 00215 /** @defgroup Option_Bytes_PC_ReadWrite_Protection 00216 * @{ 00217 */ 00218 #define OB_PCROP_Sector_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */ 00219 #define OB_PCROP_Sector_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */ 00220 #define OB_PCROP_Sector_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */ 00221 #define OB_PCROP_Sector_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */ 00222 #define OB_PCROP_Sector_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */ 00223 #define OB_PCROP_Sector_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */ 00224 #define OB_PCROP_Sector_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */ 00225 #define OB_PCROP_Sector_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */ 00226 #define OB_PCROP_Sector_8 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector8 */ 00227 #define OB_PCROP_Sector_9 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector9 */ 00228 #define OB_PCROP_Sector_10 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector10 */ 00229 #define OB_PCROP_Sector_11 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector11 */ 00230 #define OB_PCROP_Sector_12 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector12 */ 00231 #define OB_PCROP_Sector_13 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector13 */ 00232 #define OB_PCROP_Sector_14 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector14 */ 00233 #define OB_PCROP_Sector_15 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector15 */ 00234 #define OB_PCROP_Sector_16 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector16 */ 00235 #define OB_PCROP_Sector_17 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector17 */ 00236 #define OB_PCROP_Sector_18 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector18 */ 00237 #define OB_PCROP_Sector_19 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector19 */ 00238 #define OB_PCROP_Sector_20 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector20 */ 00239 #define OB_PCROP_Sector_21 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector21 */ 00240 #define OB_PCROP_Sector_22 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector22 */ 00241 #define OB_PCROP_Sector_23 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector23 */ 00242 #define OB_PCROP_Sector_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */ 00243 00244 /** 00245 * @} 00246 */ 00247 00248 /** @defgroup FLASH_Option_Bytes_Read_Protection 00249 * @{ 00250 */ 00251 #define OB_RDP_Level_0 ((uint8_t)0xAA) 00252 #define OB_RDP_Level_1 ((uint8_t)0x55) 00253 /*#define OB_RDP_Level_2 ((uint8_t)0xCC)*/ /*!< Warning: When enabling read protection level 2 00254 it's no more possible to go back to level 1 or 0 */ 00255 #define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\ 00256 ((LEVEL) == OB_RDP_Level_1))/*||\ 00257 ((LEVEL) == OB_RDP_Level_2))*/ 00258 /** 00259 * @} 00260 */ 00261 00262 /** @defgroup FLASH_Option_Bytes_IWatchdog 00263 * @{ 00264 */ 00265 00266 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) 00267 /** 00268 * @} 00269 */ 00270 00271 /** @defgroup FLASH_Option_Bytes_nRST_STOP 00272 * @{ 00273 */ 00274 #define OB_STOP_NoRST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */ 00275 00276 /** 00277 * @} 00278 */ 00279 00280 00281 /** @defgroup FLASH_Option_Bytes_nRST_STDBY 00282 * @{ 00283 */ 00284 #define OB_STDBY_NoRST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */ 00285 //#define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */ 00286 //#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST)) 00287 /** 00288 * @} 00289 */ 00290 00291 /** @defgroup FLASH_BOR_Reset_Level 00292 * @{ 00293 */ 00294 00295 #define IS_OB_BOR(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ 00296 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF)) 00297 /** 00298 * @} 00299 */ 00300 00301 /** @defgroup FLASH_Dual_Boot 00302 * @{ 00303 */ 00304 #define OB_Dual_BootEnabled ((uint8_t)0x10) /*!< Dual Bank Boot Enable */ 00305 #define OB_Dual_BootDisabled ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */ 00306 #define IS_OB_BOOT(BOOT) (((BOOT) == OB_Dual_BootEnabled) || ((BOOT) == OB_Dual_BootDisabled)) 00307 /** 00308 * @} 00309 */ 00310 00311 /** @defgroup FLASH_Interrupts 00312 * @{ 00313 */ 00314 00315 #define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFCFFFFFF) == 0x00000000) && ((IT) != 0x00000000)) 00316 /** 00317 * @} 00318 */ 00319 00320 /** @defgroup FLASH_Flags 00321 * @{ 00322 */ 00323 00324 #define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFE0C) == 0x00000000) && ((FLAG) != 0x00000000)) 00325 #define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_EOP) || ((FLAG) == FLASH_FLAG_OPERR) || \ 00326 ((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_PGAERR) || \ 00327 ((FLAG) == FLASH_FLAG_PGPERR) || ((FLAG) == FLASH_FLAG_PGSERR) || \ 00328 ((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_RDERR)) 00329 00330 /** 00331 * @brief ACR register byte 0 (Bits[7:0]) base address 00332 */ 00333 //#define ACR_BYTE0_ADDRESS ((uint32_t)0x40023C00) 00334 /** 00335 * @brief OPTCR register byte 0 (Bits[7:0]) base address 00336 */ 00337 //#define OPTCR_BYTE0_ADDRESS ((uint32_t)0x40023C14) 00338 /** 00339 * @brief OPTCR register byte 1 (Bits[15:8]) base address 00340 */ 00341 //#define OPTCR_BYTE1_ADDRESS ((uint32_t)0x40023C15) 00342 /** 00343 * @brief OPTCR register byte 2 (Bits[23:16]) base address 00344 */ 00345 //#define OPTCR_BYTE2_ADDRESS ((uint32_t)0x40023C16) 00346 /** 00347 * @brief OPTCR register byte 3 (Bits[31:24]) base address 00348 */ 00349 //#define OPTCR_BYTE3_ADDRESS ((uint32_t)0x40023C17) 00350 00351 /** 00352 * @brief OPTCR1 register byte 0 (Bits[7:0]) base address 00353 */ 00354 #define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A) 00355 00356 /** 00357 * @} 00358 */ 00359 00360 /* Exported macro ------------------------------------------------------------*/ 00361 /* Exported functions --------------------------------------------------------*/ 00362 00363 /* FLASH Interface configuration functions ************************************/ 00364 void FLASH_SetLatency(uint32_t FLASH_Latency); 00365 void FLASH_PrefetchBufferCmd(FunctionalState NewState); 00366 void FLASH_InstructionCacheCmd(FunctionalState NewState); 00367 void FLASH_DataCacheCmd(FunctionalState NewState); 00368 void FLASH_InstructionCacheReset(void); 00369 void FLASH_DataCacheReset(void); 00370 00371 /* FLASH Memory Programming functions *****************************************/ 00372 void FLASH_Unlock(void); 00373 void FLASH_Lock(void); 00374 FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange); 00375 FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange); 00376 FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange); 00377 FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange); 00378 FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data); 00379 FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data); 00380 FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data); 00381 FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data); 00382 00383 /* Option Bytes Programming functions *****************************************/ 00384 void FLASH_OB_Unlock(void); 00385 void FLASH_OB_Lock(void); 00386 void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState); 00387 void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState); 00388 void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PcROP); 00389 void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState); 00390 void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState); 00391 void FLASH_OB_RDPConfig(uint8_t OB_RDP); 00392 void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY); 00393 void FLASH_OB_BORConfig(uint8_t OB_BOR); 00394 void FLASH_OB_BootConfig(uint8_t OB_BOOT); 00395 FLASH_Status FLASH_OB_Launch(void); 00396 uint8_t FLASH_OB_GetUser(void); 00397 uint16_t FLASH_OB_GetWRP(void); 00398 uint16_t FLASH_OB_GetWRP1(void); 00399 uint16_t FLASH_OB_GetPCROP(void); 00400 uint16_t FLASH_OB_GetPCROP1(void); 00401 FlagStatus FLASH_OB_GetRDP(void); 00402 uint8_t FLASH_OB_GetBOR(void); 00403 00404 /* Interrupts and flags management functions **********************************/ 00405 void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState); 00406 FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG); 00407 void FLASH_ClearFlag(uint32_t FLASH_FLAG); 00408 FLASH_Status FLASH_GetStatus(void); 00409 FLASH_Status FLASH_WaitForLastOperation2(void); 00410 00411 #ifdef __cplusplus 00412 } 00413 #endif 00414 00415 #endif /* __STM32F4xx_FLASH_H */ 00416 00417 /** 00418 * @} 00419 */ 00420 00421 /** 00422 * @} 00423 */ 00424 00425 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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