Elmaddin Guliyev
/
ADS1299
configuring and reading adc1299 using spi interface
ads1299.h@0:99e31762ab2f, 2019-05-29 (annotated)
- Committer:
- eguliyev
- Date:
- Wed May 29 03:43:46 2019 +0000
- Revision:
- 0:99e31762ab2f
how to read texas instrument adc1299 using nucleo f4
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
eguliyev | 0:99e31762ab2f | 1 | #ifndef _ADS1299_h |
eguliyev | 0:99e31762ab2f | 2 | #define _ADS1299_h |
eguliyev | 0:99e31762ab2f | 3 | |
eguliyev | 0:99e31762ab2f | 4 | #define ADS129X_CMD_WAKEUP 0x02 // Wake-up from standby mode |
eguliyev | 0:99e31762ab2f | 5 | #define ADS129X_CMD_STANDBY 0x04 // Enter Standby mode |
eguliyev | 0:99e31762ab2f | 6 | #define ADS129X_CMD_RESET 0x06 // Reset the device |
eguliyev | 0:99e31762ab2f | 7 | #define ADS129X_CMD_START 0x08 // Start and restart (synchronize) conversions |
eguliyev | 0:99e31762ab2f | 8 | #define ADS129X_CMD_STOP 0x0A // Stop conversion |
eguliyev | 0:99e31762ab2f | 9 | #define ADS129X_CMD_RDATAC 0x10 // Enable Read Data Continuous mode (default mode at power-up) |
eguliyev | 0:99e31762ab2f | 10 | #define ADS129X_CMD_SDATAC 0x11 // Stop Read Data Continuous mode |
eguliyev | 0:99e31762ab2f | 11 | #define ADS129X_CMD_RDATA 0x12 // Read data by command; supports multiple read back |
eguliyev | 0:99e31762ab2f | 12 | #define ADS129X_CMD_RREG 0x20 // (also = 00100000) is the first opcode that the address must be added to for RREG communication |
eguliyev | 0:99e31762ab2f | 13 | #define ADS129X_CMD_WREG 0x40 // 01000000 in binary (Datasheet, pg. 35) |
eguliyev | 0:99e31762ab2f | 14 | |
eguliyev | 0:99e31762ab2f | 15 | // Register Addresses |
eguliyev | 0:99e31762ab2f | 16 | #define ADS129X_REG_ID 0x00 // ID Control Register |
eguliyev | 0:99e31762ab2f | 17 | #define ADS129X_REG_CONFIG1 0x01 // Configuration Register 1 |
eguliyev | 0:99e31762ab2f | 18 | #define ADS129X_REG_CONFIG2 0x02 // Configuration Register 2 |
eguliyev | 0:99e31762ab2f | 19 | #define ADS129X_REG_CONFIG3 0x03 // Configuration Register 3 |
eguliyev | 0:99e31762ab2f | 20 | #define ADS129X_REG_LOFF 0x04 // Lead-Off Control Register |
eguliyev | 0:99e31762ab2f | 21 | #define ADS129X_REG_CH1SET 0x05 // Individual Channel Settings 1-8 |
eguliyev | 0:99e31762ab2f | 22 | #define ADS129X_REG_CH2SET 0x06 // --- |
eguliyev | 0:99e31762ab2f | 23 | #define ADS129X_REG_CH3SET 0x07 // --- |
eguliyev | 0:99e31762ab2f | 24 | #define ADS129X_REG_CH4SET 0x08 // --- |
eguliyev | 0:99e31762ab2f | 25 | #define ADS129X_REG_CH5SET 0x09 // --- |
eguliyev | 0:99e31762ab2f | 26 | #define ADS129X_REG_CH6SET 0x0A // --- |
eguliyev | 0:99e31762ab2f | 27 | #define ADS129X_REG_CH7SET 0x0B // --- |
eguliyev | 0:99e31762ab2f | 28 | #define ADS129X_REG_CH8SET 0x0C // --- |
eguliyev | 0:99e31762ab2f | 29 | #define ADS129X_REG_RLD_SENSP 0x0D // Right Leg Drive, positive side |
eguliyev | 0:99e31762ab2f | 30 | #define ADS129X_REG_RLD_SENSN 0x0E // Right Leg Drive, negative side |
eguliyev | 0:99e31762ab2f | 31 | #define ADS129X_REG_LOFF_SENSP 0x0F // Lead-Off Detection, positive side |
eguliyev | 0:99e31762ab2f | 32 | #define ADS129X_REG_LOFF_SENSN 0x10 // Lead-Off Detection, negative side |
eguliyev | 0:99e31762ab2f | 33 | #define ADS129X_REG_LOFF_FLIP 0x11 // Lead-Off Detection, current direction |
eguliyev | 0:99e31762ab2f | 34 | #define ADS129X_REG_LOFF_STATP 0x12 // Electrode Status, positive (read-only) |
eguliyev | 0:99e31762ab2f | 35 | #define ADS129X_REG_LOFF_STATN 0x13 // Electrode Status, negative (read-only) |
eguliyev | 0:99e31762ab2f | 36 | #define ADS129X_REG_GPIO 0x14 // General-Purpose I/O Register |
eguliyev | 0:99e31762ab2f | 37 | #define ADS129X_REG_PACE 0x15 // PACE Detect Register |
eguliyev | 0:99e31762ab2f | 38 | #define ADS129X_REG_RESP 0x16 // Respiration Control Register |
eguliyev | 0:99e31762ab2f | 39 | #define ADS129X_REG_CONFIG4 0x17 // Configuration Register 4 |
eguliyev | 0:99e31762ab2f | 40 | #define ADS129X_REG_WCT1 0x18 // Wilson Central Terminal and Augmented Lead Control Register |
eguliyev | 0:99e31762ab2f | 41 | #define ADS129X_REG_WCT2 0x19 // Wilson Central Terminal Control Register |
eguliyev | 0:99e31762ab2f | 42 | |
eguliyev | 0:99e31762ab2f | 43 | // IDs |
eguliyev | 0:99e31762ab2f | 44 | #define ADS129X_ID_ADS1294 0x90 |
eguliyev | 0:99e31762ab2f | 45 | #define ADS129X_ID_ADS1296 0x91 |
eguliyev | 0:99e31762ab2f | 46 | #define ADS129X_ID_ADS1298 0x92 |
eguliyev | 0:99e31762ab2f | 47 | #define ADS129X_ID_ADS1294R 0xD0 |
eguliyev | 0:99e31762ab2f | 48 | #define ADS129X_ID_ADS1296R 0xD1 |
eguliyev | 0:99e31762ab2f | 49 | #define ADS129X_ID_ADS1298R 0xD2 |
eguliyev | 0:99e31762ab2f | 50 | |
eguliyev | 0:99e31762ab2f | 51 | // Configuration Register 1 |
eguliyev | 0:99e31762ab2f | 52 | #define ADS129X_BIT_HR 0x7 |
eguliyev | 0:99e31762ab2f | 53 | #define ADS129X_BIT_DAISY_EN 0x6 |
eguliyev | 0:99e31762ab2f | 54 | #define ADS129X_BIT_CLK_EN 0x5 |
eguliyev | 0:99e31762ab2f | 55 | |
eguliyev | 0:99e31762ab2f | 56 | #define ADS129X_BIT_DR2 0x2 |
eguliyev | 0:99e31762ab2f | 57 | #define ADS129X_BIT_DR1 0x1 |
eguliyev | 0:99e31762ab2f | 58 | #define ADS129X_BIT_DR0 0x0 |
eguliyev | 0:99e31762ab2f | 59 | |
eguliyev | 0:99e31762ab2f | 60 | // Configuration Register 2 |
eguliyev | 0:99e31762ab2f | 61 | |
eguliyev | 0:99e31762ab2f | 62 | #define ADS129X_BIT_WCT_CHOP 0x5 |
eguliyev | 0:99e31762ab2f | 63 | #define ADS129X_BIT_INT_TEST 0x4 |
eguliyev | 0:99e31762ab2f | 64 | // always 0 |
eguliyev | 0:99e31762ab2f | 65 | #define ADS129X_BIT_TEST_AMP 0x2 |
eguliyev | 0:99e31762ab2f | 66 | #define ADS129X_BIT_TEST_FREQ1 0x1 |
eguliyev | 0:99e31762ab2f | 67 | #define ADS129X_BIT_TEST_FREQ0 0x0 |
eguliyev | 0:99e31762ab2f | 68 | #define ADS129X_TEST_FREQ_1HZ 0x0 |
eguliyev | 0:99e31762ab2f | 69 | #define ADS129X_TEST_FREQ_2HZ 0x1 |
eguliyev | 0:99e31762ab2f | 70 | #define ADS129X_TEST_FREQ_DC 0x3 |
eguliyev | 0:99e31762ab2f | 71 | |
eguliyev | 0:99e31762ab2f | 72 | // Configuration Register 3 |
eguliyev | 0:99e31762ab2f | 73 | #define ADS129X_BIT_PD_REFBUF 0x7 |
eguliyev | 0:99e31762ab2f | 74 | // always 1 |
eguliyev | 0:99e31762ab2f | 75 | #define ADS129X_BIT_VREF_4V 0x5 |
eguliyev | 0:99e31762ab2f | 76 | #define ADS129X_BIT_RLD_MEAS 0x4 |
eguliyev | 0:99e31762ab2f | 77 | #define ADS129X_BIT_RLDREF_INT 0x3 |
eguliyev | 0:99e31762ab2f | 78 | #define ADS129X_BIT_PD_RLD 0x2 |
eguliyev | 0:99e31762ab2f | 79 | #define ADS129X_BIT_RLD_LOFF_SENS 0x1 |
eguliyev | 0:99e31762ab2f | 80 | #define ADS129X_BIT_RLD_STAT 0x0 |
eguliyev | 0:99e31762ab2f | 81 | |
eguliyev | 0:99e31762ab2f | 82 | // Lead-Off Control Register |
eguliyev | 0:99e31762ab2f | 83 | #define ADS129X_BIT_COMP_TH2 0x7 |
eguliyev | 0:99e31762ab2f | 84 | #define ADS129X_BIT_COMP_TH1 0x6 |
eguliyev | 0:99e31762ab2f | 85 | #define ADS129X_BIT_COMP_TH0 0x5 |
eguliyev | 0:99e31762ab2f | 86 | #define ADS129X_BIT_VLEAD_OFF_EN 0x4 |
eguliyev | 0:99e31762ab2f | 87 | #define ADS129X_BIT_ILEAD_OFF1 0x3 |
eguliyev | 0:99e31762ab2f | 88 | #define ADS129X_BIT_ILEAD_OFF0 0x2 |
eguliyev | 0:99e31762ab2f | 89 | #define ADS129X_BIT_FLEAD_OFF1 0x1 |
eguliyev | 0:99e31762ab2f | 90 | #define ADS129X_BIT_FLEAD_OFF0 0x0 |
eguliyev | 0:99e31762ab2f | 91 | |
eguliyev | 0:99e31762ab2f | 92 | // Individual Channel Settings |
eguliyev | 0:99e31762ab2f | 93 | #define ADS129X_BIT_PD 0x7 |
eguliyev | 0:99e31762ab2f | 94 | #define ADS129X_BIT_GAIN2 0x6 |
eguliyev | 0:99e31762ab2f | 95 | #define ADS129X_BIT_GAIN1 0x5 |
eguliyev | 0:99e31762ab2f | 96 | #define ADS129X_BIT_GAIN0 0x4 |
eguliyev | 0:99e31762ab2f | 97 | // always 0 |
eguliyev | 0:99e31762ab2f | 98 | #define ADS129X_BIT_MUX2 0x2 |
eguliyev | 0:99e31762ab2f | 99 | #define ADS129X_BIT_MUX1 0x1 |
eguliyev | 0:99e31762ab2f | 100 | #define ADS129X_BIT_MUX0 0x0 |
eguliyev | 0:99e31762ab2f | 101 | |
eguliyev | 0:99e31762ab2f | 102 | // Channel Select |
eguliyev | 0:99e31762ab2f | 103 | #define ADS129X_BIT_CH8 0x7 |
eguliyev | 0:99e31762ab2f | 104 | #define ADS129X_BIT_CH7 0x6 |
eguliyev | 0:99e31762ab2f | 105 | #define ADS129X_BIT_CH6 0x5 |
eguliyev | 0:99e31762ab2f | 106 | #define ADS129X_BIT_CH5 0x4 |
eguliyev | 0:99e31762ab2f | 107 | #define ADS129X_BIT_CH4 0x3 |
eguliyev | 0:99e31762ab2f | 108 | #define ADS129X_BIT_CH3 0x2 |
eguliyev | 0:99e31762ab2f | 109 | #define ADS129X_BIT_CH2 0x1 |
eguliyev | 0:99e31762ab2f | 110 | #define ADS129X_BIT_CH1 0x0 |
eguliyev | 0:99e31762ab2f | 111 | |
eguliyev | 0:99e31762ab2f | 112 | // General-Purpose I/O Register |
eguliyev | 0:99e31762ab2f | 113 | #define ADS129X_BIT_GPIOD4 0x7 |
eguliyev | 0:99e31762ab2f | 114 | #define ADS129X_BIT_GPIOD3 0x6 |
eguliyev | 0:99e31762ab2f | 115 | #define ADS129X_BIT_GPIOD2 0x5 |
eguliyev | 0:99e31762ab2f | 116 | #define ADS129X_BIT_GPIOD1 0x4 |
eguliyev | 0:99e31762ab2f | 117 | #define ADS129X_BIT_GPIOC4 0x3 |
eguliyev | 0:99e31762ab2f | 118 | #define ADS129X_BIT_GPIOC3 0x2 |
eguliyev | 0:99e31762ab2f | 119 | #define ADS129X_BIT_GPIOC2 0x1 |
eguliyev | 0:99e31762ab2f | 120 | #define ADS129X_BIT_GPIOC1 0x0 |
eguliyev | 0:99e31762ab2f | 121 | |
eguliyev | 0:99e31762ab2f | 122 | // PACE Detect Register |
eguliyev | 0:99e31762ab2f | 123 | |
eguliyev | 0:99e31762ab2f | 124 | #define ADS129X_BIT_PACEE1 0x4 |
eguliyev | 0:99e31762ab2f | 125 | #define ADS129X_BIT_PACEE0 0x3 |
eguliyev | 0:99e31762ab2f | 126 | #define ADS129X_BIT_PACEO1 0x2 |
eguliyev | 0:99e31762ab2f | 127 | #define ADS129X_BIT_PACEO0 0x1 |
eguliyev | 0:99e31762ab2f | 128 | #define ADS129X_BIT_PD_PACE 0x0 |
eguliyev | 0:99e31762ab2f | 129 | |
eguliyev | 0:99e31762ab2f | 130 | // Respiration Control Register |
eguliyev | 0:99e31762ab2f | 131 | #define ADS129X_BIT_RESP_DEMOD_EN1 0x7 |
eguliyev | 0:99e31762ab2f | 132 | #define ADS129X_BIT_RESP_MOD_EN1 0x6 |
eguliyev | 0:99e31762ab2f | 133 | // always 1 |
eguliyev | 0:99e31762ab2f | 134 | #define ADS129X_BIT_RESP_PH2 0x4 |
eguliyev | 0:99e31762ab2f | 135 | #define ADS129X_BIT_RESP_PH1 0x3 |
eguliyev | 0:99e31762ab2f | 136 | #define ADS129X_BIT_RESP_PH0 0x2 |
eguliyev | 0:99e31762ab2f | 137 | #define ADS129X_BIT_RESP_CTRL1 0x1 |
eguliyev | 0:99e31762ab2f | 138 | #define ADS129X_BIT_RESP_CTRL0 0x0 |
eguliyev | 0:99e31762ab2f | 139 | |
eguliyev | 0:99e31762ab2f | 140 | // Configuration Register 4 |
eguliyev | 0:99e31762ab2f | 141 | #define ADS129X_BIT_RESP_FREQ2 0x7 |
eguliyev | 0:99e31762ab2f | 142 | #define ADS129X_BIT_RESP_FREQ1 0x6 |
eguliyev | 0:99e31762ab2f | 143 | #define ADS129X_BIT_RESP_FREQ0 0x5 |
eguliyev | 0:99e31762ab2f | 144 | // always 0 |
eguliyev | 0:99e31762ab2f | 145 | #define ADS129X_BIT_SINGLE_SHOT 0x3 |
eguliyev | 0:99e31762ab2f | 146 | #define ADS129X_BIT_WCT_TO_RLD 0x2 |
eguliyev | 0:99e31762ab2f | 147 | #define ADS129X_BIT_PD_LOFF_COMP 0x1 |
eguliyev | 0:99e31762ab2f | 148 | // always 0 |
eguliyev | 0:99e31762ab2f | 149 | |
eguliyev | 0:99e31762ab2f | 150 | // Wilson Central Terminal and Augmented Lead Control Register |
eguliyev | 0:99e31762ab2f | 151 | #define ADS129X_BIT_aVF_CH6 0x7 |
eguliyev | 0:99e31762ab2f | 152 | #define ADS129X_BIT_aVF_CH5 0x6 |
eguliyev | 0:99e31762ab2f | 153 | #define ADS129X_BIT_aVF_CH7 0x5 |
eguliyev | 0:99e31762ab2f | 154 | #define ADS129X_BIT_aVF_CH4 0x4 |
eguliyev | 0:99e31762ab2f | 155 | #define ADS129X_BIT_PD_WCTA 0x3 |
eguliyev | 0:99e31762ab2f | 156 | #define ADS129X_BIT_WCTA2 0x2 |
eguliyev | 0:99e31762ab2f | 157 | #define ADS129X_BIT_WCTA1 0x1 |
eguliyev | 0:99e31762ab2f | 158 | #define ADS129X_BIT_WCTA0 0x0 |
eguliyev | 0:99e31762ab2f | 159 | |
eguliyev | 0:99e31762ab2f | 160 | // Wilson Central Terminal Control Register |
eguliyev | 0:99e31762ab2f | 161 | #define ADS129X_BIT_PD_WCTC 0x7 |
eguliyev | 0:99e31762ab2f | 162 | #define ADS129X_BIT_PD_WCTB 0x6 |
eguliyev | 0:99e31762ab2f | 163 | #define ADS129X_BIT_WCTB2 0x5 |
eguliyev | 0:99e31762ab2f | 164 | #define ADS129X_BIT_WCTB1 0x4 |
eguliyev | 0:99e31762ab2f | 165 | #define ADS129X_BIT_WCTB0 0x3 |
eguliyev | 0:99e31762ab2f | 166 | #define ADS129X_BIT_WCTC2 0x2 |
eguliyev | 0:99e31762ab2f | 167 | #define ADS129X_BIT_WCTC1 0x1 |
eguliyev | 0:99e31762ab2f | 168 | #define ADS129X_BIT_WCTC0 0x0 |
eguliyev | 0:99e31762ab2f | 169 | |
eguliyev | 0:99e31762ab2f | 170 | // Gain Configuration |
eguliyev | 0:99e31762ab2f | 171 | #define ADS129X_GAIN_6X 0x0 |
eguliyev | 0:99e31762ab2f | 172 | #define ADS129X_GAIN_1X 0x1 |
eguliyev | 0:99e31762ab2f | 173 | #define ADS129X_GAIN_2X 0x2 |
eguliyev | 0:99e31762ab2f | 174 | #define ADS129X_GAIN_3X 0x3 |
eguliyev | 0:99e31762ab2f | 175 | #define ADS129X_GAIN_4X 0x4 |
eguliyev | 0:99e31762ab2f | 176 | #define ADS129X_GAIN_8X 0x5 |
eguliyev | 0:99e31762ab2f | 177 | #define ADS129X_GAIN_12X 0x6 |
eguliyev | 0:99e31762ab2f | 178 | |
eguliyev | 0:99e31762ab2f | 179 | // Mux Configuration |
eguliyev | 0:99e31762ab2f | 180 | #define ADS129X_MUX_NORMAL 0x0 // Normal electrode input (default) |
eguliyev | 0:99e31762ab2f | 181 | #define ADS129X_MUX_SHORT 0x1 // Input shorted (for offset or noise measurements) |
eguliyev | 0:99e31762ab2f | 182 | #define ADS129X_MUX_RLD_MEAS 0x2 // Used in conjunction with RLD_MEAS bit for RLD measurements |
eguliyev | 0:99e31762ab2f | 183 | #define ADS129X_MUX_MVDD 0x3 // MVDD for supply measurement |
eguliyev | 0:99e31762ab2f | 184 | #define ADS129X_MUX_TEMP 0x4 // Temperature sensor |
eguliyev | 0:99e31762ab2f | 185 | #define ADS129X_MUX_TEST 0x5 // Test signal |
eguliyev | 0:99e31762ab2f | 186 | #define ADS129X_MUX_RLD_DRP 0x6 // RLD_DRP (positive electrode is the driver) |
eguliyev | 0:99e31762ab2f | 187 | #define ADS129X_MUX_RLD_DRN 0x7 // RLD_DRN (negative electrode is the driver) |
eguliyev | 0:99e31762ab2f | 188 | |
eguliyev | 0:99e31762ab2f | 189 | // Sample-rate Configuration |
eguliyev | 0:99e31762ab2f | 190 | #define ADS129X_SAMPLERATE_1024 0x6 |
eguliyev | 0:99e31762ab2f | 191 | #define ADS129X_SAMPLERATE_512 0x5 |
eguliyev | 0:99e31762ab2f | 192 | #define ADS129X_SAMPLERATE_256 0x4 |
eguliyev | 0:99e31762ab2f | 193 | #define ADS129X_SAMPLERATE_128 0x3 |
eguliyev | 0:99e31762ab2f | 194 | #define ADS129X_SAMPLERATE_64 0x2 |
eguliyev | 0:99e31762ab2f | 195 | #define ADS129X_SAMPLERATE_32 0x1 |
eguliyev | 0:99e31762ab2f | 196 | #define ADS129X_SAMPLERATE_16 0x0 |
eguliyev | 0:99e31762ab2f | 197 | |
eguliyev | 0:99e31762ab2f | 198 | void ADS_INIT(); |
eguliyev | 0:99e31762ab2f | 199 | void SPI_INIT(); |
eguliyev | 0:99e31762ab2f | 200 | void WAKEUP(); |
eguliyev | 0:99e31762ab2f | 201 | void STANDBY(); |
eguliyev | 0:99e31762ab2f | 202 | void RSET(); |
eguliyev | 0:99e31762ab2f | 203 | void START(); |
eguliyev | 0:99e31762ab2f | 204 | void STOP(); |
eguliyev | 0:99e31762ab2f | 205 | // Data Read Commands |
eguliyev | 0:99e31762ab2f | 206 | void RDATAC(); |
eguliyev | 0:99e31762ab2f | 207 | void SDATAC(); |
eguliyev | 0:99e31762ab2f | 208 | void RDATA(); |
eguliyev | 0:99e31762ab2f | 209 | void SETUP(); |
eguliyev | 0:99e31762ab2f | 210 | void Set_IRQ(); |
eguliyev | 0:99e31762ab2f | 211 | |
eguliyev | 0:99e31762ab2f | 212 | // Register Read/Write Commands |
eguliyev | 0:99e31762ab2f | 213 | char RREG(char _address); |
eguliyev | 0:99e31762ab2f | 214 | void RREG(char _address, char _numRegisters, char *_data); //to read multiple consecutive registers (Datasheet, pg. 38) |
eguliyev | 0:99e31762ab2f | 215 | void WREG(char _address, char _value); |
eguliyev | 0:99e31762ab2f | 216 | |
eguliyev | 0:99e31762ab2f | 217 | // Functions for setup and data retrieval |
eguliyev | 0:99e31762ab2f | 218 | char getDeviceId(); |
eguliyev | 0:99e31762ab2f | 219 | bool getData(long *buffer); |
eguliyev | 0:99e31762ab2f | 220 | |
eguliyev | 0:99e31762ab2f | 221 | void configChannel(char _channel, bool _powerDown, char _gain, char _mux); |
eguliyev | 0:99e31762ab2f | 222 | |
eguliyev | 0:99e31762ab2f | 223 | #endif |