i2c.h

00001 #define tm_len 134
00002 #define tc_len 135
00003 #define tc_test_len 135
00004 
00005 const int addr = 0x20;                                            //slave address 
00006 bool write_ack = false;
00007 bool read_ack = false;
00008 const int addr_pl = 0x20<<1;  //PL address
00009 const int addr_bae = 0x20; ///bae address
00010 //uint8_t rcv_isr = 0;
00011 
00012 int count = 0;
00013 
00014 char PL_I2C_DATA[134];//Payload i2c array
00015 uint8_t PL_TM_SIZE;//size of data to bev read from i2c
00016 uint32_t pdirr1;
00017 uint32_t pdirw1;
00018 
00019 void I2C_busreset()
00020 {
00021     PORTE->PCR[1] &= 0xfffffffb;    //Enabling high slew rates for SDA and SCL lines
00022     PORTE->PCR[0] &= 0xfffffffb;    //Enabling high slew rates for SDA and SCL lines
00023     I2C0->C1 &= 0x7f;               //Disabling I2C module
00024     SIM->SCGC4 &= 0xffffffbf;       //Disabling clock to I2C module
00025     SIM->SCGC4 |= 0x00000040;       //Enabling clock to I2C module
00026     I2C0->C1 |= 0x80;               //Enabling I2C module
00027     PORTE->PCR[1] |= 0x00000004;    //Disabling high slew rates for SDA and SCL lines
00028     PORTE->PCR[0] |= 0x00000004;    //Disabling high slew rates for SDA and SCL lines
00029     Thread::wait(1);                //Wait for all I2C registers to be updates to their their values
00030 }
00031 bool FCTN_I2C_READ_PL(char *data,int length)       // Returns 0 for success
00032 {    
00033     PL_I2C_GPIO = 1;
00034     read_ack = master.read(addr_pl|1,data,length);
00035     Thread::wait(1);        //as per tests Thread::wait not required on master side. But its safe to give 1ms 
00036     pdirr1=PTE->PDIR;
00037     uint8_t i2c_count = 0;    
00038     if(read_ack == 0)   //if read_ack says success, it may or may not be successful.Hence we check SCL and SDA
00039     {
00040         while(((pdirr1 & 0x03000000)!=0x03000000)&& i2c_count<10)//checking SCL and SDA for time=10ms
00041         {
00042             Thread::wait(1);
00043             pdirr1=PTE->PDIR;
00044             i2c_count++;
00045         }
00046         if(((pdirr1 & 0x03000000)==0x03000000))//if SCL and SDA are both high
00047         {    
00048             gPC.printf("\n\rData received from BAE");
00049         }
00050         else 
00051         {            
00052             I2C_busreset();
00053             read_ack = 1;
00054         }
00055     }
00056     else if (read_ack == 1)
00057     {
00058         I2C_busreset();
00059     }
00060     PL_I2C_GPIO = 0;
00061     i2c_count = 0;
00062     return read_ack;
00063     
00064 }
00065 bool FCTN_I2C_WRITE_PL(char *data2,uint8_t tc_len2)       // Returns 0 for success
00066 {
00067     write_ack = master.write(addr_pl|0x00,data2,tc_len2);//address to be defined in payload    
00068     Thread::wait(1);    //As per the tests Thread::wait is not required on master side but its safe to give 1ms
00069     pdirw1=PTE->PDIR;
00070     uint8_t i2c_count = 0;
00071     if(write_ack == 0)
00072     {
00073         while(((pdirw1 & 0x03000000)!=0x03000000)&& i2c_count<10)
00074         {
00075             Thread::wait(1);
00076             pdirw1=PTE->PDIR;
00077             i2c_count++;
00078         }
00079         if(((pdirw1 & 0x03000000)==0x03000000))
00080         {
00081             gPC.printf("\n\r Data sent");        
00082         }
00083         else
00084         {
00085             I2C_busreset();
00086             write_ack = 1;
00087         }
00088     }      
00089     if (write_ack == 1)
00090     {
00091         I2C_busreset();
00092     }
00093     i2c_count = 0;
00094     return write_ack;
00095 }
00096 bool FCTN_I2C_READ(char *data,int length)       // Returns 0 for success
00097 {   
00098     CDMS_I2C_GPIO = 1;
00099     read_ack = master.read(addr_bae|1,data,length);
00100     Thread::wait(1);        //as per tests Thread::wait not required on master side. But its safe to give 1ms 
00101     pdirr1=PTE->PDIR;
00102     uint8_t i2c_count = 0;    
00103     if(read_ack == 0)   //if read_ack says success, it may or may not be successful.Hence we check SCL and SDA
00104     {
00105         while(((pdirr1 & 0x03000000)!=0x03000000)&& i2c_count<10)//checking SCL and SDA for time=10ms
00106         {
00107             Thread::wait(1);
00108             pdirr1=PTE->PDIR;
00109             i2c_count++;
00110         }
00111         if(((pdirr1 & 0x03000000)==0x03000000))//if SCL and SDA are both high
00112         {    
00113             gPC.printf("\n\rData received from BAE");
00114         }
00115         else 
00116         {            
00117             I2C_busreset();
00118             read_ack = 1;
00119         }
00120     }
00121     else if (read_ack == 1)
00122     {
00123         I2C_busreset();
00124     }
00125     CDMS_I2C_GPIO = 0;
00126     i2c_count = 0;
00127     return read_ack;
00128 }
00129 
00130 bool FCTN_I2C_WRITE(char *data,int tc_len2)       // Returns 0 for success
00131 {    
00132     CDMS_I2C_GPIO = 1;
00133     write_ack = master.write(addr_bae|0x00,data,tc_len2);    
00134     Thread::wait(1);    //As per the tests Thread::wait is not required on master side but its safe to give 1ms
00135     pdirw1=PTE->PDIR;
00136     uint8_t i2c_count = 0;
00137     if(write_ack == 0)
00138     {
00139         while(((pdirw1 & 0x03000000)!=0x03000000)&& i2c_count<10)
00140         {
00141             Thread::wait(1);
00142             pdirw1=PTE->PDIR;
00143             i2c_count++;
00144         }
00145         if(((pdirw1 & 0x03000000)==0x03000000))
00146         {
00147             gPC.printf("\n\r Data sent");        
00148         }
00149         else
00150         {
00151             I2C_busreset();
00152             write_ack = 1;
00153         }
00154     }      
00155     if (write_ack == 1)
00156     {
00157         I2C_busreset();
00158     }
00159     CDMS_I2C_GPIO = 0;
00160     i2c_count = 0;
00161     return write_ack;
00162 }