FMS_all.h

00001 
00002 // Includes MMS RAM functions also
00003 
00004 /*===================================================FMS Functions=================================================*/
00005 
00006 void STANDBY_PRCS();
00007 
00008 //Run processes
00009 void P_PL_INIT();
00010 void P_PL_MAIN();
00011 void P_COM_INIT();
00012 void P_CDMS_HK_MAIN();
00013 void P_PL_RCV_SC_DATA();
00014 void P_CDMS_INIT_SD();
00015 
00016 // Switch ON/OFF functions
00017 void CDMS_SD_SW_ON();
00018 void CDMS_SD_SW_OFF();
00019 void CDMS_RTC_ON();
00020 void CDMS_RTC_OFF();
00021 void SW_ON_BAE();
00022 void SW_OFF_BAE();
00023 void SW_ON_PL_BEE();
00024 void SW_OFF_PL_BEE();
00025 void SW_ON_PL_EPS();
00026 void SW_OFF_PL_EPS();
00027 void SW_ON_V_A_EN();
00028 void SW_OFF_V_A_EN();
00029 
00030 // RST functions
00031 void RST_SD();
00032 void SW_RST_BAE();
00033 void SW_RST_PL_BEE();
00034 void RST_BAE();
00035 void RST_PL_BEE();
00036 void CDMS_RESET();
00037 void SYS_PWR_RESET();  // Have to be decided with EPS team.
00038 void sys_pwr_reset(void const *args);
00039 void EPS_V_A_EN();
00040 void EPS_V_C_EN();
00041 
00042 void RST_HK_COUNTER();
00043 int8_t CDMS_RD_SD_HK(uint8_t *);
00044 void CDMS_CALIB_RTC(uint8_t *);
00045 void TOTAL_RESET_WITH_CDMS();
00046 
00047 void sys_pwr_reset(void const *args){
00048     SYS_PWR_RESET();
00049 }
00050 
00051 void STANDBY_PRCS()
00052 {
00053     
00054 }
00055 
00056 void P_PL_INIT()
00057 {
00058     
00059 }
00060 
00061 void P_PL_MAIN()
00062 {
00063    FCTN_CDMS_PL_MAIN((void *)NULL);
00064 }
00065 
00066 void P_COM_INIT()
00067 {
00068     P_COM_INIT;
00069 }
00070 
00071 void P_CDMS_HK_MAIN()
00072 {
00073     FCTN_CDMS_HK_MAIN((void *)NULL);
00074 }
00075 
00076 void P_PL_RCV_SC_DATA()
00077 {
00078     
00079 }
00080 
00081 void P_CDMS_INIT_SD()
00082 {
00083     FCTN_CDMS_SD_INIT();
00084 }
00085 
00086 void CDMS_SD_SW_ON()
00087 {
00088     SD_SW_EN_DS = 0;
00089     SD_STATUS = DEVICE_POWERED;
00090     CDMS_SD_SW_STATUS = DEVICE_POWERED;
00091     FCTN_CDMS_WR_FLASH(2,DEVICE_POWERED);
00092     gPC.printf("sw on sd\n");
00093 }
00094 
00095 void CDMS_SD_SW_OFF()
00096 {
00097     SD_SW_EN_DS = 1;
00098     SD_STATUS = DEVICE_DISABLED;
00099     CDMS_SD_SW_STATUS = DEVICE_DISABLED;
00100     FCTN_CDMS_WR_FLASH(2,DEVICE_DISABLED);
00101     gPC.printf("sw off sd\n");
00102 }
00103 
00104 void CDMS_RTC_ON()
00105 {
00106     //FCTN_CDMS_INIT_RTC();
00107     SPI_mutex.lock();
00108     gCS_RTC=1;
00109     gCS_RTC=0;
00110     spi.write(0x81); //register address with write flag
00111     spi.write(0x00);//disabling stop bit in the seconds register
00112     SPI_mutex.unlock();
00113     gPC.printf("sw on rtc\n");
00114 }
00115 
00116 void CDMS_RTC_OFF()
00117 {
00118     SPI_mutex.lock();
00119     gCS_RTC=1;
00120     gCS_RTC=0;
00121     spi.write(0x81); //register address with write flag
00122     spi.write(0x80);//enabling stop bit in the seconds register
00123     SPI_mutex.unlock();
00124     gPC.printf("sw off rtc\n");
00125 }
00126 
00127 void SW_ON_BAE()
00128 {
00129     BAE_SW_EN_DS = 0;
00130     BAE_STATUS = DEVICE_POWERED;
00131     BAE_SW_STATUS = DEVICE_POWERED;
00132     FCTN_CDMS_WR_FLASH(1,DEVICE_POWERED);
00133     gPC.printf("sw on bae\n");
00134 }
00135 
00136 void SW_OFF_BAE()
00137 {
00138     BAE_SW_EN_DS = 1;
00139     BAE_STATUS = DEVICE_DISABLED;
00140     BAE_SW_STATUS = DEVICE_DISABLED;
00141     FCTN_CDMS_WR_FLASH(1,DEVICE_DISABLED);
00142     gPC.printf("sw off bae\n");
00143 }
00144 
00145 void SW_ON_PL_BEE()
00146 {
00147     PYLD_DFF_CLK = 0;
00148     PYLD_DFF = 1;
00149     wait_us(1);
00150     PYLD_DFF_CLK = 1;
00151     wait_us(1);
00152     PYLD_DFF_CLK = 0;
00153     wait_us(1);
00154     PL_STATUS = DEVICE_POWERED;
00155     PL_BEE_SW_STATUS = DEVICE_POWERED;
00156     FCTN_CDMS_WR_FLASH(3,DEVICE_POWERED);
00157 }
00158 
00159 void SW_OFF_PL_BEE()
00160 {
00161     PYLD_DFF_CLK = 0;
00162     PYLD_DFF = 0;
00163     wait_us(1);
00164     PYLD_DFF_CLK = 1;
00165     wait_us(1);
00166     PYLD_DFF_CLK = 0;
00167     wait_us(1);
00168     PL_STATUS = DEVICE_DISABLED;
00169     PL_BEE_SW_STATUS = DEVICE_DISABLED;
00170     FCTN_CDMS_WR_FLASH(3,DEVICE_DISABLED);
00171 }
00172 
00173 void SW_ON_PL_EPS()
00174 {
00175     PYLD_EPS_DFF_PWR_CLK = 0;
00176     PYLD_EPS_DFF_PWR = 1;
00177     wait_us(1);
00178     PYLD_EPS_DFF_PWR_CLK = 1;
00179     wait_us(1);
00180     PYLD_EPS_DFF_PWR_CLK = 0;
00181     wait_us(1);
00182     PL_EPS_LATCH_SW_EN = 1;
00183     FCTN_CDMS_WR_FLASH(4,1);
00184 }
00185 
00186 void SW_OFF_PL_EPS()
00187 {
00188     PYLD_EPS_DFF_PWR_CLK = 0;
00189     PYLD_EPS_DFF_PWR = 0;
00190     wait_us(1);
00191     PYLD_EPS_DFF_PWR_CLK = 1;
00192     wait_us(1);
00193     PYLD_EPS_DFF_PWR_CLK = 0;
00194     wait_us(1);
00195     PL_EPS_LATCH_SW_EN = 0;
00196     FCTN_CDMS_WR_FLASH(4,0);
00197 }
00198 
00199 void SW_ON_V_A_EN()
00200 {
00201     V_A_EN = 1;
00202     EPS_V_A_EN_STATUS = 1;
00203     FCTN_CDMS_WR_FLASH(0,1);
00204 }
00205 
00206 void SW_OFF_V_A_EN()
00207 {
00208     V_A_EN = 0;
00209     EPS_V_A_EN_STATUS = 0;
00210     FCTN_CDMS_WR_FLASH(0,0);
00211 }
00212 
00213 void RST_SD()
00214 {
00215     SD_SW_EN_DS = 1;
00216     wait_ms(10);
00217     SD_SW_EN_DS = 0;
00218     gPC.printf("rst sd\n");
00219 }
00220 
00221 void SW_RST_BAE()
00222 {
00223     BAE_SW_EN_DS = 1;
00224     wait_ms(10);
00225     BAE_SW_EN_DS = 0;
00226     gPC.printf("rst bae\n");
00227 }
00228 
00229 void SW_RST_PL_BEE()
00230 {
00231     PYLD_DFF = 1;
00232     wait_ms(10);
00233     PYLD_DFF = 0;
00234 }
00235 
00236 void RST_BAE()
00237 {
00238     RESET_TO_BAE = 1;
00239     wait_ms(10);
00240     RESET_TO_BAE = 0;
00241 }
00242 
00243 void RST_PL_BEE()
00244 {
00245     RESET_TO_PYLD = 1;
00246     wait_ms(10);
00247     RESET_TO_PYLD = 0;
00248 }
00249 
00250 void CDMS_INTERNAL_RESET()
00251 {
00252     NVIC_SystemReset();
00253 }
00254 
00255 void SYS_PWR_RESET()  // Have to be decided with EPS team.
00256 {
00257     sys_pwr_rst = 1;
00258 }
00259 
00260 void EPS_V_A_EN()     // This is a reset function
00261 {
00262     V_A_EN = 0;
00263     wait_ms(10);
00264     V_A_EN = 1;
00265 }
00266 
00267 void EPS_V_C_EN()     // This is a reset function
00268 {
00269     COM_RX_CNTRL = 0;
00270     wait_ms(10);
00271     COM_RX_CNTRL = 1;
00272 }
00273 
00274 void RST_HK_COUNTER()
00275 {
00276     firstCount = true;
00277 }
00278 
00279 int8_t CDMS_RD_SD_HK(uint8_t *sd_statusbits)
00280 {
00281     int8_t p;
00282     if(SD_SW_EN_DS != DEVICE_POWERED)
00283     {
00284         SD_RD_ERROR = 1;
00285         p = 1;
00286     }
00287     else
00288     {
00289         p = disk_read_statusbits(sd_statusbits);
00290     }
00291     return p;
00292 }
00293 
00294 void CDMS_CALIB_RTC(uint64_t time)
00295 {
00296     SPI_mutex.lock();
00297     gCS_RTC=1;
00298     spi.format(8,0);
00299     spi.frequency(1000000);
00300  
00301     gCS_RTC=0;
00302     spi.write(0x82);
00303     spi.write((uint8_t)time);//set minutes
00304     gCS_RTC=1;
00305  
00306     gCS_RTC=0;
00307     spi.write(0x83); 
00308     spi.write((uint8_t)(time>>8) & 0x3F); //set hours
00309     gCS_RTC=1;
00310     
00311     gCS_RTC=0;
00312     spi.write(0x85); 
00313     spi.write((uint8_t)(time>>16) & 0x3F); //set date
00314     gCS_RTC=1;
00315     
00316     gCS_RTC=0;
00317     spi.write(0x86); 
00318     spi.write((uint8_t)(time>>24) & 0x1F); //set month
00319     gCS_RTC=1;
00320     
00321     gCS_RTC=0;
00322     spi.write(0x87); 
00323     spi.write((uint8_t)(time>>32)); //set year to 00(2000)
00324     gCS_RTC=1;
00325     gPC.puts("\n\r rtc initalised \n");
00326     SPI_mutex.unlock();
00327 }
00328 
00329 void CDMS_RESET()
00330 {
00331     NVIC_SystemReset();    
00332 }
00333 
00334 /*
00335 //void CDMS_INTERNAL_RESET()
00336 {
00337     
00338 }
00339 */
00340 
00341 //===============================MMS RAM functions==================================
00342 
00343 void FCTN_CDMS_RD_L_RAM(Base_tm *);
00344 
00345 void FCTN_CDMS_RD_L_RAM(Base_tm *tm_pointer)
00346 {
00347     for(int i=4;i<132;i++)
00348     tm_pointer->TM_string[i] = CDMS_HK_FRAME[i-4];
00349 }
00350 
00351