shubham c / Mbed 2 deprecated SBC_TEST_CDMS_CODE

CDMS code for testing sbc

Dependencies:   FreescaleIAP SimpleDMA mbed-rtos mbed

Fork of CDMS_CODE by shubham c

adf.h@165:60a4a23131a3, 2016-04-19 (annotated)

Committer:
ee12b079
Date:
Tue Apr 19 17:03:29 2016 +0000
Revision:
165:60a4a23131a3
Parent:
161:a63672bf4423
Child:
166:2174ce7f153e
Child:
167:9e1775d19ac3
Testing CDMS Hardware:EoS Detected CRC Failure

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shreeshas95 1:a0055b3280c8 1 //without reset feature , with state checks.
shreeshas95 2:2caf2a9a13aa 2 InterruptIn IRQ(ADF_IRQ);
aniruddhv 52:0bd68655c651 3 //Ticker ticker;
ee12b079 9:e9eaada136c6 4
shreeshas95 1:a0055b3280c8 5 bool loop_on;
shreeshas95 1:a0055b3280c8 6 bool ADF_off;
shreeshas95 1:a0055b3280c8 7 bool buffer_state;
ee12b079 9:e9eaada136c6 8 bool finish_write_data;
shreeshas95 1:a0055b3280c8 9 uint8_t signal = 0x00;
ee12b079 165:60a4a23131a3 10 //unsigned char bbram_buffer[66]={0x19,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0xF4,0xC2,0x10,0xC0,0x00,0x30,0x31,0x07,0x00,0x01,0x00,0x7F,0x00,0x0B,0x37,0x00,0x00,0x40,0x0C,0x00,0x05,0x00,0x00,0x18,0x12,0x34,0x56,0x10,0x10,0xC4,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x00};
ee12b079 165:60a4a23131a3 11 unsigned char bbram_buffer[66]={0x19,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0xF4,0xC2,0x10,0xC0,0x00,0x30,0x31,0x07,0x00,0x01,0x00,/*PA Level Byte*/0x7F/*PA Parameters*/,0x00,0x0B,0x37,0x00,0x00,0x40,0x0C,0x00,0x05,0x00,0x00,0x18,0x12,0x34,0x56,0x20,0x10,0xC4,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0xE0,0x00,0x10,0x04,0x00,0x00,0x00,0x00,0x00};
shreeshas95 2:2caf2a9a13aa 12 //int initialise_card();
shreeshas95 2:2caf2a9a13aa 13 //int disk_initialize();
ee12b079 9:e9eaada136c6 14
shreeshas95 1:a0055b3280c8 15 #define bbram_write {\
shreeshas95 1:a0055b3280c8 16 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 17 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 18 spi.write(0xB0);\
shreeshas95 1:a0055b3280c8 19 wait_us(300);\
shreeshas95 1:a0055b3280c8 20 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 21 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 22 for(int i=0;i<66;i++){\
shreeshas95 1:a0055b3280c8 23 spi.write(bbram_buffer[i]);\
shreeshas95 1:a0055b3280c8 24 }\
shreeshas95 1:a0055b3280c8 25 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 26 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 27 }
shreeshas95 1:a0055b3280c8 28 //------------------------------------------------------------------------
shreeshas95 1:a0055b3280c8 29 // state checking functions
shreeshas95 1:a0055b3280c8 30 //bool assrt_phy_off( int, int, int);
shreeshas95 1:a0055b3280c8 31 //bool assrt_phy_on( int,int,int);
shreeshas95 1:a0055b3280c8 32 //bool assrt_phy_tx(int,int,int);
ee12b079 9:e9eaada136c6 33
shreeshas95 1:a0055b3280c8 34 #define START_ADDRESS 0x020;
shreeshas95 1:a0055b3280c8 35 #define MISO_PIN PTE3
shreeshas95 1:a0055b3280c8 36 /**************Defining Counter Limits**************/
shreeshas95 1:a0055b3280c8 37 #define THRS 20
shreeshas95 1:a0055b3280c8 38 #define STATE_ERR_THRS 20
shreeshas95 1:a0055b3280c8 39 #define PHY_OFF_EXEC_TIME 300
shreeshas95 1:a0055b3280c8 40 #define PHY_ON_EXEC_TIME 300
shreeshas95 1:a0055b3280c8 41 #define PHY_TX_EXEC_TIME 600
shreeshas95 1:a0055b3280c8 42 /******DEFINING COMMANDS*********/
shreeshas95 1:a0055b3280c8 43 #define CMD_HW_RESET 0xC8
shreeshas95 1:a0055b3280c8 44 #define CMD_PHY_ON 0xB1
shreeshas95 1:a0055b3280c8 45 #define CMD_PHY_OFF 0xB0
shreeshas95 1:a0055b3280c8 46 #define CMD_PHY_TX 0xB5
shreeshas95 1:a0055b3280c8 47 #define CMD_CONFIG_DEV 0xBB
ee12b079 9:e9eaada136c6 48
shreeshas95 1:a0055b3280c8 49 #define check_status {\
shreeshas95 1:a0055b3280c8 50 unsigned char stat=0;\
shreeshas95 1:a0055b3280c8 51 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 52 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 53 stat = spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 54 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 55 status = stat;\
shreeshas95 1:a0055b3280c8 56 }
ee12b079 9:e9eaada136c6 57
shreeshas95 1:a0055b3280c8 58 // all three arguments are int
shreeshas95 1:a0055b3280c8 59 #define assrt_phy_off(return_this) {\
shreeshas95 1:a0055b3280c8 60 int cmd_err_cnt = 0;\
shreeshas95 1:a0055b3280c8 61 int spi_err_cnt = 0;\
shreeshas95 1:a0055b3280c8 62 int state_err_cnt = 0;\
shreeshas95 1:a0055b3280c8 63 for(int i = 0 ; i < 40 ;i++){\
shreeshas95 1:a0055b3280c8 64 check_status;\
shreeshas95 1:a0055b3280c8 65 if(status == 0xB1){\
shreeshas95 1:a0055b3280c8 66 return_this = 0;\
shreeshas95 1:a0055b3280c8 67 break;\
shreeshas95 1:a0055b3280c8 68 }\
shreeshas95 1:a0055b3280c8 69 else if(cmd_err_cnt>THRS||spi_err_cnt>THRS){\
shreeshas95 1:a0055b3280c8 70 return_this = 1;\
shreeshas95 1:a0055b3280c8 71 break;\
shreeshas95 1:a0055b3280c8 72 }\
shreeshas95 1:a0055b3280c8 73 else if(state_err_cnt>STATE_ERR_THRS){\
shreeshas95 1:a0055b3280c8 74 return_this = 1;\
shreeshas95 1:a0055b3280c8 75 break;\
shreeshas95 1:a0055b3280c8 76 }\
shreeshas95 1:a0055b3280c8 77 else if( (status & 0xA0) == 0xA0 ){\
shreeshas95 1:a0055b3280c8 78 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 79 spi.write(CMD_PHY_OFF);\
shreeshas95 1:a0055b3280c8 80 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 81 wait_us(PHY_OFF_EXEC_TIME);\
shreeshas95 1:a0055b3280c8 82 state_err_cnt++;\
shreeshas95 1:a0055b3280c8 83 }\
shreeshas95 1:a0055b3280c8 84 else if(status&0x80==0x00){\
shreeshas95 1:a0055b3280c8 85 wait_ms(5);\
shreeshas95 1:a0055b3280c8 86 spi_err_cnt++;\
shreeshas95 1:a0055b3280c8 87 }\
shreeshas95 1:a0055b3280c8 88 else {\
shreeshas95 1:a0055b3280c8 89 wait_ms(1);\
shreeshas95 1:a0055b3280c8 90 cmd_err_cnt++;\
shreeshas95 1:a0055b3280c8 91 }\
shreeshas95 1:a0055b3280c8 92 }\
shreeshas95 1:a0055b3280c8 93 }
ee12b079 165:60a4a23131a3 94 bool bbram_err=false;
ee12b079 165:60a4a23131a3 95 int err_arr[64];
ee12b079 165:60a4a23131a3 96 int err[64];
ee12b079 165:60a4a23131a3 97 #define bbram_check gCS_ADF=0;\
ee12b079 165:60a4a23131a3 98 for(int i=0;i<64;i++){\
ee12b079 165:60a4a23131a3 99 err_arr[i]=0;\
ee12b079 165:60a4a23131a3 100 }\
ee12b079 165:60a4a23131a3 101 for(int i=0;i<64;i++){\
ee12b079 165:60a4a23131a3 102 err[i]=0;\
ee12b079 165:60a4a23131a3 103 }\
ee12b079 165:60a4a23131a3 104 bbram_err=false;\
ee12b079 165:60a4a23131a3 105 gCS_ADF=0;\
ee12b079 165:60a4a23131a3 106 spi.write(0x39);\
ee12b079 165:60a4a23131a3 107 spi.write(0x00);\
ee12b079 165:60a4a23131a3 108 spi.write(0xFF);\
ee12b079 165:60a4a23131a3 109 for(int i=0;i<64;i++){\
ee12b079 165:60a4a23131a3 110 err_arr[i]=spi.write(0xFF);\
ee12b079 165:60a4a23131a3 111 if(err_arr[i]!=bbram_buffer[i+2]){\
ee12b079 165:60a4a23131a3 112 err[i]=1;\
ee12b079 165:60a4a23131a3 113 bbram_err=true;\
ee12b079 165:60a4a23131a3 114 }\
ee12b079 165:60a4a23131a3 115 }\
ee12b079 165:60a4a23131a3 116 gCS_ADF=1;\
ee12b079 165:60a4a23131a3 117 for(int i=0;i<64;i++){\
ee12b079 165:60a4a23131a3 118 gPC.printf("%d ",err[i]);\
ee12b079 165:60a4a23131a3 119 }\
ee12b079 165:60a4a23131a3 120 gPC.printf("Write \t read \r\n");\
ee12b079 165:60a4a23131a3 121 for(int i=0;i<64;i++){\
ee12b079 165:60a4a23131a3 122 gPC.printf("%x \t %x \r\n",bbram_buffer[i+2],err_arr[i]);\
ee12b079 165:60a4a23131a3 123 }\
ee12b079 165:60a4a23131a3 124 if(!bbram_err)\
ee12b079 165:60a4a23131a3 125 gPC.printf("BBRAM verified \r\n");\
ee12b079 165:60a4a23131a3 126
ee12b079 9:e9eaada136c6 127
ee12b079 9:e9eaada136c6 128
shreeshas95 1:a0055b3280c8 129 #define initial_adf_check {\
shreeshas95 1:a0055b3280c8 130 spi.write(CMD_PHY_OFF);\
shreeshas95 1:a0055b3280c8 131 int tempReturn = 0;\
shreeshas95 2:2caf2a9a13aa 132 bool flag = false;\
shreeshas95 1:a0055b3280c8 133 while( hw_reset_err_cnt < 2 ){\
shreeshas95 1:a0055b3280c8 134 assrt_phy_off( tempReturn);\
shreeshas95 1:a0055b3280c8 135 if( !tempReturn ){\
shreeshas95 1:a0055b3280c8 136 bbram_write;\
shreeshas95 1:a0055b3280c8 137 bbram_flag=1;\
shreeshas95 2:2caf2a9a13aa 138 flag = true;\
shreeshas95 1:a0055b3280c8 139 break;\
shreeshas95 1:a0055b3280c8 140 }\
shreeshas95 1:a0055b3280c8 141 else{\
shreeshas95 1:a0055b3280c8 142 hardware_reset(0);\
shreeshas95 1:a0055b3280c8 143 hw_reset_err_cnt++;\
aniruddhv 69:20f09a0c3fd2 144 /*gPC.puts("Resetting hardware\r\n");*/\
shreeshas95 1:a0055b3280c8 145 }\
shreeshas95 1:a0055b3280c8 146 }\
ee12b079 165:60a4a23131a3 147 bbram_write;\
ee12b079 165:60a4a23131a3 148 bbram_check;\
shreeshas95 2:2caf2a9a13aa 149 if( flag == false ){\
aniruddhv 69:20f09a0c3fd2 150 /*gPC.puts("Seems to be SPI problem\r\n");*/\
shreeshas95 2:2caf2a9a13aa 151 }\
shreeshas95 1:a0055b3280c8 152 assrt_phy_off(tempReturn);\
shreeshas95 1:a0055b3280c8 153 if(!bbram_flag){\
shreeshas95 1:a0055b3280c8 154 bcn_flag=1;\
shreeshas95 1:a0055b3280c8 155 }\
shreeshas95 1:a0055b3280c8 156 }
ee12b079 9:e9eaada136c6 157
shreeshas95 1:a0055b3280c8 158 unsigned char status =0;
shreeshas95 1:a0055b3280c8 159 unsigned int cmd_err_cnt=0;
shreeshas95 1:a0055b3280c8 160 unsigned int state_err_cnt=0;
shreeshas95 1:a0055b3280c8 161 unsigned int miso_err_cnt=0;
shreeshas95 1:a0055b3280c8 162 unsigned int hw_reset_err_cnt=0;
shreeshas95 1:a0055b3280c8 163 bool bcn_flag=0;
shreeshas95 1:a0055b3280c8 164 bool bbram_flag=0;
ee12b079 9:e9eaada136c6 165
shreeshas95 1:a0055b3280c8 166 bool hardware_reset(int bcn_call){
shreeshas95 1:a0055b3280c8 167 for(int i= 0; i < 20 ; i++){
shreeshas95 1:a0055b3280c8 168 gCS_ADF=0;
shreeshas95 1:a0055b3280c8 169 spi.write(CMD_HW_RESET);
shreeshas95 1:a0055b3280c8 170 gCS_ADF=1;
shreeshas95 1:a0055b3280c8 171 wait_ms(2);// Typically 1 ms
shreeshas95 1:a0055b3280c8 172 int count=0;
shreeshas95 1:a0055b3280c8 173 int temp_return = 0;
shreeshas95 1:a0055b3280c8 174 while(count<10 && miso_err_cnt<10){
shreeshas95 1:a0055b3280c8 175 if(MISO_PIN){
shreeshas95 1:a0055b3280c8 176 assrt_phy_off(temp_return);
shreeshas95 1:a0055b3280c8 177 if(!temp_return){
shreeshas95 1:a0055b3280c8 178 return 0;
shreeshas95 1:a0055b3280c8 179 }
shreeshas95 1:a0055b3280c8 180 count++;
shreeshas95 1:a0055b3280c8 181 }
shreeshas95 1:a0055b3280c8 182 else{
shreeshas95 1:a0055b3280c8 183 wait_us(50);
shreeshas95 1:a0055b3280c8 184 miso_err_cnt++;
shreeshas95 1:a0055b3280c8 185 }
shreeshas95 1:a0055b3280c8 186 }
shreeshas95 1:a0055b3280c8 187 }
shreeshas95 1:a0055b3280c8 188 return 1;
shreeshas95 1:a0055b3280c8 189 }
ee12b079 9:e9eaada136c6 190
shreeshas95 1:a0055b3280c8 191 //for reseting the transmission call assert function after b5 and b1. after b1 assert_phi_on and after b5 assert_phi_tx.
shreeshas95 1:a0055b3280c8 192 //----------------------------------------------------------------------------
ee12b079 9:e9eaada136c6 193
shreeshas95 1:a0055b3280c8 194 # define initiate {\
shreeshas95 1:a0055b3280c8 195 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 196 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 197 spi.write(0x08);\
shreeshas95 1:a0055b3280c8 198 spi.write(0x14);\
shreeshas95 1:a0055b3280c8 199 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 200 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 201 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 202 spi.write(0x08);\
shreeshas95 1:a0055b3280c8 203 spi.write(0x15);\
shreeshas95 1:a0055b3280c8 204 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 205 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 206 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 207 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 208 spi.write(0x24);\
shreeshas95 1:a0055b3280c8 209 spi.write(0x20);\
shreeshas95 1:a0055b3280c8 210 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 211 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 212 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 213 spi.write(0x37);\
shreeshas95 1:a0055b3280c8 214 spi.write(0xE0);\
shreeshas95 1:a0055b3280c8 215 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 216 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 217 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 218 spi.write(0x36);\
shreeshas95 1:a0055b3280c8 219 spi.write(0x70);\
shreeshas95 1:a0055b3280c8 220 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 221 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 222 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 223 spi.write(0x39);\
shreeshas95 1:a0055b3280c8 224 spi.write(0x10);\
shreeshas95 1:a0055b3280c8 225 gCS_ADF=1;\
ee12b079 9:e9eaada136c6 226 gCS_ADF=0;\
ee12b079 9:e9eaada136c6 227 spi.write(0xBB);\
ee12b079 9:e9eaada136c6 228 gCS_ADF=1;\
ee12b079 9:e9eaada136c6 229 gCS_ADF=0;\
ee12b079 9:e9eaada136c6 230 spi.write(0xFF);\
ee12b079 9:e9eaada136c6 231 spi.write(0xFF);\
ee12b079 9:e9eaada136c6 232 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 233 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 234 }
ee12b079 9:e9eaada136c6 235
shreeshas95 1:a0055b3280c8 236 #define write_data {\
shreeshas95 1:a0055b3280c8 237 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 238 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 239 spi.write(0x0B);\
shreeshas95 1:a0055b3280c8 240 spi.write(0x36);\
shreeshas95 1:a0055b3280c8 241 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 242 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 243 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 244 if(buffer_state){\
shreeshas95 1:a0055b3280c8 245 spi.write(0x18);\
shreeshas95 1:a0055b3280c8 246 spi.write(0x20);\
shreeshas95 1:a0055b3280c8 247 for(unsigned char i=0; i<112;i++){\
ee12b079 139:1018e1dc82e9 248 if(bypass_adf)\
ee12b079 139:1018e1dc82e9 249 gPC.putc(buffer_112[i]);\
ee12b079 139:1018e1dc82e9 250 else\
ee12b079 139:1018e1dc82e9 251 spi.write(buffer_112[i]);\
ee12b079 53:18db568f1098 252 /*gPC.printf("0x%X,",spi.write(buffer_112[i]));*/\
shreeshas95 1:a0055b3280c8 253 }\
shreeshas95 1:a0055b3280c8 254 }\
shreeshas95 1:a0055b3280c8 255 else{\
shreeshas95 1:a0055b3280c8 256 spi.write(0x18);\
shreeshas95 1:a0055b3280c8 257 spi.write(0x90);\
shreeshas95 1:a0055b3280c8 258 for(unsigned char i=0; i<112;i++){\
ee12b079 139:1018e1dc82e9 259 if(bypass_adf)\
ee12b079 139:1018e1dc82e9 260 gPC.putc(buffer_112[i]);\
ee12b079 139:1018e1dc82e9 261 else\
ee12b079 139:1018e1dc82e9 262 spi.write(buffer_112[i]);\
ee12b079 53:18db568f1098 263 /*gPC.printf("0x%X,",spi.write(buffer_112[i]));*/\
shreeshas95 1:a0055b3280c8 264 }\
shreeshas95 1:a0055b3280c8 265 }\
shreeshas95 1:a0055b3280c8 266 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 267 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 268 buffer_state = !buffer_state;\
shreeshas95 1:a0055b3280c8 269 if(last_buffer){\
ee12b079 9:e9eaada136c6 270 finish_write_data = true;\
aniruddhv 69:20f09a0c3fd2 271 /*gPC.puts("adf_off\r\n");*/\
shreeshas95 1:a0055b3280c8 272 }\
shreeshas95 1:a0055b3280c8 273 }
shreeshas95 1:a0055b3280c8 274
aniruddhv 52:0bd68655c651 275 /*
shreeshas95 1:a0055b3280c8 276 void check(){
shreeshas95 1:a0055b3280c8 277 if(IRQ){
shreeshas95 1:a0055b3280c8 278 gCOM_MNG_TMTC_THREAD->signal_set(signal);
shreeshas95 1:a0055b3280c8 279 }
aniruddhv 52:0bd68655c651 280 }*/
shreeshas95 1:a0055b3280c8 281
ee12b079 9:e9eaada136c6 282
shreeshas95 1:a0055b3280c8 283 #define send_data {\
ee12b079 88:b9beee1a7a3e 284 if(sent_tmfrom_SDcard){\
ee12b079 95:42d6747900cb 285 send_tm_from_SD_card_fun();\
shreeshas95 1:a0055b3280c8 286 }else{\
shreeshas95 1:a0055b3280c8 287 snd_tm.transmit_data(buffer_112,&last_buffer);\
shreeshas95 1:a0055b3280c8 288 }\
shreeshas95 1:a0055b3280c8 289 write_data;\
shreeshas95 1:a0055b3280c8 290 if(sent_tmfrom_SDcard){\
krishanprajapat 148:46763854fa83 291 send_tm_from_SD_card_fun();\
krishanprajapat 148:46763854fa83 292 }else{\
krishanprajapat 148:46763854fa83 293 snd_tm.transmit_data(buffer_112,&last_buffer);\
krishanprajapat 148:46763854fa83 294 }\
krishanprajapat 148:46763854fa83 295 write_data;\
krishanprajapat 148:46763854fa83 296 if(sent_tmfrom_SDcard){\
ee12b079 95:42d6747900cb 297 send_tm_from_SD_card_fun();\
shreeshas95 1:a0055b3280c8 298 }else{\
shreeshas95 1:a0055b3280c8 299 snd_tm.transmit_data(buffer_112,&last_buffer);\
shreeshas95 1:a0055b3280c8 300 }\
shreeshas95 1:a0055b3280c8 301 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 302 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 303 spi.write(0xB1);\
shreeshas95 1:a0055b3280c8 304 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 305 wait_us(300);\
shreeshas95 1:a0055b3280c8 306 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 307 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 308 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 309 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 310 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 311 spi.write(0xB5);\
shreeshas95 1:a0055b3280c8 312 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 313 wait_us(300);\
shreeshas95 1:a0055b3280c8 314 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 315 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 316 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 317 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 318 SPI_mutex.unlock();\
aniruddhv 52:0bd68655c651 319 /*ticker.attach_us(&check,32000);*/\
shreeshas95 1:a0055b3280c8 320 }
ee12b079 9:e9eaada136c6 321
aniruddhv 52:0bd68655c651 322 #define configure_adf {\
aniruddhv 52:0bd68655c651 323 finish_write_data = false;\
aniruddhv 52:0bd68655c651 324 buffer_state = true;\
aniruddhv 52:0bd68655c651 325 last_buffer = false;\
aniruddhv 52:0bd68655c651 326 loop_on = true;\
aniruddhv 52:0bd68655c651 327 ADF_off = false;\
aniruddhv 52:0bd68655c651 328 initial_adf_check;\
ee12b079 165:60a4a23131a3 329 bbram_write;\
ee12b079 165:60a4a23131a3 330 bbram_check;\
aniruddhv 69:20f09a0c3fd2 331 /*gPC.puts("initial adf check\r\n");*/\
aniruddhv 52:0bd68655c651 332 initiate;\
ee12b079 165:60a4a23131a3 333 gCS_ADF=0;\
ee12b079 165:60a4a23131a3 334 spi.write(0xBB);\
ee12b079 165:60a4a23131a3 335 gCS_ADF=1;\
ee12b079 165:60a4a23131a3 336 wait_ms(1);\
aniruddhv 69:20f09a0c3fd2 337 /*gPC.puts("adf configured\r\n");*/\
ee12b079 96:4ca92f9775e0 338 /*gLEDR = !gLEDR;*/\
ee12b079 9:e9eaada136c6 339 }
ee12b079 9:e9eaada136c6 340
ee12b079 95:42d6747900cb 341 #define transmit_adf {\
aniruddhv 52:0bd68655c651 342 configure_adf;\
ee12b079 95:42d6747900cb 343 if(sent_tmfrom_SDcard)\
ee12b079 95:42d6747900cb 344 signal = COM_MNG_TMTC_SIGNAL_ADF_SD;\
ee12b079 95:42d6747900cb 345 else signal = COM_MNG_TMTC_SIGNAL_ADF_NSD;\
aniruddhv 52:0bd68655c651 346 send_data;\
aniruddhv 52:0bd68655c651 347 while(loop_on){\
aniruddhv 52:0bd68655c651 348 wait_ms(COM_TX_TICKER_LIMIT);\
aniruddhv 69:20f09a0c3fd2 349 if(IRQ || bypass_adf){\
aniruddhv 52:0bd68655c651 350 if(finish_write_data){\
aniruddhv 52:0bd68655c651 351 if(ADF_off){\
aniruddhv 52:0bd68655c651 352 SPI_mutex.lock();\
aniruddhv 52:0bd68655c651 353 gCS_ADF=0;\
aniruddhv 52:0bd68655c651 354 spi.write(0xB1);\
aniruddhv 52:0bd68655c651 355 gCS_ADF=1;\
aniruddhv 52:0bd68655c651 356 SPI_mutex.unlock();\
aniruddhv 52:0bd68655c651 357 loop_on = false;\
ee12b079 95:42d6747900cb 358 gPC.puts("Transmission done\r\n");\
ee12b079 96:4ca92f9775e0 359 gLEDR = 1;\
aniruddhv 52:0bd68655c651 360 }\
aniruddhv 52:0bd68655c651 361 else{\
aniruddhv 52:0bd68655c651 362 ADF_off = true;\
aniruddhv 52:0bd68655c651 363 }\
ee12b079 96:4ca92f9775e0 364 }else{\
ee12b079 161:a63672bf4423 365 gLEDG = !gLEDG;\
aniruddhv 52:0bd68655c651 366 write_data;\
ee12b079 95:42d6747900cb 367 if(sent_tmfrom_SDcard)\
ee12b079 95:42d6747900cb 368 send_tm_from_SD_card_fun();\
ee12b079 95:42d6747900cb 369 else snd_tm.transmit_data(buffer_112,&last_buffer);\
aniruddhv 52:0bd68655c651 370 }\
aniruddhv 52:0bd68655c651 371 }\
aniruddhv 52:0bd68655c651 372 }\
aniruddhv 69:20f09a0c3fd2 373 /*gPC.puts("after while loop\r\n");*/\
ee12b079 88:b9beee1a7a3e 374 }
ee12b079 88:b9beee1a7a3e 375