CDMS code for testing sbc

Dependencies:   FreescaleIAP SimpleDMA mbed-rtos mbed

Fork of CDMS_CODE by shubham c

Committer:
chaithanyarss
Date:
Wed Jun 29 13:59:21 2016 +0000
Revision:
192:2c7263530c57
Parent:
160:ef280e6dda44
Child:
206:fba4aeebf004
SD card finalized code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shreeshas95 0:f016e9e8d48b 1 // **************DEFINITIONS*********************
aniruddhv 69:20f09a0c3fd2 2
ee12b079 133:56d37aa8a011 3 #define bypass_adf 1
aniruddhv 69:20f09a0c3fd2 4
shreeshas95 0:f016e9e8d48b 5 // COM_RX
shreeshas95 5:ab276a17ca07 6 #define RX_TIMEOUT_LIMIT 0.5
ee12b079 81:1a39e9e14771 7 //#define COM_RX_UART_TX PTE20 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_TX USBTX
ee12b079 81:1a39e9e14771 8 //#define COM_RX_UART_RX PTE21 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_RX USBRX
ee12b079 81:1a39e9e14771 9
ee12b079 81:1a39e9e14771 10 #define COM_RX_UART_TX USBTX
ee12b079 81:1a39e9e14771 11 #define COM_RX_UART_RX USBRX
aniruddhv 56:a88e16f6c18e 12
shreeshas95 0:f016e9e8d48b 13 // COMMON SPI
chaithanyarss 192:2c7263530c57 14 #define SPI_MOSI PTD6
chaithanyarss 192:2c7263530c57 15 #define SPI_MISO PTD7
chaithanyarss 192:2c7263530c57 16 #define SPI_CLK PTD5
shreeshas95 1:a0055b3280c8 17 #define SPI_CS_ADF PTA15
chaithanyarss 192:2c7263530c57 18 #define SPI_CS_SDC PTD4
ee12b079 114:9fb55057b13f 19 #define SPI_CS_RTC PIN26
shreeshas95 2:2caf2a9a13aa 20
shreeshas95 4:104dd82c99b8 21 // COM_TX
shreeshas95 4:104dd82c99b8 22 #define COM_TX_CONFIG_LIMIT 3
aniruddhv 52:0bd68655c651 23 #define COM_TX_TICKER_LIMIT 32
shreeshas95 4:104dd82c99b8 24
aniruddhv 137:489a93a04d6b 25 // ADF INTERRUPT
shreeshas95 2:2caf2a9a13aa 26 #define ADF_IRQ PTA14
shreeshas95 0:f016e9e8d48b 27
shreeshas95 0:f016e9e8d48b 28 // TC LIST
shreeshas95 2:2caf2a9a13aa 29 #define TCL_STATE_INCOMPLETE 0x00
shreeshas95 5:ab276a17ca07 30 #define TCL_STATE_ABORTED 0x03
shreeshas95 5:ab276a17ca07 31 #define TCL_STATE_EXECUTING 0x04
shreeshas95 5:ab276a17ca07 32 #define TCL_STATE_COMPLETED 0x05
shreeshas95 5:ab276a17ca07 33 #define TCL_STATE_EXCEEDED_LIMIT 0x06
shreeshas95 0:f016e9e8d48b 34
shreeshas95 0:f016e9e8d48b 35 // LIST OF FLAGS
shreeshas95 2:2caf2a9a13aa 36 #define UART_INT_FLAG 0x0001
shreeshas95 2:2caf2a9a13aa 37 #define NEW_TC_RECEIVED 0x0002
shreeshas95 2:2caf2a9a13aa 38 #define COM_SESSION_FLAG 0x0004
shreeshas95 2:2caf2a9a13aa 39 #define COM_RX_FLAG 0x0008
shreeshas95 2:2caf2a9a13aa 40 #define COM_MNG_TMTC_RUNNING_FLAG 0x0010
shreeshas95 2:2caf2a9a13aa 41 #define COM_SESSION_VALIDITY 0x0020
shreeshas95 2:2caf2a9a13aa 42 #define ALL_CRC_PASS_FLAG 0x0040
shreeshas95 2:2caf2a9a13aa 43 #define COM_PA_HOT_FLAG 0x0080
shreeshas95 2:2caf2a9a13aa 44 #define COM_TX_FLAG 0x0100
shreeshas95 6:79d422d1ed42 45 #define COM_SESSION_TIMEOUT_FLAG 0x0200
aniruddhv 137:489a93a04d6b 46 #define COM_AUTO_POWER_OFF_BAE_FLAG 0x0400
aniruddhv 137:489a93a04d6b 47 #define BAE_SW_EN_FLAG 0x0800
aniruddhv 137:489a93a04d6b 48 #define RF_SW_STATUS_FLAG 0x1000
aniruddhv 137:489a93a04d6b 49 #define COM_INIT_STATUS_FLAG 0x2000
aniruddhv 155:ca7365c03fd7 50 #define COM_TX_STATUS_FLAG 0x4000
aniruddhv 137:489a93a04d6b 51
aniruddhv 137:489a93a04d6b 52 //RF relay STATUS
aniruddhv 137:489a93a04d6b 53 #define RF_COM_TX 0
aniruddhv 137:489a93a04d6b 54 #define RF_BCN 1
shreeshas95 0:f016e9e8d48b 55
shreeshas95 0:f016e9e8d48b 56 // COM_MNG_TMTC THREAD
shreeshas95 6:79d422d1ed42 57 #define SESSION_TIME_LIMIT 1500
shreeshas95 0:f016e9e8d48b 58 #define COM_MNG_TMTC_SIGNAL_UART_INT 0x01
shreeshas95 0:f016e9e8d48b 59 #define COM_MNG_TMTC_SIGNAL_ADF_NSD 0x02
shreeshas95 0:f016e9e8d48b 60 #define COM_MNG_TMTC_SIGNAL_ADF_SD 0x03
ee12b079 93:4d76de54a699 61 #define SCIENCE_SIGNAL 0x04
shreeshas95 0:f016e9e8d48b 62 // COM_MNG_TMTC
shreeshas95 2:2caf2a9a13aa 63 #define COM_PA_COOLING_TIME_LIMIT 20
shreeshas95 4:104dd82c99b8 64 #define COM_MAX_TC_LIMIT 200
shreeshas95 4:104dd82c99b8 65 #define TM_ACK_CODE_INDEX 2
shreeshas95 5:ab276a17ca07 66 #define CRC_FAIL_NACK_CODE 0x01
shreeshas95 2:2caf2a9a13aa 67
shreeshas95 2:2caf2a9a13aa 68 // call sign
shreeshas95 2:2caf2a9a13aa 69 #define PSC_CALLSIGN 0x00
shreeshas95 2:2caf2a9a13aa 70 #define APID_CALLSIGN 0x00
shreeshas95 2:2caf2a9a13aa 71
shreeshas95 2:2caf2a9a13aa 72 // max value of telecommands in a tcl
shreeshas95 2:2caf2a9a13aa 73 #define TCL_OVERFLOW_CONSTANT 256
shreeshas95 4:104dd82c99b8 74 #define TM_OVERFLOW_CONSTANT 256
shreeshas95 2:2caf2a9a13aa 75
shreeshas95 0:f016e9e8d48b 76 // starting value of packet sequence count at each pass
shreeshas95 0:f016e9e8d48b 77 #define PSC_START_VALUE 1
shreeshas95 0:f016e9e8d48b 78
shreeshas95 0:f016e9e8d48b 79 // APID list
aniruddhv 52:0bd68655c651 80 #define APID_COM 0
shreeshas95 0:f016e9e8d48b 81 #define APID_BAE 1
shreeshas95 0:f016e9e8d48b 82 #define APID_CDMS 2
shreeshas95 0:f016e9e8d48b 83 #define APID_SPEED 3
shreeshas95 0:f016e9e8d48b 84
aniruddhv 52:0bd68655c651 85 //SERVICE
aniruddhv 52:0bd68655c651 86 #define SERVICE_OBOSC 0xB
aniruddhv 52:0bd68655c651 87 #define SERVICE_OBSRS 0xF
aniruddhv 52:0bd68655c651 88
shreeshas95 0:f016e9e8d48b 89 // HIGH PRIORITY TC - priority list
shreeshas95 0:f016e9e8d48b 90 // not correct values here
shreeshas95 0:f016e9e8d48b 91 #define HPTC1 5
shreeshas95 0:f016e9e8d48b 92 #define HPTC2 6
shreeshas95 0:f016e9e8d48b 93 // Add more entries above
shreeshas95 0:f016e9e8d48b 94
shreeshas95 0:f016e9e8d48b 95 // SIZE of tc in bytes
shreeshas95 0:f016e9e8d48b 96 #define TC_SHORT_SIZE 11
shreeshas95 0:f016e9e8d48b 97 #define TC_LONG_SIZE 135
shreeshas95 0:f016e9e8d48b 98
shreeshas95 0:f016e9e8d48b 99 // TMID list
shreeshas95 0:f016e9e8d48b 100 #define TMID_ACK_L1 0xA
shreeshas95 4:104dd82c99b8 101 #define TMID_ACK_L234 0xB
shreeshas95 4:104dd82c99b8 102 #define TMID_TCL 0x7
shreeshas95 4:104dd82c99b8 103 #define TMID_CALL_SIGN 0xE
shreeshas95 0:f016e9e8d48b 104
shreeshas95 0:f016e9e8d48b 105 // OBOSC SERVICE SUBTYPE
shreeshas95 4:104dd82c99b8 106 #define OBOSC_TCL_MAX_SHORT_SIZE 11
shreeshas95 4:104dd82c99b8 107 #define OBOSC_LONG_TC_FIRST_HALF_SIZE 67
shreeshas95 4:104dd82c99b8 108 #define OBOSC_LONG_TC_SECOND_HALF_SIZE 68
shreeshas95 4:104dd82c99b8 109 #define OBOSC_TCL_TAG_LONG_FIRST_HALF 0x10
shreeshas95 4:104dd82c99b8 110 #define OBOSC_TCL_TAG_LONG_SECOND_HALF 0x11
shreeshas95 4:104dd82c99b8 111
shreeshas95 0:f016e9e8d48b 112 #define OBOSC_SUB_DISABLE 0x01
shreeshas95 0:f016e9e8d48b 113 #define OBOSC_SUB_RETRY 0x05
shreeshas95 4:104dd82c99b8 114 #define OBOSC_SUB_REP_TCLD 0x06
shreeshas95 0:f016e9e8d48b 115 #define OBOSC_SUB_REP_LE 0x0F
shreeshas95 0:f016e9e8d48b 116 #define OBOSC_SUB_RESET 0x07
shreeshas95 0:f016e9e8d48b 117
shreeshas95 101:bece931236a2 118 // PAYLOAD or SCIENCE
shreeshas95 101:bece931236a2 119 #define PAYLOAD_BUFFER_LENGTH 6723
ee12b079 113:b8991d9e3b6c 120 #define PAY_SPI_MOSI PTE18
ee12b079 113:b8991d9e3b6c 121 #define PAY_SPI_MISO PTE19
ee12b079 113:b8991d9e3b6c 122 #define PAY_SPI_CLK PTE17
ee12b079 113:b8991d9e3b6c 123 #define PAY_SPI_CS PTE16
aniruddhv 144:4c20fcc105ce 124
aniruddhv 144:4c20fcc105ce 125 //BEACON
aniruddhv 144:4c20fcc105ce 126 #define BCN_APID_SOURCE 0x41
aniruddhv 144:4c20fcc105ce 127 #define BCN_SERVICE 0x81
shreeshas95 101:bece931236a2 128
aniruddhv 144:4c20fcc105ce 129 //BAE
aniruddhv 144:4c20fcc105ce 130 #define BAE_APID_SOURCE 0x81
aniruddhv 144:4c20fcc105ce 131 #define BAE_SERVICE 0x81
aniruddhv 144:4c20fcc105ce 132 #define BAE_POWER_ON_PID 0x13
aniruddhv 144:4c20fcc105ce 133 #define BAE_POWER_OFF_PID 0x23
aniruddhv 144:4c20fcc105ce 134 #define BAE_RESET_PID 0x33
aniruddhv 144:4c20fcc105ce 135
aniruddhv 144:4c20fcc105ce 136 //RF RELAY
aniruddhv 144:4c20fcc105ce 137 #define RF_RELAY_CNTRL_TX PTA7
aniruddhv 144:4c20fcc105ce 138 #define RF_RELAY_CNTRL_BCN PTA12
shreeshas95 3:6c81fc8834e2 139
chaithanyarss 192:2c7263530c57 140 //CDMS HK
chaithanyarss 192:2c7263530c57 141 #define COMRX_ALIVE 0xFF;
chaithanyarss 192:2c7263530c57 142 #define COMRX_DEAD 0x00;
chaithanyarss 192:2c7263530c57 143 #define DEVICE_ENABLED 0x00;
chaithanyarss 192:2c7263530c57 144 #define DEVICE_POWERED 0x01;
chaithanyarss 192:2c7263530c57 145 #define DEVICE_OC_FAULT 0x02;
chaithanyarss 192:2c7263530c57 146 #define DEVICE_DISABLED 0x03;
chaithanyarss 192:2c7263530c57 147
shreeshas95 0:f016e9e8d48b 148 // ****************GLOBAL VARIABLES******************
shreeshas95 0:f016e9e8d48b 149 // DEBUG
shreeshas95 0:f016e9e8d48b 150 Serial gPC( USBTX, USBRX );
shreeshas95 4:104dd82c99b8 151 DigitalOut gLEDR(LED_RED);
shreeshas95 4:104dd82c99b8 152 DigitalOut gLEDG(LED_GREEN);
shreeshas95 0:f016e9e8d48b 153
shreeshas95 0:f016e9e8d48b 154 // COM_RX
shreeshas95 0:f016e9e8d48b 155 RawSerial RX1M( COM_RX_UART_TX, COM_RX_UART_RX );
shreeshas95 0:f016e9e8d48b 156 COM_RX_DATA_NODE *gRX_HEAD_DATA_NODE = NULL;
shreeshas95 0:f016e9e8d48b 157 COM_RX_DATA_NODE *gRX_CURRENT_DATA_NODE = NULL;
shreeshas95 2:2caf2a9a13aa 158 // uint8_t *gRX_CURRENT_PTR = NULL;
shreeshas95 0:f016e9e8d48b 159 uint32_t gRX_COUNT = 0;
shreeshas95 0:f016e9e8d48b 160 uint16_t gTOTAL_INCORRECT_SIZE_TC = 0x00;
shreeshas95 0:f016e9e8d48b 161 uint16_t gTOTAL_CRC_FAIL_TC = 0x00;
shreeshas95 2:2caf2a9a13aa 162 uint16_t gTOTAL_REPEATED_TC = 0x00;
shreeshas95 0:f016e9e8d48b 163
shreeshas95 0:f016e9e8d48b 164 // COMMON SPI
shreeshas95 0:f016e9e8d48b 165 SPI spi( SPI_MOSI, SPI_MISO, SPI_CLK );
shreeshas95 1:a0055b3280c8 166 DigitalOut gCS_ADF(SPI_CS_ADF);
ee12b079 86:a26f5f22631d 167 DigitalOut cs_sd(SPI_CS_SDC);
shreeshas95 2:2caf2a9a13aa 168 DigitalOut gCS_RTC(SPI_CS_RTC);
shreeshas95 0:f016e9e8d48b 169 Mutex SPI_mutex;
shreeshas95 0:f016e9e8d48b 170
aniruddhv 144:4c20fcc105ce 171 //RF Relay
aniruddhv 144:4c20fcc105ce 172 DigitalOut RF_SW_CNTRL_BCN(RF_RELAY_CNTRL_BCN);
aniruddhv 144:4c20fcc105ce 173 DigitalOut RF_SW_CNTRL_TX(RF_RELAY_CNTRL_TX);
aniruddhv 144:4c20fcc105ce 174
aniruddhv 155:ca7365c03fd7 175 //COM_RX
aniruddhv 155:ca7365c03fd7 176 DigitalOut COM_RX_CNTRL(PIN72);
aniruddhv 155:ca7365c03fd7 177 DigitalOut COM_TX_CNTRL(PIN56);
aniruddhv 144:4c20fcc105ce 178
shreeshas95 0:f016e9e8d48b 179 // TC LIST
shreeshas95 0:f016e9e8d48b 180 Base_tc* gHEAD_NODE_TCL = NULL;
shreeshas95 0:f016e9e8d48b 181 Base_tc* gLAST_NODE_TCL = NULL;
shreeshas95 2:2caf2a9a13aa 182 uint8_t gMASTER_STATE = TCL_STATE_INCOMPLETE;
shreeshas95 2:2caf2a9a13aa 183 uint16_t gFLAGS = 0x0000;
shreeshas95 0:f016e9e8d48b 184
shreeshas95 0:f016e9e8d48b 185 // COM_MNG_TMTC THREAD
shreeshas95 0:f016e9e8d48b 186 Thread* gCOM_MNG_TMTC_THREAD = NULL;
shreeshas95 0:f016e9e8d48b 187 Timeout gRX_TIMEOUT;
shreeshas95 0:f016e9e8d48b 188 Timeout gSESSION_TIMEOUT;
shreeshas95 0:f016e9e8d48b 189
shreeshas95 0:f016e9e8d48b 190 // COM_MNG_TMTC
shreeshas95 2:2caf2a9a13aa 191
aniruddhv 144:4c20fcc105ce 192
aniruddhv 144:4c20fcc105ce 193
shreeshas95 2:2caf2a9a13aa 194 // PA cooling timeout
shreeshas95 4:104dd82c99b8 195 Timeout gCOM_PA_COOLING_TIMEOUT;
shreeshas95 2:2caf2a9a13aa 196
shreeshas95 2:2caf2a9a13aa 197 // GS code for verification
aniruddhv 37:c9a739750806 198 const uint8_t gGSCODE[] = {0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
shreeshas95 2:2caf2a9a13aa 199
shreeshas95 0:f016e9e8d48b 200 uint8_t gTOTAL_VALID_TC = 0x00;
shreeshas95 0:f016e9e8d48b 201 // USE LAST_L1_ACK FOR GENERATING REPORT
shreeshas95 4:104dd82c99b8 202 uint8_t gLAST_TM[TM_LONG_SIZE];
shreeshas95 4:104dd82c99b8 203 uint8_t gLAST_TM_SHORT_OR_LONG = SHORT_TM_CODE;
shreeshas95 3:6c81fc8834e2 204
shreeshas95 101:bece931236a2 205 // PAYLOAD OR SCIENCE_THREAD
shreeshas95 3:6c81fc8834e2 206 Thread* gSCIENCE_THREAD = NULL;
shreeshas95 101:bece931236a2 207 dmaSPISlave gPAY_SPI(PAY_SPI_MOSI, PAY_SPI_MISO, PAY_SPI_CLK, PAY_SPI_CS);
shreeshas95 4:104dd82c99b8 208 uint8_t gPAYLOAD_BUFFER[PAYLOAD_BUFFER_LENGTH];
shreeshas95 4:104dd82c99b8 209
shreeshas95 4:104dd82c99b8 210 // CALL SIGN TM
shreeshas95 103:b55559925dc1 211 const uint8_t gCALL_SIGN_STRING[TM_SHORT_SIZE] = {0xE0, 0x00, 0x00, 0x00, 0x56, 0x55, 0x32, 0x4E, 0x43, 0x46, 0x00, 0xAC, 0x11};
shreeshas95 103:b55559925dc1 212
shreeshas95 103:b55559925dc1 213 // CDMS HK
chaithanyarss 192:2c7263530c57 214 uint8_t CDMS_HEALTH_DATA[134];
chaithanyarss 192:2c7263530c57 215 uint8_t CDMS_RAM[59];
chaithanyarss 192:2c7263530c57 216 uint16_t GPIO_STATUS;
chaithanyarss 192:2c7263530c57 217 uint8_t CDMS_HK_MAIN_STATUS;
chaithanyarss 192:2c7263530c57 218 uint16_t CDMS_HK_MAIN_COUNTER;
chaithanyarss 192:2c7263530c57 219 uint8_t COMRX_STATUS;
chaithanyarss 192:2c7263530c57 220 uint16_t COMRX_RESET_COUNTER;
chaithanyarss 192:2c7263530c57 221 uint8_t RTC_FAULTCOUNT;
chaithanyarss 192:2c7263530c57 222 uint16_t SD_FAULTCOUNT;
chaithanyarss 192:2c7263530c57 223 uint8_t SD_STATUS;
chaithanyarss 192:2c7263530c57 224 uint8_t BAE_FAULTCOUNT;
chaithanyarss 192:2c7263530c57 225 uint8_t BAE_STATUS;
chaithanyarss 192:2c7263530c57 226 uint8_t PL_STATUS;
chaithanyarss 192:2c7263530c57 227 uint16_t PL_FAULTCOUNT;
chaithanyarss 192:2c7263530c57 228 bool BAE_HK_I2C;
chaithanyarss 192:2c7263530c57 229 uint8_t RTC_STATUS;
chaithanyarss 192:2c7263530c57 230 uint32_t CDMS_HK_FSC;
chaithanyarss 192:2c7263530c57 231 uint32_t BAE_HK_FSC;
chaithanyarss 192:2c7263530c57 232 float RSSI_volatge;
chaithanyarss 192:2c7263530c57 233
shreeshas95 103:b55559925dc1 234 CDMS_HK_actual actual_data;
shreeshas95 103:b55559925dc1 235 CDMS_HK_quant quant_data;
shreeshas95 103:b55559925dc1 236 CDMS_HK_min_max min_max_data;
chaithanyarss 192:2c7263530c57 237 bool firstCount=true;
chaithanyarss 192:2c7263530c57 238
chaithanyarss 192:2c7263530c57 239 //SD HK
chaithanyarss 192:2c7263530c57 240 uint32_t FSC_CURRENT[6];
chaithanyarss 192:2c7263530c57 241 uint32_t FSC_LAST[6];