shubham c / Mbed 2 deprecated SBC_TEST_CDMS_CODE

CDMS code for testing sbc

Dependencies:   FreescaleIAP SimpleDMA mbed-rtos mbed

Fork of CDMS_CODE by shubham c

adf.h@261:1e54415b34d3, 2016-07-14 (annotated)

Committer:
chaithanyarss
Date:
Thu Jul 14 13:07:30 2016 +0000
Revision:
261:1e54415b34d3
Parent:
245:da9d1bd999da
Child:
266:ae588e75cfa4
Added thresholds in flash

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shreeshas95 1:a0055b3280c8 1 //without reset feature , with state checks.
ee12b079 172:c508bbf7e89a 2 InterruptIn IRQ(ADF_IRQ);
aniruddhv 52:0bd68655c651 3 //Ticker ticker;
ee12b079 176:a5bfe3ca60b1 4
shreeshas95 1:a0055b3280c8 5 bool loop_on;
shreeshas95 1:a0055b3280c8 6 bool ADF_off;
shreeshas95 1:a0055b3280c8 7 bool buffer_state;
ee12b079 9:e9eaada136c6 8 bool finish_write_data;
shreeshas95 1:a0055b3280c8 9 uint8_t signal = 0x00;
chaithanyarss 261:1e54415b34d3 10 unsigned char bbram_buffer[66]={0x19,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0xF4,0xC2,0x10,0xC0,0x00,0x30,0x31,0x07,0x00,0x01,0x00,0x7F,0x00,0x0B,0x37,0x00,0x00,0x40,0x0C,0x00,0x05,0x00,0x00,0x18,0x12,0x34,0x56,0x10,0x10,0xC4,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x00};
ee12b079 9:e9eaada136c6 11
shreeshas95 2:2caf2a9a13aa 12 //int initialise_card();
shreeshas95 2:2caf2a9a13aa 13 //int disk_initialize();
chaithanyarss 261:1e54415b34d3 14
chaithanyarss 261:1e54415b34d3 15 #define bbram_write {\
chaithanyarss 261:1e54415b34d3 16 SPI_mutex.lock();\
chaithanyarss 261:1e54415b34d3 17 gCS_ADF=0;\
chaithanyarss 261:1e54415b34d3 18 spi.write(0xB0);\
chaithanyarss 261:1e54415b34d3 19 wait_us(300);\
chaithanyarss 261:1e54415b34d3 20 gCS_ADF=1;\
chaithanyarss 261:1e54415b34d3 21 gCS_ADF=0;\
chaithanyarss 261:1e54415b34d3 22 for(int i=0;i<66;i++){\
chaithanyarss 261:1e54415b34d3 23 spi.write(bbram_buffer[i]);\
chaithanyarss 261:1e54415b34d3 24 }\
chaithanyarss 261:1e54415b34d3 25 gCS_ADF=1;\
chaithanyarss 261:1e54415b34d3 26 SPI_mutex.unlock();\
chaithanyarss 261:1e54415b34d3 27 }
shreeshas95 1:a0055b3280c8 28 //------------------------------------------------------------------------
shreeshas95 1:a0055b3280c8 29 // state checking functions
shreeshas95 1:a0055b3280c8 30 //bool assrt_phy_off( int, int, int);
shreeshas95 1:a0055b3280c8 31 //bool assrt_phy_on( int,int,int);
shreeshas95 1:a0055b3280c8 32 //bool assrt_phy_tx(int,int,int);
ee12b079 9:e9eaada136c6 33
shreeshas95 1:a0055b3280c8 34 #define START_ADDRESS 0x020;
shreeshas95 1:a0055b3280c8 35 #define MISO_PIN PTE3
shreeshas95 1:a0055b3280c8 36 /**************Defining Counter Limits**************/
shreeshas95 1:a0055b3280c8 37 #define THRS 20
shreeshas95 1:a0055b3280c8 38 #define STATE_ERR_THRS 20
shreeshas95 1:a0055b3280c8 39 #define PHY_OFF_EXEC_TIME 300
shreeshas95 1:a0055b3280c8 40 #define PHY_ON_EXEC_TIME 300
shreeshas95 1:a0055b3280c8 41 #define PHY_TX_EXEC_TIME 600
shreeshas95 1:a0055b3280c8 42 /******DEFINING COMMANDS*********/
shreeshas95 1:a0055b3280c8 43 #define CMD_HW_RESET 0xC8
shreeshas95 1:a0055b3280c8 44 #define CMD_PHY_ON 0xB1
shreeshas95 1:a0055b3280c8 45 #define CMD_PHY_OFF 0xB0
shreeshas95 1:a0055b3280c8 46 #define CMD_PHY_TX 0xB5
shreeshas95 1:a0055b3280c8 47 #define CMD_CONFIG_DEV 0xBB
ee12b079 176:a5bfe3ca60b1 48
shreeshas95 1:a0055b3280c8 49 #define check_status {\
shreeshas95 1:a0055b3280c8 50 unsigned char stat=0;\
shreeshas95 1:a0055b3280c8 51 gCS_ADF=0;\
ee12b079 176:a5bfe3ca60b1 52 spi.write(0xFF);\
ee12b079 176:a5bfe3ca60b1 53 stat = spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 54 gCS_ADF=1;\
ee12b079 176:a5bfe3ca60b1 55 status = stat;\
shreeshas95 1:a0055b3280c8 56 }
chaithanyarss 261:1e54415b34d3 57
chaithanyarss 261:1e54415b34d3 58 // all three arguments are int
chaithanyarss 261:1e54415b34d3 59 #define assrt_phy_off(return_this) {\
chaithanyarss 261:1e54415b34d3 60 int cmd_err_cnt = 0;\
chaithanyarss 261:1e54415b34d3 61 int spi_err_cnt = 0;\
chaithanyarss 261:1e54415b34d3 62 int state_err_cnt = 0;\
chaithanyarss 261:1e54415b34d3 63 for(int i = 0 ; i < 40 ;i++){\
shreeshas95 1:a0055b3280c8 64 check_status;\
chaithanyarss 261:1e54415b34d3 65 if(status == 0xB1){\
chaithanyarss 261:1e54415b34d3 66 return_this = 0;\
chaithanyarss 261:1e54415b34d3 67 break;\
chaithanyarss 261:1e54415b34d3 68 }\
chaithanyarss 261:1e54415b34d3 69 else if(cmd_err_cnt>THRS||spi_err_cnt>THRS){\
chaithanyarss 261:1e54415b34d3 70 return_this = 1;\
chaithanyarss 261:1e54415b34d3 71 break;\
chaithanyarss 261:1e54415b34d3 72 }\
chaithanyarss 261:1e54415b34d3 73 else if(state_err_cnt>STATE_ERR_THRS){\
chaithanyarss 261:1e54415b34d3 74 return_this = 1;\
chaithanyarss 261:1e54415b34d3 75 break;\
chaithanyarss 261:1e54415b34d3 76 }\
chaithanyarss 261:1e54415b34d3 77 else if( (status & 0xA0) == 0xA0 ){\
ee12b079 245:da9d1bd999da 78 gCS_ADF=0;\
chaithanyarss 261:1e54415b34d3 79 spi.write(CMD_PHY_OFF);\
ee12b079 245:da9d1bd999da 80 gCS_ADF=1;\
chaithanyarss 261:1e54415b34d3 81 wait_us(PHY_OFF_EXEC_TIME);\
chaithanyarss 261:1e54415b34d3 82 state_err_cnt++;\
chaithanyarss 261:1e54415b34d3 83 }\
chaithanyarss 261:1e54415b34d3 84 else if(status&0x80==0x00){\
chaithanyarss 261:1e54415b34d3 85 wait_ms(5);\
chaithanyarss 261:1e54415b34d3 86 spi_err_cnt++;\
chaithanyarss 261:1e54415b34d3 87 }\
chaithanyarss 261:1e54415b34d3 88 else {\
chaithanyarss 261:1e54415b34d3 89 wait_ms(1);\
ee12b079 245:da9d1bd999da 90 cmd_err_cnt++;\
shreeshas95 1:a0055b3280c8 91 }\
ee12b079 245:da9d1bd999da 92 }\
ee12b079 245:da9d1bd999da 93 }
chaithanyarss 261:1e54415b34d3 94
chaithanyarss 261:1e54415b34d3 95
chaithanyarss 261:1e54415b34d3 96 #define initial_adf_check {\
chaithanyarss 261:1e54415b34d3 97 spi.write(CMD_PHY_OFF);\
chaithanyarss 261:1e54415b34d3 98 int tempReturn = 0;\
chaithanyarss 261:1e54415b34d3 99 bool flag = false;\
chaithanyarss 261:1e54415b34d3 100 while( hw_reset_err_cnt < 2 ){\
chaithanyarss 261:1e54415b34d3 101 assrt_phy_off( tempReturn);\
chaithanyarss 261:1e54415b34d3 102 if( !tempReturn ){\
chaithanyarss 261:1e54415b34d3 103 bbram_write;\
chaithanyarss 261:1e54415b34d3 104 bbram_flag=1;\
chaithanyarss 261:1e54415b34d3 105 flag = true;\
chaithanyarss 261:1e54415b34d3 106 break;\
shreeshas95 1:a0055b3280c8 107 }\
chaithanyarss 261:1e54415b34d3 108 else{\
chaithanyarss 261:1e54415b34d3 109 hardware_reset(0);\
chaithanyarss 261:1e54415b34d3 110 hw_reset_err_cnt++;\
chaithanyarss 261:1e54415b34d3 111 gPC.puts("Resetting hardware\r\n");\
shreeshas95 1:a0055b3280c8 112 }\
shreeshas95 1:a0055b3280c8 113 }\
chaithanyarss 261:1e54415b34d3 114 if( flag == false ){\
chaithanyarss 261:1e54415b34d3 115 gPC.puts("Seems to be SPI problem\r\n");\
chaithanyarss 261:1e54415b34d3 116 }\
chaithanyarss 261:1e54415b34d3 117 assrt_phy_off(tempReturn);\
chaithanyarss 261:1e54415b34d3 118 if(!bbram_flag){\
chaithanyarss 261:1e54415b34d3 119 bcn_flag=1;\
chaithanyarss 261:1e54415b34d3 120 }\
shreeshas95 1:a0055b3280c8 121 }
chaithanyarss 261:1e54415b34d3 122
chaithanyarss 261:1e54415b34d3 123 unsigned char status =0;
chaithanyarss 261:1e54415b34d3 124 unsigned int cmd_err_cnt=0;
chaithanyarss 261:1e54415b34d3 125 unsigned int state_err_cnt=0;
chaithanyarss 261:1e54415b34d3 126 unsigned int miso_err_cnt=0;
chaithanyarss 261:1e54415b34d3 127 unsigned int hw_reset_err_cnt=0;
chaithanyarss 261:1e54415b34d3 128 bool bcn_flag=0;
chaithanyarss 261:1e54415b34d3 129 bool bbram_flag=0;
chaithanyarss 261:1e54415b34d3 130
chaithanyarss 261:1e54415b34d3 131 bool hardware_reset(int bcn_call){
chaithanyarss 261:1e54415b34d3 132 for(int i= 0; i < 20 ; i++){
shreeshas95 1:a0055b3280c8 133 gCS_ADF=0;
shreeshas95 1:a0055b3280c8 134 spi.write(CMD_HW_RESET);
shreeshas95 1:a0055b3280c8 135 gCS_ADF=1;
shreeshas95 1:a0055b3280c8 136 wait_ms(2);// Typically 1 ms
shreeshas95 1:a0055b3280c8 137 int count=0;
chaithanyarss 261:1e54415b34d3 138 int temp_return = 0;
chaithanyarss 261:1e54415b34d3 139 while(count<10 && miso_err_cnt<10){
chaithanyarss 261:1e54415b34d3 140 if(MISO_PIN){
chaithanyarss 261:1e54415b34d3 141 assrt_phy_off(temp_return);
shreeshas95 1:a0055b3280c8 142 if(!temp_return){
shreeshas95 1:a0055b3280c8 143 return 0;
shreeshas95 1:a0055b3280c8 144 }
shreeshas95 1:a0055b3280c8 145 count++;
chaithanyarss 261:1e54415b34d3 146 }
chaithanyarss 261:1e54415b34d3 147 else{
shreeshas95 1:a0055b3280c8 148 wait_us(50);
shreeshas95 1:a0055b3280c8 149 miso_err_cnt++;
shreeshas95 1:a0055b3280c8 150 }
shreeshas95 1:a0055b3280c8 151 }
shreeshas95 1:a0055b3280c8 152 }
shreeshas95 1:a0055b3280c8 153 return 1;
shreeshas95 1:a0055b3280c8 154 }
chaithanyarss 261:1e54415b34d3 155
chaithanyarss 261:1e54415b34d3 156 //for reseting the transmission call assert function after b5 and b1. after b1 assert_phi_on and after b5 assert_phi_tx.
shreeshas95 1:a0055b3280c8 157 //----------------------------------------------------------------------------
chaithanyarss 261:1e54415b34d3 158
chaithanyarss 261:1e54415b34d3 159 # define initiate {\
chaithanyarss 261:1e54415b34d3 160 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 161 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 162 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 163 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 164 gCS_ADF=1;\
chaithanyarss 261:1e54415b34d3 165 gCS_ADF=0;\
chaithanyarss 261:1e54415b34d3 166 spi.write(0x08);\
chaithanyarss 261:1e54415b34d3 167 spi.write(0x14);\
chaithanyarss 261:1e54415b34d3 168 spi.write(0xFF);\
chaithanyarss 261:1e54415b34d3 169 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 170 gCS_ADF=0;\
chaithanyarss 261:1e54415b34d3 171 spi.write(0x08);\
chaithanyarss 261:1e54415b34d3 172 spi.write(0x15);\
chaithanyarss 261:1e54415b34d3 173 spi.write(0xFF);\
chaithanyarss 261:1e54415b34d3 174 gCS_ADF=1;\
chaithanyarss 261:1e54415b34d3 175 gCS_ADF=0;\
chaithanyarss 261:1e54415b34d3 176 spi.write(0x09);\
chaithanyarss 261:1e54415b34d3 177 spi.write(0x24);\
chaithanyarss 261:1e54415b34d3 178 spi.write(0x20);\
shreeshas95 1:a0055b3280c8 179 gCS_ADF=1;\
chaithanyarss 261:1e54415b34d3 180 gCS_ADF=0;\
chaithanyarss 261:1e54415b34d3 181 spi.write(0x09);\
chaithanyarss 261:1e54415b34d3 182 spi.write(0x37);\
chaithanyarss 261:1e54415b34d3 183 spi.write(0xE0);\
shreeshas95 1:a0055b3280c8 184 gCS_ADF=1;\
chaithanyarss 261:1e54415b34d3 185 gCS_ADF=0;\
chaithanyarss 261:1e54415b34d3 186 spi.write(0x09);\
chaithanyarss 261:1e54415b34d3 187 spi.write(0x36);\
chaithanyarss 261:1e54415b34d3 188 spi.write(0x70);\
chaithanyarss 261:1e54415b34d3 189 gCS_ADF=1;\
chaithanyarss 261:1e54415b34d3 190 gCS_ADF=0;\
chaithanyarss 261:1e54415b34d3 191 spi.write(0x09);\
chaithanyarss 261:1e54415b34d3 192 spi.write(0x39);\
chaithanyarss 261:1e54415b34d3 193 spi.write(0x10);\
chaithanyarss 261:1e54415b34d3 194 gCS_ADF=1;\
ee12b079 9:e9eaada136c6 195 gCS_ADF=0;\
ee12b079 9:e9eaada136c6 196 spi.write(0xBB);\
ee12b079 9:e9eaada136c6 197 gCS_ADF=1;\
ee12b079 9:e9eaada136c6 198 gCS_ADF=0;\
ee12b079 9:e9eaada136c6 199 spi.write(0xFF);\
ee12b079 9:e9eaada136c6 200 spi.write(0xFF);\
ee12b079 9:e9eaada136c6 201 gCS_ADF=1;\
chaithanyarss 261:1e54415b34d3 202 SPI_mutex.unlock();\
chaithanyarss 261:1e54415b34d3 203 }
chaithanyarss 261:1e54415b34d3 204
chaithanyarss 261:1e54415b34d3 205 #define write_data {\
chaithanyarss 261:1e54415b34d3 206 SPI_mutex.lock();\
chaithanyarss 261:1e54415b34d3 207 gCS_ADF=0;\
chaithanyarss 261:1e54415b34d3 208 spi.write(0x0B);\
chaithanyarss 261:1e54415b34d3 209 spi.write(0x36);\
chaithanyarss 261:1e54415b34d3 210 spi.write(0xFF);\
chaithanyarss 261:1e54415b34d3 211 gCS_ADF=1;\
chaithanyarss 261:1e54415b34d3 212 gCS_ADF=0;\
chaithanyarss 261:1e54415b34d3 213 if(buffer_state){\
chaithanyarss 261:1e54415b34d3 214 spi.write(0x18);\
chaithanyarss 261:1e54415b34d3 215 spi.write(0x20);\
chaithanyarss 261:1e54415b34d3 216 for(unsigned char i=0; i<112;i++){\
chaithanyarss 261:1e54415b34d3 217 if(bypass_adf)\
chaithanyarss 261:1e54415b34d3 218 gPC.putc(buffer_112[i]);\
chaithanyarss 261:1e54415b34d3 219 else\
chaithanyarss 261:1e54415b34d3 220 spi.write(buffer_112[i]);\
chaithanyarss 261:1e54415b34d3 221 /*gPC.printf("%02X",buffer_112[i])*/;\
chaithanyarss 261:1e54415b34d3 222 }\
chaithanyarss 261:1e54415b34d3 223 }\
chaithanyarss 261:1e54415b34d3 224 else{\
chaithanyarss 261:1e54415b34d3 225 spi.write(0x18);\
chaithanyarss 261:1e54415b34d3 226 spi.write(0x90);\
chaithanyarss 261:1e54415b34d3 227 for(unsigned char i=0; i<112;i++){\
chaithanyarss 261:1e54415b34d3 228 if(bypass_adf)\
chaithanyarss 261:1e54415b34d3 229 gPC.putc(buffer_112[i]);\
chaithanyarss 261:1e54415b34d3 230 else\
chaithanyarss 261:1e54415b34d3 231 spi.write(buffer_112[i]);\
chaithanyarss 261:1e54415b34d3 232 /*gPC.printf("%02X",buffer_112[i])*/;\
chaithanyarss 261:1e54415b34d3 233 }\
chaithanyarss 261:1e54415b34d3 234 }\
chaithanyarss 261:1e54415b34d3 235 gCS_ADF=1;\
chaithanyarss 261:1e54415b34d3 236 SPI_mutex.unlock();\
chaithanyarss 261:1e54415b34d3 237 buffer_state = !buffer_state;\
chaithanyarss 261:1e54415b34d3 238 if(last_buffer){\
chaithanyarss 261:1e54415b34d3 239 finish_write_data = true;\
chaithanyarss 261:1e54415b34d3 240 /*gPC.puts("adf_off\r\n");*/\
chaithanyarss 261:1e54415b34d3 241 }\
chaithanyarss 261:1e54415b34d3 242 }
chaithanyarss 261:1e54415b34d3 243
chaithanyarss 261:1e54415b34d3 244 /*
chaithanyarss 261:1e54415b34d3 245 void check(){
chaithanyarss 261:1e54415b34d3 246 if(IRQ){
chaithanyarss 261:1e54415b34d3 247 gCOM_MNG_TMTC_THREAD->signal_set(signal);
chaithanyarss 261:1e54415b34d3 248 }
chaithanyarss 261:1e54415b34d3 249 }*/
chaithanyarss 261:1e54415b34d3 250
chaithanyarss 261:1e54415b34d3 251
chaithanyarss 261:1e54415b34d3 252 #define send_data {\
chaithanyarss 261:1e54415b34d3 253 if(sent_tmfrom_SDcard){\
ee12b079 95:42d6747900cb 254 send_tm_from_SD_card_fun();\
shreeshas95 1:a0055b3280c8 255 }else{\
shreeshas95 1:a0055b3280c8 256 snd_tm.transmit_data(buffer_112,&last_buffer);\
shreeshas95 1:a0055b3280c8 257 }\
shreeshas95 1:a0055b3280c8 258 write_data;\
shreeshas95 1:a0055b3280c8 259 if(sent_tmfrom_SDcard){\
krishanprajapat 148:46763854fa83 260 send_tm_from_SD_card_fun();\
krishanprajapat 148:46763854fa83 261 }else{\
krishanprajapat 148:46763854fa83 262 snd_tm.transmit_data(buffer_112,&last_buffer);\
krishanprajapat 148:46763854fa83 263 }\
krishanprajapat 148:46763854fa83 264 write_data;\
krishanprajapat 148:46763854fa83 265 if(sent_tmfrom_SDcard){\
ee12b079 95:42d6747900cb 266 send_tm_from_SD_card_fun();\
shreeshas95 1:a0055b3280c8 267 }else{\
shreeshas95 1:a0055b3280c8 268 snd_tm.transmit_data(buffer_112,&last_buffer);\
shreeshas95 1:a0055b3280c8 269 }\
chaithanyarss 261:1e54415b34d3 270 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 271 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 272 spi.write(0xB1);\
shreeshas95 1:a0055b3280c8 273 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 274 wait_us(300);\
shreeshas95 1:a0055b3280c8 275 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 276 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 277 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 278 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 279 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 280 spi.write(0xB5);\
shreeshas95 1:a0055b3280c8 281 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 282 wait_us(300);\
shreeshas95 1:a0055b3280c8 283 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 284 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 285 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 286 gCS_ADF=1;\
chaithanyarss 261:1e54415b34d3 287 SPI_mutex.unlock();\
chaithanyarss 261:1e54415b34d3 288 /*ticker.attach_us(&check,32000);*/\
shreeshas95 1:a0055b3280c8 289 }
chaithanyarss 261:1e54415b34d3 290
aniruddhv 52:0bd68655c651 291 #define configure_adf {\
chaithanyarss 261:1e54415b34d3 292 finish_write_data = false;\
chaithanyarss 261:1e54415b34d3 293 buffer_state = true;\
chaithanyarss 261:1e54415b34d3 294 last_buffer = false;\
chaithanyarss 261:1e54415b34d3 295 loop_on = true;\
chaithanyarss 261:1e54415b34d3 296 ADF_off = false;\
aniruddhv 52:0bd68655c651 297 initial_adf_check;\
chaithanyarss 261:1e54415b34d3 298 gPC.puts("initial adf check\r\n");\
chaithanyarss 261:1e54415b34d3 299 initiate;\
chaithanyarss 261:1e54415b34d3 300 gPC.puts("adf configured\r\n");\
chaithanyarss 261:1e54415b34d3 301 /*gLEDR = !gLEDR;*/\
ee12b079 9:e9eaada136c6 302 }
ee12b079 9:e9eaada136c6 303
ee12b079 95:42d6747900cb 304 #define transmit_adf {\
aniruddhv 52:0bd68655c651 305 configure_adf;\
chaithanyarss 261:1e54415b34d3 306 if(sent_tmfrom_SDcard)\
chaithanyarss 261:1e54415b34d3 307 signal = COM_MNG_TMTC_SIGNAL_ADF_SD;\
chaithanyarss 261:1e54415b34d3 308 else signal = COM_MNG_TMTC_SIGNAL_ADF_NSD;\
aniruddhv 52:0bd68655c651 309 send_data;\
aniruddhv 52:0bd68655c651 310 while(loop_on){\
chaithanyarss 261:1e54415b34d3 311 wait_ms(COM_TX_TICKER_LIMIT);\
chaithanyarss 261:1e54415b34d3 312 if(IRQ || bypass_adf){\
chaithanyarss 261:1e54415b34d3 313 if(finish_write_data){\
chaithanyarss 261:1e54415b34d3 314 if(ADF_off){\
chaithanyarss 261:1e54415b34d3 315 SPI_mutex.lock();\
chaithanyarss 261:1e54415b34d3 316 gCS_ADF=0;\
chaithanyarss 261:1e54415b34d3 317 spi.write(0xB1);\
chaithanyarss 261:1e54415b34d3 318 gCS_ADF=1;\
chaithanyarss 261:1e54415b34d3 319 SPI_mutex.unlock();\
chaithanyarss 261:1e54415b34d3 320 loop_on = false;\
chaithanyarss 261:1e54415b34d3 321 gPC.puts("Transmission done\r\n");\
chaithanyarss 261:1e54415b34d3 322 gLEDR = 1;\
chaithanyarss 261:1e54415b34d3 323 }\
chaithanyarss 261:1e54415b34d3 324 else{\
chaithanyarss 261:1e54415b34d3 325 ADF_off = true;\
chaithanyarss 261:1e54415b34d3 326 }\
chaithanyarss 261:1e54415b34d3 327 }else{\
chaithanyarss 261:1e54415b34d3 328 gLEDG = !gLEDG;\
chaithanyarss 261:1e54415b34d3 329 write_data;\
chaithanyarss 261:1e54415b34d3 330 if(sent_tmfrom_SDcard)\
chaithanyarss 261:1e54415b34d3 331 send_tm_from_SD_card_fun();\
chaithanyarss 261:1e54415b34d3 332 else snd_tm.transmit_data(buffer_112,&last_buffer);\
chaithanyarss 261:1e54415b34d3 333 }\
aniruddhv 52:0bd68655c651 334 }\
aniruddhv 52:0bd68655c651 335 }\
aniruddhv 69:20f09a0c3fd2 336 /*gPC.puts("after while loop\r\n");*/\
chaithanyarss 261:1e54415b34d3 337 }