shubham c
/
Beacon_final_transmitter_2
For_bae_integration
main.cpp@0:15355bb24274, 2015-02-06 (annotated)
- Committer:
- ee12b079
- Date:
- Fri Feb 06 15:57:03 2015 +0000
- Revision:
- 0:15355bb24274
For_BAE_integration
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
ee12b079 | 0:15355bb24274 | 1 | //switch off the sync!!!!!!! |
ee12b079 | 0:15355bb24274 | 2 | //switch off the preamble!!!!!!! |
ee12b079 | 0:15355bb24274 | 3 | /*for crc in tx: |
ee12b079 | 0:15355bb24274 | 4 | regIrq2(0x28) : |
ee12b079 | 0:15355bb24274 | 5 | |
ee12b079 | 0:15355bb24274 | 6 | regpacketconfig 1(0x37) : |
ee12b079 | 0:15355bb24274 | 7 | set crc detection/calc. on : | 0x10 |
ee12b079 | 0:15355bb24274 | 8 | crcautoclearoff : | 0x08 |
ee12b079 | 0:15355bb24274 | 9 | |
ee12b079 | 0:15355bb24274 | 10 | for data whitening : regpacketconfig 1(0x37) :| 0x40 |
ee12b079 | 0:15355bb24274 | 11 | for |
ee12b079 | 0:15355bb24274 | 12 | //checked for wait insted of an interrupt |
ee12b079 | 0:15355bb24274 | 13 | |
ee12b079 | 0:15355bb24274 | 14 | |
ee12b079 | 0:15355bb24274 | 15 | */ |
ee12b079 | 0:15355bb24274 | 16 | // 6CC000 for 435 MHz |
ee12b079 | 0:15355bb24274 | 17 | //set all values as FF for checking on spectrum analyzer |
ee12b079 | 0:15355bb24274 | 18 | #include "beacon.h" |
ee12b079 | 0:15355bb24274 | 19 | //Serial pc(USBTX, USBRX); // tx, rx |
ee12b079 | 0:15355bb24274 | 20 | Serial pc(USBTX, USBRX); |
ee12b079 | 0:15355bb24274 | 21 | SPI spi(D11, D12, D13); // mosi, miso, sclk |
ee12b079 | 0:15355bb24274 | 22 | DigitalOut cs_bar(D10); //slave select or chip select |
ee12b079 | 0:15355bb24274 | 23 | //InterruptIn button(p9); |
ee12b079 | 0:15355bb24274 | 24 | //#define TIMES 16 |
ee12b079 | 0:15355bb24274 | 25 | //Timer t; |
ee12b079 | 0:15355bb24274 | 26 | |
ee12b079 | 0:15355bb24274 | 27 | /*void interrupt_func() |
ee12b079 | 0:15355bb24274 | 28 | { |
ee12b079 | 0:15355bb24274 | 29 | pc.printf("INTERRUPT_FUNC TRIGGERED\n wait for 3 secs\n"); |
ee12b079 | 0:15355bb24274 | 30 | wait_ms(800); |
ee12b079 | 0:15355bb24274 | 31 | |
ee12b079 | 0:15355bb24274 | 32 | }*/ |
ee12b079 | 0:15355bb24274 | 33 | void writereg(uint8_t reg,uint8_t val) |
ee12b079 | 0:15355bb24274 | 34 | { |
ee12b079 | 0:15355bb24274 | 35 | cs_bar = 0; |
ee12b079 | 0:15355bb24274 | 36 | spi.write(reg | 0x80); |
ee12b079 | 0:15355bb24274 | 37 | spi.write(val); |
ee12b079 | 0:15355bb24274 | 38 | cs_bar = 1; |
ee12b079 | 0:15355bb24274 | 39 | } |
ee12b079 | 0:15355bb24274 | 40 | uint8_t readreg(uint8_t reg) |
ee12b079 | 0:15355bb24274 | 41 | { |
ee12b079 | 0:15355bb24274 | 42 | uint8_t val; |
ee12b079 | 0:15355bb24274 | 43 | cs_bar = 0; |
ee12b079 | 0:15355bb24274 | 44 | spi.write(reg & ~0x80); |
ee12b079 | 0:15355bb24274 | 45 | val = spi.write(0); |
ee12b079 | 0:15355bb24274 | 46 | cs_bar = 1; |
ee12b079 | 0:15355bb24274 | 47 | return val; |
ee12b079 | 0:15355bb24274 | 48 | } |
ee12b079 | 0:15355bb24274 | 49 | |
ee12b079 | 0:15355bb24274 | 50 | main() { |
ee12b079 | 0:15355bb24274 | 51 | int n = 0; |
ee12b079 | 0:15355bb24274 | 52 | //button.rise(&interrupt_func); //interrupt enabled ( rising edge of pin 9) |
ee12b079 | 0:15355bb24274 | 53 | wait(0.02); // pl. update this value or even avoid it!!! |
ee12b079 | 0:15355bb24274 | 54 | //extract values from short_beacon[] |
ee12b079 | 0:15355bb24274 | 55 | uint8_t byte_counter = 0; |
ee12b079 | 0:15355bb24274 | 56 | struct Short_beacon{ |
ee12b079 | 0:15355bb24274 | 57 | uint8_t Voltage[1]; |
ee12b079 | 0:15355bb24274 | 58 | uint8_t AngularSpeed[2]; |
ee12b079 | 0:15355bb24274 | 59 | uint8_t SubsystemStatus[1]; |
ee12b079 | 0:15355bb24274 | 60 | uint8_t Temp[3]; |
ee12b079 | 0:15355bb24274 | 61 | uint8_t ErrorFlag[1]; |
ee12b079 | 0:15355bb24274 | 62 | }Shortbeacon = { {0x88}, {0x99, 0xAA} , {0xAA},{0xAA,0xDD,0xEE}, {0x00} }; |
ee12b079 | 0:15355bb24274 | 63 | |
ee12b079 | 0:15355bb24274 | 64 | //filling hk data |
ee12b079 | 0:15355bb24274 | 65 | //uint8_t short_beacon[] = { 0xAB, 0x8A, 0xE2, 0xBB, 0xB8, 0xA2, 0x8E,Shortbeacon.Voltage[0],Shortbeacon.AngularSpeed[0], Shortbeacon.AngularSpeed[1],Shortbeacon.SubsystemStatus[0],Shortbeacon.Temp[0],Shortbeacon.Temp[1],Shortbeacon.Temp[2],Shortbeacon.ErrorFlag[0]}; |
ee12b079 | 0:15355bb24274 | 66 | uint8_t short_beacon[] = { 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77,Shortbeacon.Voltage[0],Shortbeacon.AngularSpeed[0], Shortbeacon.AngularSpeed[1],Shortbeacon.SubsystemStatus[0],Shortbeacon.Temp[0],Shortbeacon.Temp[1],Shortbeacon.Temp[2],Shortbeacon.ErrorFlag[0]}; |
ee12b079 | 0:15355bb24274 | 67 | //mask |
ee12b079 | 0:15355bb24274 | 68 | //uint8_t mask[] = {0x80, 0x40, 0x20,0x10,0x8,0x4,0x2,0x1}; |
ee12b079 | 0:15355bb24274 | 69 | |
ee12b079 | 0:15355bb24274 | 70 | /*for(int i = 0; i < 15 ; i++) |
ee12b079 | 0:15355bb24274 | 71 | { |
ee12b079 | 0:15355bb24274 | 72 | pc.printf("0x%X\n",(short_beacon[i])); |
ee12b079 | 0:15355bb24274 | 73 | }*/ |
ee12b079 | 0:15355bb24274 | 74 | |
ee12b079 | 0:15355bb24274 | 75 | spi.format(8,0); |
ee12b079 | 0:15355bb24274 | 76 | spi.frequency(10000000); //10MHz SCLK frequency(its max for rfm69hcw) |
ee12b079 | 0:15355bb24274 | 77 | |
ee12b079 | 0:15355bb24274 | 78 | cs_bar = 1; // Chip must be deselected |
ee12b079 | 0:15355bb24274 | 79 | |
ee12b079 | 0:15355bb24274 | 80 | if (readreg(0x15) == 0xB0) pc.printf("spi connection valid\n"); |
ee12b079 | 0:15355bb24274 | 81 | else {pc.printf("error in spi connection\n"); wait(10); } |
ee12b079 | 0:15355bb24274 | 82 | |
ee12b079 | 0:15355bb24274 | 83 | //initialization |
ee12b079 | 0:15355bb24274 | 84 | //Common configuration registers |
ee12b079 | 0:15355bb24274 | 85 | writereg(0x01,0x00); //sequencer on,standby mode |
ee12b079 | 0:15355bb24274 | 86 | writereg(0x02,0x08);// |0x01); //packet, ook, no dc //0x00 for fsk //default = 0x08 for ook |
ee12b079 | 0:15355bb24274 | 87 | writereg(0x03,0x68); //1200bps |
ee12b079 | 0:15355bb24274 | 88 | writereg(0x04,0x2B); //1200bps |
ee12b079 | 0:15355bb24274 | 89 | writereg(0x07,0x6C); |
ee12b079 | 0:15355bb24274 | 90 | writereg(0x08,0xC0); |
ee12b079 | 0:15355bb24274 | 91 | writereg(0x09,0x00); //try 6C C0 00 for 435 MHZ //try 6C 40 00 for 432.something //try E4 C0 00 for 915 |
ee12b079 | 0:15355bb24274 | 92 | |
ee12b079 | 0:15355bb24274 | 93 | //FSK settings |
ee12b079 | 0:15355bb24274 | 94 | /*writereg(0x05,0x06); |
ee12b079 | 0:15355bb24274 | 95 | writereg(0x06,0x66);//for fdev ~ 100kHz*/ |
ee12b079 | 0:15355bb24274 | 96 | |
ee12b079 | 0:15355bb24274 | 97 | |
ee12b079 | 0:15355bb24274 | 98 | //Transmitter registers |
ee12b079 | 0:15355bb24274 | 99 | // RegPaLevel |
ee12b079 | 0:15355bb24274 | 100 | |
ee12b079 | 0:15355bb24274 | 101 | //IRQ and Pin Mapping Registers |
ee12b079 | 0:15355bb24274 | 102 | //no DIO mapped yet |
ee12b079 | 0:15355bb24274 | 103 | //irq1: modeready used |
ee12b079 | 0:15355bb24274 | 104 | //irq2: fifofull, fifothresh,packetsent used |
ee12b079 | 0:15355bb24274 | 105 | |
ee12b079 | 0:15355bb24274 | 106 | //Packet Engine Registers |
ee12b079 | 0:15355bb24274 | 107 | writereg(0x2C,0x00); //set preamble |
ee12b079 | 0:15355bb24274 | 108 | writereg(0x2D,0x0A); //set preamble default(0x0A) |
ee12b079 | 0:15355bb24274 | 109 | writereg(0x2E,0x80); //sync off .......................... |
ee12b079 | 0:15355bb24274 | 110 | writereg(0x2F,0x5E); //sync word 1 ......................... |
ee12b079 | 0:15355bb24274 | 111 | writereg(0x37,0x08 | 0x10);// | 0x40); //packetconfig1 data whitening(0x40), crc (0x10) packet issue even if crc fails???.......................... |
ee12b079 | 0:15355bb24274 | 112 | writereg(0x38,0x00); //payload length = 0 ... unlimited payload mode |
ee12b079 | 0:15355bb24274 | 113 | writereg(0x3C,0xB0); //fifothresh = 48 because we want it cleared once its 40!!!! |
ee12b079 | 0:15355bb24274 | 114 | //Initialization complete |
ee12b079 | 0:15355bb24274 | 115 | |
ee12b079 | 0:15355bb24274 | 116 | pc.printf("press t \n"); |
ee12b079 | 0:15355bb24274 | 117 | while(pc.getc() == 't'){ |
ee12b079 | 0:15355bb24274 | 118 | //t.start(); |
ee12b079 | 0:15355bb24274 | 119 | //Filling Data into FIFO 64 BYTES : eff.32 bits = 4bytes //fread |
ee12b079 | 0:15355bb24274 | 120 | cs_bar = 0; |
ee12b079 | 0:15355bb24274 | 121 | spi.write(0x80);//fifo write access |
ee12b079 | 0:15355bb24274 | 122 | for(byte_counter=0 ; byte_counter<4; byte_counter++) |
ee12b079 | 0:15355bb24274 | 123 | { |
ee12b079 | 0:15355bb24274 | 124 | for(int i=7; i>=0 ; i--) |
ee12b079 | 0:15355bb24274 | 125 | { |
ee12b079 | 0:15355bb24274 | 126 | if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0) |
ee12b079 | 0:15355bb24274 | 127 | //if((short_beacon[byte_counter] & mask[i]) != 0) |
ee12b079 | 0:15355bb24274 | 128 | { |
ee12b079 | 0:15355bb24274 | 129 | spi.write(0xFF); |
ee12b079 | 0:15355bb24274 | 130 | spi.write(0xFF); |
ee12b079 | 0:15355bb24274 | 131 | } |
ee12b079 | 0:15355bb24274 | 132 | else |
ee12b079 | 0:15355bb24274 | 133 | { |
ee12b079 | 0:15355bb24274 | 134 | spi.write(0x00); |
ee12b079 | 0:15355bb24274 | 135 | spi.write(0x00); |
ee12b079 | 0:15355bb24274 | 136 | } |
ee12b079 | 0:15355bb24274 | 137 | } |
ee12b079 | 0:15355bb24274 | 138 | } |
ee12b079 | 0:15355bb24274 | 139 | cs_bar = 1; //cs_bar |
ee12b079 | 0:15355bb24274 | 140 | pc.printf("%d",n++); |
ee12b079 | 0:15355bb24274 | 141 | //Check for fifoThresh |
ee12b079 | 0:15355bb24274 | 142 | while((readreg(0x28) & 0x20) != 0x20); |
ee12b079 | 0:15355bb24274 | 143 | |
ee12b079 | 0:15355bb24274 | 144 | //Highpower settings |
ee12b079 | 0:15355bb24274 | 145 | writereg(0x11,0x7F); //RegPalevel (20db) //~ |
ee12b079 | 0:15355bb24274 | 146 | writereg(0x13,0x0F); //RegOCP |
ee12b079 | 0:15355bb24274 | 147 | writereg(0x5A,0x5D); //RegTestPa1 |
ee12b079 | 0:15355bb24274 | 148 | writereg(0x5C,0x7C); //RegTestPa2 |
ee12b079 | 0:15355bb24274 | 149 | |
ee12b079 | 0:15355bb24274 | 150 | //Set to Tx mode |
ee12b079 | 0:15355bb24274 | 151 | writereg(0x01,0x0C); |
ee12b079 | 0:15355bb24274 | 152 | |
ee12b079 | 0:15355bb24274 | 153 | |
ee12b079 | 0:15355bb24274 | 154 | //Check for fifoThresh |
ee12b079 | 0:15355bb24274 | 155 | while((readreg(0x28) & 0x20) != 0x00); |
ee12b079 | 0:15355bb24274 | 156 | |
ee12b079 | 0:15355bb24274 | 157 | while(byte_counter!=15){ |
ee12b079 | 0:15355bb24274 | 158 | |
ee12b079 | 0:15355bb24274 | 159 | //writing again |
ee12b079 | 0:15355bb24274 | 160 | cs_bar = 0; |
ee12b079 | 0:15355bb24274 | 161 | spi.write(0x80); |
ee12b079 | 0:15355bb24274 | 162 | for(int i=7; i>=0 ;i--) |
ee12b079 | 0:15355bb24274 | 163 | { |
ee12b079 | 0:15355bb24274 | 164 | //pc.printf("%d\n",byte_counter); |
ee12b079 | 0:15355bb24274 | 165 | if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0) |
ee12b079 | 0:15355bb24274 | 166 | //if((short_beacon[byte_counter] & mask[i]) != 0) |
ee12b079 | 0:15355bb24274 | 167 | { |
ee12b079 | 0:15355bb24274 | 168 | spi.write(0xFF); |
ee12b079 | 0:15355bb24274 | 169 | spi.write(0xFF); |
ee12b079 | 0:15355bb24274 | 170 | } |
ee12b079 | 0:15355bb24274 | 171 | else |
ee12b079 | 0:15355bb24274 | 172 | { |
ee12b079 | 0:15355bb24274 | 173 | spi.write(0x00); |
ee12b079 | 0:15355bb24274 | 174 | spi.write(0x00); |
ee12b079 | 0:15355bb24274 | 175 | |
ee12b079 | 0:15355bb24274 | 176 | } |
ee12b079 | 0:15355bb24274 | 177 | } |
ee12b079 | 0:15355bb24274 | 178 | cs_bar = 1; |
ee12b079 | 0:15355bb24274 | 179 | byte_counter++; |
ee12b079 | 0:15355bb24274 | 180 | //wait(1); |
ee12b079 | 0:15355bb24274 | 181 | //Check for fifoThresh |
ee12b079 | 0:15355bb24274 | 182 | while((readreg(0x28) & 0x20) != 0x00); |
ee12b079 | 0:15355bb24274 | 183 | |
ee12b079 | 0:15355bb24274 | 184 | } |
ee12b079 | 0:15355bb24274 | 185 | //wait for packet sent bit to fire |
ee12b079 | 0:15355bb24274 | 186 | while((readreg(0x28) & 0x08) != 0x08); |
ee12b079 | 0:15355bb24274 | 187 | pc.printf("packet sent!!! \n"); |
ee12b079 | 0:15355bb24274 | 188 | |
ee12b079 | 0:15355bb24274 | 189 | //Switch back to Standby Mode |
ee12b079 | 0:15355bb24274 | 190 | writereg(0x01,0x04); |
ee12b079 | 0:15355bb24274 | 191 | |
ee12b079 | 0:15355bb24274 | 192 | //Low power mode |
ee12b079 | 0:15355bb24274 | 193 | writereg(0x11,0x9F); //RegPalevel (13db) |
ee12b079 | 0:15355bb24274 | 194 | writereg(0x13,0x1A); //RegOCP |
ee12b079 | 0:15355bb24274 | 195 | writereg(0x5A,0x55); //RegTestPa1(setting PA_BOOST on RFIO) |
ee12b079 | 0:15355bb24274 | 196 | writereg(0x5C,0x70); //RegTestPa2(setting PA_BOOST on RFIO) |
ee12b079 | 0:15355bb24274 | 197 | //wait for modeready |
ee12b079 | 0:15355bb24274 | 198 | while((readreg(0x27)&0x80)!=0x80); |
ee12b079 | 0:15355bb24274 | 199 | //t.stop(); |
ee12b079 | 0:15355bb24274 | 200 | //pc.printf(" time taken to init + transmit = %f \n", t.read()) ; |
ee12b079 | 0:15355bb24274 | 201 | } |
ee12b079 | 0:15355bb24274 | 202 | } |