Duncan McIntyre / UniGraphic

My controller identifies as an ILI9328, but only works if initialised as an ILI9325. This fork includes a fix to force 9325 initialization when a 9328 is detected.

Dependents:   TouchScreenCalibrate TouchScreenGUIDemo

Fork of UniGraphic by GraphicsDisplay

Protocols/I2C_bus.cpp@34:091b954c3205, 2020-06-21 (annotated)

Committer:
Duncan McIntyre
Date:
Sun Jun 21 15:23:02 2020 +0100
Revision:
34:091b954c3205
Updated to include latest changes from upstream

Added a class to provide an interface for my MINI-STM32-V3.0 board.

This class uses direct GPIO access to achieve decent update speeds.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Duncan McIntyre 34:091b954c3205 1 /* mbed UniGraphic library - I2C protocol class
Duncan McIntyre 34:091b954c3205 2 * Copyright (c) 2017 Peter Drescher
Duncan McIntyre 34:091b954c3205 3 * Released under the MIT License: http://mbed.org/license/mit
Duncan McIntyre 34:091b954c3205 4 *
Duncan McIntyre 34:091b954c3205 5 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Duncan McIntyre 34:091b954c3205 6 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Duncan McIntyre 34:091b954c3205 7 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
Duncan McIntyre 34:091b954c3205 8 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Duncan McIntyre 34:091b954c3205 9 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Duncan McIntyre 34:091b954c3205 10 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
Duncan McIntyre 34:091b954c3205 11 * THE SOFTWARE.
Duncan McIntyre 34:091b954c3205 12 */
Duncan McIntyre 34:091b954c3205 13
Duncan McIntyre 34:091b954c3205 14 #include "I2C_bus.h"
Duncan McIntyre 34:091b954c3205 15
Duncan McIntyre 34:091b954c3205 16 I2C_bus::I2C_bus(int Hz, int address, PinName sda, PinName scl)
Duncan McIntyre 34:091b954c3205 17 : _i2c(sda,scl)
Duncan McIntyre 34:091b954c3205 18 {
Duncan McIntyre 34:091b954c3205 19 _i2c.frequency(Hz);
Duncan McIntyre 34:091b954c3205 20 _address = address;
Duncan McIntyre 34:091b954c3205 21 //hw_reset();
Duncan McIntyre 34:091b954c3205 22 }
Duncan McIntyre 34:091b954c3205 23
Duncan McIntyre 34:091b954c3205 24 void I2C_bus::wr_cmd8(unsigned char cmd)
Duncan McIntyre 34:091b954c3205 25 {
Duncan McIntyre 34:091b954c3205 26 char tmp[2];
Duncan McIntyre 34:091b954c3205 27 tmp[0] = 0x00; //command
Duncan McIntyre 34:091b954c3205 28 tmp[1] = cmd;
Duncan McIntyre 34:091b954c3205 29 _i2c.write(_address,tmp,2);
Duncan McIntyre 34:091b954c3205 30 }
Duncan McIntyre 34:091b954c3205 31 void I2C_bus::wr_data8(unsigned char data)
Duncan McIntyre 34:091b954c3205 32 {
Duncan McIntyre 34:091b954c3205 33 _i2c.write(data); // write 8bit
Duncan McIntyre 34:091b954c3205 34 }
Duncan McIntyre 34:091b954c3205 35 void I2C_bus::wr_cmd16(unsigned short cmd)
Duncan McIntyre 34:091b954c3205 36 {
Duncan McIntyre 34:091b954c3205 37 char tmp[3];
Duncan McIntyre 34:091b954c3205 38 tmp[0] = 00; //command
Duncan McIntyre 34:091b954c3205 39 tmp[1] = cmd>>8;
Duncan McIntyre 34:091b954c3205 40 tmp[2] = cmd&0xFF;
Duncan McIntyre 34:091b954c3205 41
Duncan McIntyre 34:091b954c3205 42 _i2c.write(_address,tmp,3);
Duncan McIntyre 34:091b954c3205 43 }
Duncan McIntyre 34:091b954c3205 44 void I2C_bus::wr_data16(unsigned short data)
Duncan McIntyre 34:091b954c3205 45 {
Duncan McIntyre 34:091b954c3205 46 _i2c.write(data>>8); // write 8bit
Duncan McIntyre 34:091b954c3205 47 _i2c.write(data&0xFF); // write 8bit
Duncan McIntyre 34:091b954c3205 48 }
Duncan McIntyre 34:091b954c3205 49 void I2C_bus::wr_gram(unsigned short data)
Duncan McIntyre 34:091b954c3205 50 {
Duncan McIntyre 34:091b954c3205 51 _i2c.write(data>>8); // write 8bit
Duncan McIntyre 34:091b954c3205 52 _i2c.write(data&0xFF); // write 8bit
Duncan McIntyre 34:091b954c3205 53 }
Duncan McIntyre 34:091b954c3205 54 void I2C_bus::wr_gram(unsigned short data, unsigned int count)
Duncan McIntyre 34:091b954c3205 55 {
Duncan McIntyre 34:091b954c3205 56 _i2c.start();
Duncan McIntyre 34:091b954c3205 57 _i2c.write(_address);
Duncan McIntyre 34:091b954c3205 58 _i2c.write(0x40); // data continue
Duncan McIntyre 34:091b954c3205 59 if((data>>8)==(data&0xFF))
Duncan McIntyre 34:091b954c3205 60 {
Duncan McIntyre 34:091b954c3205 61 count<<=1;
Duncan McIntyre 34:091b954c3205 62 while(count)
Duncan McIntyre 34:091b954c3205 63 {
Duncan McIntyre 34:091b954c3205 64 _i2c.write(data); // write 8bit
Duncan McIntyre 34:091b954c3205 65 count--;
Duncan McIntyre 34:091b954c3205 66 }
Duncan McIntyre 34:091b954c3205 67 }
Duncan McIntyre 34:091b954c3205 68 else
Duncan McIntyre 34:091b954c3205 69 {
Duncan McIntyre 34:091b954c3205 70 while(count)
Duncan McIntyre 34:091b954c3205 71 {
Duncan McIntyre 34:091b954c3205 72 _i2c.write(data>>8); // write 8bit
Duncan McIntyre 34:091b954c3205 73 _i2c.write(data&0xFF); // write 8bit
Duncan McIntyre 34:091b954c3205 74 count--;
Duncan McIntyre 34:091b954c3205 75 }
Duncan McIntyre 34:091b954c3205 76 }
Duncan McIntyre 34:091b954c3205 77 _i2c.stop();
Duncan McIntyre 34:091b954c3205 78 }
Duncan McIntyre 34:091b954c3205 79 void I2C_bus::wr_grambuf(unsigned short* data, unsigned int lenght)
Duncan McIntyre 34:091b954c3205 80 {
Duncan McIntyre 34:091b954c3205 81 _i2c.start();
Duncan McIntyre 34:091b954c3205 82 _i2c.write(_address);
Duncan McIntyre 34:091b954c3205 83 _i2c.write(0x40); // data continue
Duncan McIntyre 34:091b954c3205 84 while(lenght)
Duncan McIntyre 34:091b954c3205 85 {
Duncan McIntyre 34:091b954c3205 86 _i2c.write((*data)>>8); // write 8bit
Duncan McIntyre 34:091b954c3205 87 _i2c.write((*data)&0xFF); // write 8bit
Duncan McIntyre 34:091b954c3205 88 data++;
Duncan McIntyre 34:091b954c3205 89 lenght--;
Duncan McIntyre 34:091b954c3205 90 }
Duncan McIntyre 34:091b954c3205 91 _i2c.stop();
Duncan McIntyre 34:091b954c3205 92 }
Duncan McIntyre 34:091b954c3205 93
Duncan McIntyre 34:091b954c3205 94 void I2C_bus::hw_reset()
Duncan McIntyre 34:091b954c3205 95 {
Duncan McIntyre 34:091b954c3205 96
Duncan McIntyre 34:091b954c3205 97 }
Duncan McIntyre 34:091b954c3205 98 void I2C_bus::BusEnable(bool enable)
Duncan McIntyre 34:091b954c3205 99 {
Duncan McIntyre 34:091b954c3205 100 }
Duncan McIntyre 34:091b954c3205 101
Duncan McIntyre 34:091b954c3205 102 void I2C_bus::reg_select(unsigned char reg, bool forread)
Duncan McIntyre 34:091b954c3205 103 {
Duncan McIntyre 34:091b954c3205 104 }
Duncan McIntyre 34:091b954c3205 105
Duncan McIntyre 34:091b954c3205 106 unsigned int I2C_bus::rd_reg_data32(unsigned char reg)
Duncan McIntyre 34:091b954c3205 107 {
Duncan McIntyre 34:091b954c3205 108 return 0;
Duncan McIntyre 34:091b954c3205 109 }
Duncan McIntyre 34:091b954c3205 110
Duncan McIntyre 34:091b954c3205 111 unsigned int I2C_bus::rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd)
Duncan McIntyre 34:091b954c3205 112 {
Duncan McIntyre 34:091b954c3205 113 return 0;
Duncan McIntyre 34:091b954c3205 114 }
Duncan McIntyre 34:091b954c3205 115
Duncan McIntyre 34:091b954c3205 116 void I2C_bus::dummyread()
Duncan McIntyre 34:091b954c3205 117 {
Duncan McIntyre 34:091b954c3205 118 }
Duncan McIntyre 34:091b954c3205 119
Duncan McIntyre 34:091b954c3205 120 unsigned short I2C_bus::rd_gram(bool convert)
Duncan McIntyre 34:091b954c3205 121 {
Duncan McIntyre 34:091b954c3205 122 return (0);
Duncan McIntyre 34:091b954c3205 123 }
Duncan McIntyre 34:091b954c3205 124
Duncan McIntyre 34:091b954c3205 125 unsigned short I2C_bus::reg_read(unsigned char reg)
Duncan McIntyre 34:091b954c3205 126 {
Duncan McIntyre 34:091b954c3205 127 return (0);
Duncan McIntyre 34:091b954c3205 128 }
Duncan McIntyre 34:091b954c3205 129
Duncan McIntyre 34:091b954c3205 130 void I2C_bus::reg_write(unsigned char reg, unsigned short data)
Duncan McIntyre 34:091b954c3205 131 {
Duncan McIntyre 34:091b954c3205 132 }