wayne roberts / lib_mma8451q

mma8451q driver

Dependents:   nRF51822_DataLogger_PowerImpulseCounter scpi_sx127x NAMote72_Utility scpi_sx127x_firstTest

mma8451q.h@0:cb0046a629c1, 2015-03-18 (annotated)

Committer:
dudmuck
Date:
Wed Mar 18 00:58:44 2015 +0000
Revision:
0:cb0046a629c1
Child:
1:778b685c3ad0
mma8451q driver

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dudmuck 0:cb0046a629c1 1 #include "mbed.h"
dudmuck 0:cb0046a629c1 2
dudmuck 0:cb0046a629c1 3 /* Xtrinsic accelerometer */
dudmuck 0:cb0046a629c1 4
dudmuck 0:cb0046a629c1 5 /*
dudmuck 0:cb0046a629c1 6 * MMA8451 Registers
dudmuck 0:cb0046a629c1 7 */
dudmuck 0:cb0046a629c1 8 #define MMA8451_STATUS 0x00
dudmuck 0:cb0046a629c1 9 #define MMA8451_OUT_X_MSB 0x01
dudmuck 0:cb0046a629c1 10 #define MMA8451_SYSMOD 0x0b //
dudmuck 0:cb0046a629c1 11 #define MMA8451_INT_SOURCE 0x0c //
dudmuck 0:cb0046a629c1 12 #define MMA8451_ID 0x0d
dudmuck 0:cb0046a629c1 13 #define MMA8451_TRANSIENT_CFG 0x1d // transient enable
dudmuck 0:cb0046a629c1 14 #define MMA8451_TRANSIENT_SRC 0x1e // transient read/clear interrupt
dudmuck 0:cb0046a629c1 15 #define MMA8451_TRANSIENT_THS 0x1f // transient threshold
dudmuck 0:cb0046a629c1 16 #define MMA8451_TRANSIENT_COUNT 0x20 // transient debounce
dudmuck 0:cb0046a629c1 17 #define MMA8451_CTRL_REG1 0x2a
dudmuck 0:cb0046a629c1 18 #define MMA8451_CTRL_REG2 0x2b
dudmuck 0:cb0046a629c1 19 #define MMA8451_CTRL_REG4 0x2d // interrupt enable
dudmuck 0:cb0046a629c1 20 #define MMA8451_CTRL_REG5 0x2e // interrupt pin selection
dudmuck 0:cb0046a629c1 21
dudmuck 0:cb0046a629c1 22 typedef union {
dudmuck 0:cb0046a629c1 23 struct {
dudmuck 0:cb0046a629c1 24 int16_t x;
dudmuck 0:cb0046a629c1 25 int16_t y;
dudmuck 0:cb0046a629c1 26 int16_t z;
dudmuck 0:cb0046a629c1 27 } v;
dudmuck 0:cb0046a629c1 28 uint8_t octets[6];
dudmuck 0:cb0046a629c1 29 } mma_out_t;
dudmuck 0:cb0046a629c1 30
dudmuck 0:cb0046a629c1 31 typedef union {
dudmuck 0:cb0046a629c1 32 struct { // at 0x0c
dudmuck 0:cb0046a629c1 33 uint8_t SRC_DRDY : 1; // 0
dudmuck 0:cb0046a629c1 34 uint8_t reserved1 : 1; // 1
dudmuck 0:cb0046a629c1 35 uint8_t SRC_FF_MT : 1; // 2
dudmuck 0:cb0046a629c1 36 uint8_t SRC_PULSE : 1; // 3
dudmuck 0:cb0046a629c1 37 uint8_t SRC_LNDPRT : 1; // 4
dudmuck 0:cb0046a629c1 38 uint8_t SRC_TRANS : 1; // 5
dudmuck 0:cb0046a629c1 39 uint8_t reserved6 : 1; // 6
dudmuck 0:cb0046a629c1 40 uint8_t SRC_ASLP : 1; // 7
dudmuck 0:cb0046a629c1 41 } bits;
dudmuck 0:cb0046a629c1 42 uint8_t octet;
dudmuck 0:cb0046a629c1 43 } int_source_t;
dudmuck 0:cb0046a629c1 44
dudmuck 0:cb0046a629c1 45 typedef union {
dudmuck 0:cb0046a629c1 46 struct { // at 0x1d
dudmuck 0:cb0046a629c1 47 uint8_t HPF_BYP : 1; // 0
dudmuck 0:cb0046a629c1 48 uint8_t XTEFE : 1; // 1
dudmuck 0:cb0046a629c1 49 uint8_t YTEFE : 1; // 2
dudmuck 0:cb0046a629c1 50 uint8_t ZTEFE : 1; // 3
dudmuck 0:cb0046a629c1 51 uint8_t ELE : 1; // 4
dudmuck 0:cb0046a629c1 52 uint8_t pad : 3; // 5,6,7
dudmuck 0:cb0046a629c1 53 } bits;
dudmuck 0:cb0046a629c1 54 uint8_t octet;
dudmuck 0:cb0046a629c1 55 } transient_cfg_t;
dudmuck 0:cb0046a629c1 56
dudmuck 0:cb0046a629c1 57 typedef union {
dudmuck 0:cb0046a629c1 58 struct { // at 0x1e
dudmuck 0:cb0046a629c1 59 uint8_t X_Trans_Pol : 1; // 0
dudmuck 0:cb0046a629c1 60 uint8_t XTRANSE : 1; // 1
dudmuck 0:cb0046a629c1 61 uint8_t Y_Trans_Pol : 1; // 2
dudmuck 0:cb0046a629c1 62 uint8_t YTRANSE : 1; // 3
dudmuck 0:cb0046a629c1 63 uint8_t Z_Trans_Pol : 1; // 4
dudmuck 0:cb0046a629c1 64 uint8_t ZTRANSE : 1; // 5
dudmuck 0:cb0046a629c1 65 uint8_t EA : 1; // 6
dudmuck 0:cb0046a629c1 66 uint8_t pad : 1; // 7
dudmuck 0:cb0046a629c1 67 } bits;
dudmuck 0:cb0046a629c1 68 uint8_t octet;
dudmuck 0:cb0046a629c1 69 } transient_src_t;
dudmuck 0:cb0046a629c1 70
dudmuck 0:cb0046a629c1 71 typedef union {
dudmuck 0:cb0046a629c1 72 struct { // at 0x2a
dudmuck 0:cb0046a629c1 73 uint8_t ACTIVE : 1; // 0
dudmuck 0:cb0046a629c1 74 uint8_t F_READ : 1; // 1
dudmuck 0:cb0046a629c1 75 uint8_t LNOISE : 1; // 2
dudmuck 0:cb0046a629c1 76 uint8_t DR : 3; // 3,4,5
dudmuck 0:cb0046a629c1 77 uint8_t ASLP_RATE : 2; // 6,7
dudmuck 0:cb0046a629c1 78 } bits;
dudmuck 0:cb0046a629c1 79 uint8_t octet;
dudmuck 0:cb0046a629c1 80 } ctrl_reg1_t;
dudmuck 0:cb0046a629c1 81
dudmuck 0:cb0046a629c1 82 typedef union {
dudmuck 0:cb0046a629c1 83 struct { // at 0x2d
dudmuck 0:cb0046a629c1 84 uint8_t INT_EN_DRDY : 1; // 0
dudmuck 0:cb0046a629c1 85 uint8_t reserved1 : 1; // 1
dudmuck 0:cb0046a629c1 86 uint8_t INT_EN_FF_MT : 1; // 2
dudmuck 0:cb0046a629c1 87 uint8_t INT_EN_PULSE : 1; // 3
dudmuck 0:cb0046a629c1 88 uint8_t INT_EN_LNDPRT : 1; // 4
dudmuck 0:cb0046a629c1 89 uint8_t INT_EN_TRANS : 1; // 5
dudmuck 0:cb0046a629c1 90 uint8_t reserved6 : 1; // 6
dudmuck 0:cb0046a629c1 91 uint8_t INT_EN_ASLP : 1; // 7
dudmuck 0:cb0046a629c1 92 } bits;
dudmuck 0:cb0046a629c1 93 uint8_t octet;
dudmuck 0:cb0046a629c1 94 } ctrl_reg4_t;
dudmuck 0:cb0046a629c1 95
dudmuck 0:cb0046a629c1 96 typedef union {
dudmuck 0:cb0046a629c1 97 struct { // at 0x2e
dudmuck 0:cb0046a629c1 98 uint8_t INT_CFG_DRDY : 1; // 0
dudmuck 0:cb0046a629c1 99 uint8_t reserved1 : 1; // 1
dudmuck 0:cb0046a629c1 100 uint8_t INT_CFG_FF_MT : 1; // 2
dudmuck 0:cb0046a629c1 101 uint8_t INT_CFG_PULSE : 1; // 3
dudmuck 0:cb0046a629c1 102 uint8_t INT_CFG_LNDPRT : 1; // 4
dudmuck 0:cb0046a629c1 103 uint8_t INT_CFG_TRANS : 1; // 5
dudmuck 0:cb0046a629c1 104 uint8_t reserved6 : 1; // 6
dudmuck 0:cb0046a629c1 105 uint8_t INT_CFG_ASLP : 1; // 7
dudmuck 0:cb0046a629c1 106 } bits;
dudmuck 0:cb0046a629c1 107 uint8_t octet;
dudmuck 0:cb0046a629c1 108 } ctrl_reg5_t;
dudmuck 0:cb0046a629c1 109
dudmuck 0:cb0046a629c1 110 class MMA8451Q {
dudmuck 0:cb0046a629c1 111 public:
dudmuck 0:cb0046a629c1 112 MMA8451Q(I2C& r);
dudmuck 0:cb0046a629c1 113 ~MMA8451Q();
dudmuck 0:cb0046a629c1 114 void print_regs(void);
dudmuck 0:cb0046a629c1 115 void set_active(char);
dudmuck 0:cb0046a629c1 116 uint8_t get_active(void);
dudmuck 0:cb0046a629c1 117
dudmuck 0:cb0046a629c1 118 uint8_t read_single(uint8_t addr);
dudmuck 0:cb0046a629c1 119 void read(uint8_t addr, uint8_t *dst_buf, int length);
dudmuck 0:cb0046a629c1 120 void write(uint8_t addr, uint8_t data);
dudmuck 0:cb0046a629c1 121 void transient_detect(void);
dudmuck 0:cb0046a629c1 122
dudmuck 0:cb0046a629c1 123 mma_out_t out;
dudmuck 0:cb0046a629c1 124 transient_cfg_t transient_cfg;
dudmuck 0:cb0046a629c1 125 ctrl_reg1_t ctrl_reg1;
dudmuck 0:cb0046a629c1 126 ctrl_reg4_t ctrl_reg4;
dudmuck 0:cb0046a629c1 127 ctrl_reg5_t ctrl_reg5;
dudmuck 0:cb0046a629c1 128
dudmuck 0:cb0046a629c1 129 private:
dudmuck 0:cb0046a629c1 130 I2C& m_i2c;
dudmuck 0:cb0046a629c1 131 };
dudmuck 0:cb0046a629c1 132