RFM69.cpp

00001 //Port of RFM69 from lowpowerlab
00002 //Sync'd Feb. 6, 2015
00003 //spi register read/write routines from Karl Zweimuller's RF22
00004 //
00005 //
00006 //
00007 // **********************************************************************************
00008 // Driver definition for HopeRF RFM69W/RFM69HW/RFM69CW/RFM69HCW, Semtech SX1231/1231H
00009 // **********************************************************************************
00010 // Copyright Felix Rusu (2014), felix@lowpowerlab.com
00011 // http://lowpowerlab.com/
00012 // **********************************************************************************
00013 // License
00014 // **********************************************************************************
00015 // This program is free software; you can redistribute it 
00016 // and/or modify it under the terms of the GNU General    
00017 // Public License as published by the Free Software       
00018 // Foundation; either version 3 of the License, or        
00019 // (at your option) any later version.                    
00020 //                                                        
00021 // This program is distributed in the hope that it will   
00022 // be useful, but WITHOUT ANY WARRANTY; without even the  
00023 // implied warranty of MERCHANTABILITY or FITNESS FOR A   
00024 // PARTICULAR PURPOSE. See the GNU General Public        
00025 // License for more details.                              
00026 //                                                        
00027 // You should have received a copy of the GNU General    
00028 // Public License along with this program.
00029 // If not, see <http://www.gnu.org/licenses/>.
00030 //                                                        
00031 // Licence can be viewed at                               
00032 // http://www.gnu.org/licenses/gpl-3.0.txt
00033 //
00034 // Please maintain this license information along with authorship
00035 // and copyright notices in any redistribution of this code
00036 // **********************************************************************************// RF22.cpp
00037 //
00038 // Copyright (C) 2011 Mike McCauley
00039 // $Id: RF22.cpp,v 1.17 2013/02/06 21:33:56 mikem Exp mikem $
00040 // ported to mbed by Karl Zweimueller
00041 
00042 
00043 #include "mbed.h"
00044 #include "RFM69.h"
00045 #include <RFM69registers.h>
00046 #include <SPI.h>
00047 
00048 volatile uint8_t RFM69::DATA[RF69_MAX_DATA_LEN];
00049 volatile uint8_t RFM69::_mode;        // current transceiver state
00050 volatile uint8_t RFM69::DATALEN;
00051 volatile uint8_t RFM69::SENDERID;
00052 volatile uint8_t RFM69::TARGETID;     // should match _address
00053 volatile uint8_t RFM69::PAYLOADLEN;
00054 volatile uint8_t RFM69::ACK_REQUESTED;
00055 volatile uint8_t RFM69::ACK_RECEIVED; // should be polled immediately after sending a packet with ACK request
00056 volatile int16_t RFM69::RSSI;          // most accurate RSSI during reception (closest to the reception)
00057 
00058 RFM69::RFM69(PinName mosi, PinName miso, PinName sclk, PinName slaveSelectPin, PinName interrupt): 
00059       _slaveSelectPin(slaveSelectPin) ,  _spi(mosi, miso, sclk), _interrupt(interrupt) {
00060  
00061     // Setup the spi for 8 bit data, high steady state clock,
00062     // second edge capture, with a 1MHz clock rate
00063     _spi.format(8,0);
00064     _spi.frequency(4000000);
00065     _mode = RF69_MODE_STANDBY;
00066     _promiscuousMode = false;
00067     _powerLevel = 31;
00068 }
00069 void RFM69::setNodeID(uint8_t nodeID)
00070 {
00071     MyNodeID=nodeID;
00072 }
00073 
00074 bool RFM69::initialize(uint8_t freqBand, uint8_t nodeID, uint8_t networkID)
00075 {
00076   //SS.printf("Init Start\n\r"); 
00077   bool myresult=false;
00078   setNodeID(nodeID);
00079   MyNetworkID=networkID;
00080     unsigned long start_to;
00081   const uint8_t CONFIG[][2] =
00082   {
00083     /* 0x01 */ { REG_OPMODE, RF_OPMODE_SEQUENCER_ON | RF_OPMODE_LISTEN_OFF | RF_OPMODE_STANDBY },
00084     /* 0x02 */ { REG_DATAMODUL, RF_DATAMODUL_DATAMODE_PACKET | RF_DATAMODUL_MODULATIONTYPE_FSK | RF_DATAMODUL_MODULATIONSHAPING_00 }, // no shaping
00085     /* 0x03 */ { REG_BITRATEMSB, 0x02}, // Same as JeeLib
00086     /* 0x04 */ { REG_BITRATELSB, 0x8a}, // 49261
00087     /* 0x05 */ { REG_FDEVMSB, RF_FDEVMSB_90000}, // default: 5KHz, (FDEV + BitRate / 2 <= 500KHz)
00088     /* 0x06 */ { REG_FDEVLSB, RF_FDEVLSB_90000},
00089     {REG_FRFMSB,0x6c},
00090     {REG_FRFMID,0x80},
00091     {REG_FRFLSB,0x00},
00092     /* 0x07 */ //{ REG_FRFMSB, (uint8_t) (freqBand==RF69_315MHZ ? RF_FRFMSB_315 : (freqBand==RF69_433MHZ ? RF_FRFMSB_434 : (freqBand==RF69_868MHZ ? RF_FRFMSB_868 : RF_FRFMSB_915))) },
00093     /* 0x08 */ //{ REG_FRFMID, (uint8_t) (freqBand==RF69_315MHZ ? RF_FRFMID_315 : (freqBand==RF69_433MHZ ? RF_FRFMID_434 : (freqBand==RF69_868MHZ ? RF_FRFMID_868 : RF_FRFMID_915))) },
00094     /* 0x09 */ //{ REG_FRFLSB, (uint8_t) (freqBand==RF69_315MHZ ? RF_FRFLSB_315 : (freqBand==RF69_433MHZ ? RF_FRFLSB_434 : (freqBand==RF69_868MHZ ? RF_FRFLSB_868 : RF_FRFLSB_915))) },
00095 
00096     /* 0x0B */ { REG_AFCCTRL, RF_AFCCTRL_LOWBETA_ON },
00097     // looks like PA1 and PA2 are not implemented on RFM69W, hence the max output power is 13dBm
00098     // +17dBm and +20dBm are possible on RFM69HW
00099     // +13dBm formula: Pout = -18 + OutputPower (with PA0 or PA1**)
00100     // +17dBm formula: Pout = -14 + OutputPower (with PA1 and PA2)**
00101     // +20dBm formula: Pout = -11 + OutputPower (with PA1 and PA2)** and high power PA settings (section 3.3.7 in datasheet)
00102     /* 0x11 */ { REG_PALEVEL, RF_PALEVEL_PA0_ON | RF_PALEVEL_PA1_OFF | RF_PALEVEL_PA2_OFF | RF_PALEVEL_OUTPUTPOWER_11100},
00103     /* 0x13 */ { REG_OCP, RF_OCP_ON | RF_OCP_TRIM_95 }, // over current protection (default is 95mA)
00104 
00105     // RXBW defaults are { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_24 | RF_RXBW_EXP_5} (RxBw: 10.4KHz)
00106     /* 0x19 */ { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_16 | RF_RXBW_EXP_2 }, // (BitRate < 2 * RxBw)
00107     /* 0x1e */ { REG_AFCFEI, RF_AFCFEI_FEI_START | RF_AFCFEI_AFCAUTOCLEAR_ON | RF_AFCFEI_AFCAUTO_ON},
00108     //for BR-19200: /* 0x19 */ { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_24 | RF_RXBW_EXP_3 },
00109     /* 0x25 */ { REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_10 | RF_DIOMAPPING1_DIO3_01 | RF_DIOMAPPING1_DIO1_11}, // DIO0 is the only IRQ we're using
00110     /* 0x26 */ { REG_DIOMAPPING2, RF_DIOMAPPING2_DIO5_11 | RF_DIOMAPPING2_CLKOUT_OFF }, // DIO5 ClkOut disable for power saving
00111     /* 0x28 */ { REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN }, // writing to this bit ensures that the FIFO & status flags are reset
00112     /* 0x29 */ { REG_RSSITHRESH, 220 }, // must be set to dBm = (-Sensitivity / 2), default is 0xE4 = 228 so -114dBm
00113     ///* 0x2D */ { REG_PREAMBLELSB, RF_PREAMBLESIZE_LSB_VALUE } // default 3 preamble bytes 0xAAAAAA
00114     /* 0x2E */ { REG_SYNCCONFIG, RF_SYNC_ON | RF_SYNC_FIFOFILL_AUTO | RF_SYNC_SIZE_3 | RF_SYNC_TOL_0 },
00115     /* 0x2F */ { REG_SYNCVALUE1, 0xAA },      // attempt to make this compatible with sync1 byte of RFM12B lib
00116     /* 0x30 */ { REG_SYNCVALUE2, 0x2d }, // NETWORK ID
00117     /* 0x31 */ { REG_SYNCVALUE3, networkID},
00118     /* 0x37 */ { REG_PACKETCONFIG1, RF_PACKET1_FORMAT_FIXED | RF_PACKET1_DCFREE_OFF | RF_PACKET1_CRC_OFF | RF_PACKET1_CRCAUTOCLEAR_ON | RF_PACKET1_ADRSFILTERING_OFF },
00119     /* 0x38 */ { REG_PAYLOADLENGTH, 0 }, // in variable length mode: the max frame size, not used in TX
00120     ///* 0x39 */ { REG_NODEADRS, nodeID }, // turned off because we're not using address filtering
00121     /* 0x3C */ { REG_FIFOTHRESH, RF_FIFOTHRESH_TXSTART_FIFONOTEMPTY | RF_FIFOTHRESH_VALUE }, // TX on FIFO not empty
00122     /* 0x3D */ { REG_PACKETCONFIG2, RF_PACKET2_RXRESTARTDELAY_2BITS | RF_PACKET2_AUTORXRESTART_OFF | RF_PACKET2_AES_OFF }, // RXRESTARTDELAY must match transmitter PA ramp-down time (bitrate dependent)
00123     //for BR-19200: /* 0x3D */ { REG_PACKETCONFIG2, RF_PACKET2_RXRESTARTDELAY_NONE | RF_PACKET2_AUTORXRESTART_ON | RF_PACKET2_AES_OFF }, // RXRESTARTDELAY must match transmitter PA ramp-down time (bitrate dependent)
00124     /* 0x6F */ { REG_TESTDAGC, RF_DAGC_IMPROVED_LOWBETA1 }, // run DAGC continuously in RX mode for Fading Margin Improvement, recommended default for AfcLowBetaOn=0
00125     {255, 0}
00126   };
00127 // Timer for ms waits
00128     t.start();
00129      _slaveSelectPin = 1;
00130 
00131     // Setup the spi for 8 bit data : 1RW-bit 7 adressbit and  8 databit
00132     // second edge capture, with a 10MHz clock rate
00133     _spi.format(8,0);
00134     _spi.frequency(4000000);
00135 
00136 #define TIME_OUT 500
00137    int j=0; 
00138   start_to = t.read_ms() ;
00139   
00140   do writeReg(REG_SYNCVALUE1, 0xaa); while (readReg(REG_SYNCVALUE1) != 0xaa && t.read_ms()-start_to < TIME_OUT);
00141   if (t.read_ms()-start_to >= TIME_OUT) return myresult;
00142    //SS.printf("0xAA written\n\r");
00143   // Set time out 
00144   start_to = t.read_ms()  ;  
00145     do writeReg(REG_SYNCVALUE1, 0x55); while (readReg(REG_SYNCVALUE1) != 0x55 && t.read_ms()-start_to < TIME_OUT);
00146   if (t.read_ms()-start_to >= TIME_OUT) return myresult;
00147   for (uint8_t i = 0; CONFIG[i][0] != 255; i++){
00148     writeReg(CONFIG[i][0], CONFIG[i][1]);
00149     j=readReg(CONFIG[i][0]);
00150     //SS.printf("reg 0x%04x  Value 0x%04x read 0x%04x\n\r",CONFIG[i][0], CONFIG[i][1], j);
00151   }// Encryption is persistent between resets and can trip you up during debugging.
00152   // Disable it during initialization so we always start from a known state.
00153   //encrypt(0);
00154 readAllRegs();
00155   //setHighPower(_isRFM69HW); // called regardless if it's a RFM69W or RFM69HW
00156   //setMode(RF69_MODE_STANDBY);
00157     // Set up interrupt handler
00158     start_to = t.read_ms() ;
00159     while (((readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00) && t.read_ms()-start_to < TIME_OUT); // Wait for ModeReady
00160   if (t.read_ms()-start_to >= TIME_OUT) return myresult;
00161 
00162     _interrupt.rise(this, &RFM69::isr0);
00163   myresult=true;
00164   _address = nodeID;
00165    return myresult;
00166 }
00167 
00168 
00169 // return the frequency (in Hz)
00170 uint16_t crc16(uint16_t crc, uint8_t a)
00171 {
00172 int i;
00173 
00174 crc ^= a;
00175 for (i = 0; i < 8; ++i)
00176  {
00177   if (crc & 1)
00178   crc = (crc >> 1) ^ 0xA001;
00179   else
00180   crc = (crc >> 1);
00181  }
00182 
00183 return crc;
00184 }
00185 uint32_t RFM69::getFrequency()
00186 {
00187   return RF69_FSTEP * (((uint32_t) readReg(REG_FRFMSB) << 16) + ((uint16_t) readReg(REG_FRFMID) << 8) + readReg(REG_FRFLSB));
00188 }
00189 
00190 // set the frequency (in Hz)
00191 void RFM69::setFrequency(uint32_t freqHz)
00192 {
00193   uint8_t oldMode = _mode;
00194   if (oldMode == RF69_MODE_TX) {
00195     setMode(RF69_MODE_RX);
00196   }
00197   freqHz /= RF69_FSTEP; // divide down by FSTEP to get FRF
00198   writeReg(REG_FRFMSB, freqHz >> 16);
00199   writeReg(REG_FRFMID, freqHz >> 8);
00200   writeReg(REG_FRFLSB, freqHz);
00201   if (oldMode == RF69_MODE_RX) {
00202     setMode(RF69_MODE_SYNTH);
00203   }
00204   setMode(oldMode);
00205 }
00206 
00207 void RFM69::setMode(uint8_t newMode)
00208 {
00209   if (newMode == _mode)
00210     return;
00211 
00212   switch (newMode) {
00213     case RF69_MODE_TX:
00214       writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_TRANSMITTER);
00215       if (_isRFM69HW) setHighPowerRegs(true);
00216       break;
00217     case RF69_MODE_RX:
00218       writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_RECEIVER);
00219       if (_isRFM69HW) setHighPowerRegs(false);
00220       break;
00221     case RF69_MODE_SYNTH:
00222       writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_SYNTHESIZER);
00223       break;
00224     case RF69_MODE_STANDBY:
00225       writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_STANDBY);
00226       break;
00227     case RF69_MODE_SLEEP:
00228       writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_SLEEP);
00229       break;
00230     default:
00231       return;
00232   }
00233 
00234   // we are using packet mode, so this check is not really needed
00235   // but waiting for mode ready is necessary when going from sleep because the FIFO may not be immediately available from previous mode
00236   while (_mode == RF69_MODE_SLEEP && (readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00); // wait for ModeReady
00237   _mode = newMode;
00238 }
00239 
00240 void RFM69::sleep(bool onOFF) {
00241   if (onOFF) setMode(RF69_MODE_SLEEP);
00242   else setMode(RF69_MODE_STANDBY);
00243 }
00244 
00245 void RFM69::setAddress(uint8_t addr)
00246 {
00247   _address = addr;
00248   writeReg(REG_NODEADRS, _address);
00249 }
00250 
00251 void RFM69::setNetwork(uint8_t networkID)
00252 {
00253   writeReg(REG_SYNCVALUE2, networkID);
00254 }
00255 
00256 // set output power: 0 = min, 31 = max
00257 // this results in a "weaker" transmitted signal, and directly results in a lower RSSI at the receiver
00258 void RFM69::setPowerLevel(uint8_t powerLevel)
00259 {
00260   _powerLevel = powerLevel;
00261   writeReg(REG_PALEVEL, (readReg(REG_PALEVEL) & 0xE0) | (_powerLevel > 31 ? 31 : _powerLevel));
00262 }
00263 
00264 bool RFM69::canSend()
00265 {
00266   if (_mode == RF69_MODE_RX && PAYLOADLEN == 0 && readRSSI() < CSMA_LIMIT) // if signal stronger than -100dBm is detected assume channel activity
00267   {
00268     setMode(RF69_MODE_STANDBY);
00269     return true;
00270   }
00271   return false;
00272 }
00273 
00274 void RFM69::send(uint8_t toAddress, const void* buffer, uint8_t bufferSize, bool requestACK)
00275 {
00276   writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFB) | RF_PACKET2_RXRESTART); // avoid RX deadlocks
00277   uint32_t now = t.read_ms();
00278   while (!canSend() && t.read_ms() - now < RF69_CSMA_LIMIT_MS) receiveDone();
00279           sendFrame(toAddress, buffer, bufferSize, requestACK, false);
00280 }
00281 
00282 // to increase the chance of getting a packet across, call this function instead of send
00283 // and it handles all the ACK requesting/retrying for you :)
00284 // The only twist is that you have to manually listen to ACK requests on the other side and send back the ACKs
00285 // The reason for the semi-automaton is that the lib is interrupt driven and
00286 // requires user action to read the received data and decide what to do with it
00287 // replies usually take only 5..8ms at 50kbps@915MHz
00288 bool RFM69::sendWithRetry(uint8_t toAddress, const void* buffer, uint8_t bufferSize, uint8_t retries, uint8_t retryWaitTime) {
00289   uint32_t sentTime;
00290   for (uint8_t i = 0; i <= retries; i++)
00291   {
00292     send(toAddress, buffer, bufferSize, true);
00293     sentTime = t.read_ms();
00294     while (t.read_ms() - sentTime < retryWaitTime)
00295     {
00296       if (ACKReceived(toAddress))
00297       {
00298         //Serial.print(" ~ms:"); Serial.print(t.read_ms() - sentTime);
00299         return true;
00300       }
00301     }
00302     //Serial.print(" RETRY#"); Serial.println(i + 1);
00303   }
00304   return false;
00305 }
00306 
00307 // should be polled immediately after sending a packet with ACK request
00308 bool RFM69::ACKReceived(uint8_t fromNodeID) {
00309   if (receiveDone())
00310     return (SENDERID == fromNodeID || fromNodeID == RF69_BROADCAST_ADDR) && ACK_RECEIVED;
00311   return false;
00312 }
00313 
00314 // check whether an ACK was requested in the last received packet (non-broadcasted packet)
00315 bool RFM69::ACKRequested() {
00316   return ACK_REQUESTED && (TARGETID != RF69_BROADCAST_ADDR);
00317 }
00318 
00319 // should be called immediately after reception in case sender wants ACK
00320 void RFM69::sendACK(const void* buffer, uint8_t bufferSize) {
00321   uint8_t sender = SENDERID;
00322   int16_t _RSSI = RSSI; // save payload received RSSI value
00323   writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFB) | RF_PACKET2_RXRESTART); // avoid RX deadlocks
00324   uint32_t now = t.read_ms();
00325   while (!canSend() && t.read_ms() - now < RF69_CSMA_LIMIT_MS) receiveDone();
00326   sendFrame(sender, buffer, bufferSize, false, true);
00327   RSSI = _RSSI; // restore payload RSSI
00328 }
00329 
00330 void RFM69::sendFrame(uint8_t toAddress, const void* buffer, uint8_t bufferSize, bool requestACK, bool sendACK)
00331 {
00332  // Serial Ser(USBTX,USBRX);
00333  // Ser.baud(115200);
00334   char MyBuff[50];
00335   int TXStart = t.read_ms() ;
00336   //Ser.printf("sendFrame address %d size %d\n\r",toAddress,bufferSize);
00337   setMode(RF69_MODE_STANDBY); // turn off receiver to prevent reception while filling fifo
00338   while ((readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00)wait_us(10); // wait for ModeReady
00339   writeReg(REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_00); // DIO0 is "Packet Sent"
00340   //if (bufferSize > RF69_MAX_DATA_LEN) bufferSize = RF69_MAX_DATA_LEN;
00341 uint8_t txstate = 0, i = 0,next=0,j=0;
00342 uint16_t crc=crc16(0xffff,MyNetworkID);
00343 uint8_t parity=MyNetworkID^(MyNetworkID<<4);
00344 parity=parity^(parity<<2);//2 bit even parity in bit 6 and 7 msb
00345 fifoFlush();
00346 setMode(RF69_MODE_TX);
00347 //while (readReg(REG_IRQFLAGS1 & RF_IRQFLAGS1_MODEREADY)  == 0x00 && t.read_ms()-TXStart < TIME_OUT)
00348 //{
00349 //wait_us(10);
00350 //}
00351 //Ser.printf("Reg val %d \n\r",bufferSize);
00352 while(txstate < 7)
00353 {
00354   
00355   if ((readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_FIFOFULL) == 0)
00356   {
00357     switch(txstate)
00358     { 
00359       case 0: next=MyNodeID ; txstate++; break;
00360       case 1: next=(bufferSize); txstate++; break;
00361       case 2: next=((uint8_t*)buffer)[i++]; if(i==bufferSize) txstate++; break;
00362       case 3: next=(uint8_t)crc; txstate++; break;
00363       case 4: next=(uint8_t)(crc>>8); txstate++; break;
00364       case 5:
00365       case 6: next=0xAA; txstate++; break; // dummy bytes (if < 2, locks up)
00366     }
00367     if(txstate<4) crc = crc16(crc, next);
00368     writeReg(REG_FIFO, next);
00369     MyBuff[j++]=next;
00370     //Ser.printf("state %d count %d Data %d \n\r",txstate,i,next);
00371   }
00372   else {
00373     wait_us(100);// fifo is full wait until it is transmitted
00374   }
00375 }
00376 //Ser.printf("length %d \n\r",j);
00377 for (i=0; i<j; i++)
00378 {
00379  // Ser.printf("count %d val %d\n\r",i,MyBuff[i]);
00380 }
00381 //setMode(RF69_MODE_TX);
00382 //writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_TRANSMITTER);
00383 while (_interrupt == 0 && t.read_ms() - TXStart < RF69_TX_LIMIT_MS)wait_us(10); // wait for DIO0 to turn HIGH signalling transmission finish
00384 setMode(RF69_MODE_STANDBY);
00385 //writeReg(REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_00);
00386  /*// control byte
00387   uint8_t CTLbyte = 0x00;
00388   if (sendACK)
00389     CTLbyte = 0x80;
00390   else if (requestACK)
00391     CTLbyte = 0x40;
00392 
00393    select();
00394    _spi.write(REG_FIFO | 0x80); 
00395     _spi.write(bufferSize + 3);
00396    _spi.write(toAddress);
00397    _spi.write(_address);
00398    _spi.write(CTLbyte);
00399  
00400   for (uint8_t i = 0; i < bufferSize; i++)
00401      _spi.write(((uint8_t*) buffer)[i]);
00402   unselect();
00403 
00404   // no need to wait for transmit mode to be ready since its handled by the radio
00405   setMode(RF69_MODE_TX);
00406   uint32_t txStart = t.read_ms();
00407   while (_interrupt == 0 && t.read_ms() - txStart < RF69_TX_LIMIT_MS); // wait for DIO0 to turn HIGH signalling transmission finish
00408   //while (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PACKETSENT == 0x00); // wait for ModeReady
00409   setMode(RF69_MODE_STANDBY);
00410 */
00411   
00412 }
00413 // ON  = disable filtering to capture all frames on network
00414 // OFF = enable node/broadcast filtering to capture only frames sent to this/broadcast address
00415 void RFM69::promiscuous(bool onOff) {
00416   _promiscuousMode = onOff;
00417   //writeReg(REG_PACKETCONFIG1, (readReg(REG_PACKETCONFIG1) & 0xF9) | (onOff ? RF_PACKET1_ADRSFILTERING_OFF : RF_PACKET1_ADRSFILTERING_NODEBROADCAST));
00418 }
00419 
00420 void RFM69::setHighPower(bool onOff) {
00421   _isRFM69HW = onOff;
00422   writeReg(REG_OCP, _isRFM69HW ? RF_OCP_OFF : RF_OCP_ON);
00423   if (_isRFM69HW) // turning ON
00424     writeReg(REG_PALEVEL, (readReg(REG_PALEVEL) & 0x1F) | RF_PALEVEL_PA1_ON | RF_PALEVEL_PA2_ON); // enable P1 & P2 amplifier stages
00425   else
00426     writeReg(REG_PALEVEL, RF_PALEVEL_PA0_ON | RF_PALEVEL_PA1_OFF | RF_PALEVEL_PA2_OFF | _powerLevel); // enable P0 only
00427 }
00428 
00429 void RFM69::setHighPowerRegs(bool onOff) {
00430   writeReg(REG_TESTPA1, onOff ? 0x5D : 0x55);
00431   writeReg(REG_TESTPA2, onOff ? 0x7C : 0x70);
00432 }
00433 
00434 /*
00435 void RFM69::setCS(uint8_t newSPISlaveSelect) {
00436     DigitalOut _slaveSelectPin(newSPISlaveSelect);
00437     _slaveSelectPin = 1;
00438 }
00439 */
00440 // for debugging
00441 void RFM69::readAllRegs( )
00442 {
00443   uint8_t regVal,regAddr;
00444 
00445   for (regAddr = 1; regAddr <= 0x4F; regAddr++)
00446   {
00447     select();
00448     _spi.write(regAddr & 0x7F); // send address + r/w bit
00449     regVal = _spi.write(0);
00450      //SD.printf("ADDR 0x%02x  REG 0x%02x \n\r",regAddr,regVal);
00451  /*   Serial.print(regAddr, HEX);
00452     Serial.print(" - ");
00453     Serial.print(regVal,HEX);
00454     Serial.print(" - ");
00455     Serial.println(regVal,BIN);*/
00456     unselect();
00457   }
00458   
00459 }
00460 
00461 uint8_t RFM69::readTemperature(int8_t calFactor) // returns centigrade
00462 {
00463    uint8_t oldMode = _mode;
00464  
00465   setMode(RF69_MODE_STANDBY);
00466   writeReg(REG_TEMP1, RF_TEMP1_MEAS_START);
00467   while ((readReg(REG_TEMP1) & RF_TEMP1_MEAS_RUNNING));
00468   setMode(oldMode);
00469 
00470   return ~readReg(REG_TEMP2) + COURSE_TEMP_COEF + calFactor; // 'complement' corrects the slope, rising temp = rising val
00471 } // COURSE_TEMP_COEF puts reading in the ballpark, user can add additional correction
00472 
00473 void RFM69::rcCalibration()
00474 {
00475   writeReg(REG_OSC1, RF_OSC1_RCCAL_START);
00476   while ((readReg(REG_OSC1) & RF_OSC1_RCCAL_DONE) == 0x00);
00477 }
00478 // C++ level interrupt handler for this instance
00479 void RFM69::interruptHandler() {
00480 
00481   if (_mode == RF69_MODE_RX && (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PAYLOADREADY))
00482   {
00483     setMode(RF69_MODE_STANDBY);
00484     select();
00485 
00486     _spi.write(REG_FIFO & 0x7F);
00487     PAYLOADLEN = _spi.write(0);
00488     PAYLOADLEN = PAYLOADLEN > 66 ? 66 : PAYLOADLEN; // precaution
00489     TARGETID = _spi.write(0);
00490     if(!(_promiscuousMode || TARGETID == _address || TARGETID == RF69_BROADCAST_ADDR) // match this node's address, or broadcast address or anything in promiscuous mode
00491        || PAYLOADLEN < 3) // address situation could receive packets that are malformed and don't fit this libraries extra fields
00492     {
00493       PAYLOADLEN = 0;
00494       unselect();
00495       receiveBegin();
00496       return;
00497     }
00498 
00499     DATALEN = PAYLOADLEN - 3;
00500     SENDERID = _spi.write(0);
00501     uint8_t CTLbyte = _spi.write(0);
00502 
00503     ACK_RECEIVED = CTLbyte & 0x80; // extract ACK-received flag
00504     ACK_REQUESTED = CTLbyte & 0x40; // extract ACK-requested flag
00505 
00506     for (uint8_t i = 0; i < DATALEN; i++)
00507     {
00508       DATA[i] = _spi.write(0);
00509     }
00510     if (DATALEN < RF69_MAX_DATA_LEN) DATA[DATALEN] = 0; // add null at end of string
00511     unselect();
00512     setMode(RF69_MODE_RX);
00513   }
00514   RSSI = readRSSI();
00515 }
00516 
00517 
00518 // These are low level functions that call the interrupt handler for the correct instance of RFM69.
00519 void RFM69::isr0()
00520 {
00521      interruptHandler();
00522 }
00523 void RFM69::receiveBegin() {
00524   DATALEN = 0;
00525   SENDERID = 0;
00526   TARGETID = 0;
00527   PAYLOADLEN = 0;
00528   ACK_REQUESTED = 0;
00529   ACK_RECEIVED = 0;
00530   RSSI = 0;
00531   if (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PAYLOADREADY)
00532     writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFB) | RF_PACKET2_RXRESTART); // avoid RX deadlocks
00533   writeReg(REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_01); // set DIO0 to "PAYLOADREADY" in receive mode
00534   setMode(RF69_MODE_RX);
00535   _interrupt.enable_irq();
00536 }
00537 
00538 bool RFM69::receiveDone() {
00539   _interrupt.disable_irq();  // re-enabled in unselect() via setMode() or via receiveBegin()
00540   if (_mode == RF69_MODE_RX && PAYLOADLEN > 0)
00541   {
00542     setMode(RF69_MODE_STANDBY); // enables interrupts
00543     return true;
00544   }
00545   else if (_mode == RF69_MODE_RX) // already in RX no payload yet
00546   {
00547    _interrupt.enable_irq(); // explicitly re-enable interrupts
00548     return false;
00549   }
00550   receiveBegin();
00551   return false;
00552 }
00553 
00554 // To enable encryption: radio.encrypt("ABCDEFGHIJKLMNOP");
00555 // To disable encryption: radio.encrypt(null) or radio.encrypt(0)
00556 // KEY HAS TO BE 16 bytes !!!
00557 void RFM69::encrypt(const char* key) {
00558   setMode(RF69_MODE_STANDBY);
00559   if (key != 0)
00560   {
00561     select();
00562     _spi.write(REG_AESKEY1 | 0x80);
00563     for (uint8_t i = 0; i < 16; i++)
00564       _spi.write(key[i]);
00565     unselect();
00566   }
00567   writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFE) | (key ? 1 : 0));
00568 }
00569 
00570 int16_t RFM69::readRSSI(bool forceTrigger) {
00571   int16_t rssi = 0;
00572   if (forceTrigger)
00573   {
00574     // RSSI trigger not needed if DAGC is in continuous mode
00575     writeReg(REG_RSSICONFIG, RF_RSSI_START);
00576     while ((readReg(REG_RSSICONFIG) & RF_RSSI_DONE) == 0x00); // wait for RSSI_Ready
00577   }
00578   rssi = -readReg(REG_RSSIVALUE);
00579   rssi >>= 1;
00580   return rssi;
00581 }
00582 
00583 uint8_t RFM69::readReg(uint8_t addr)
00584 {
00585     select();
00586     _spi.write(addr & 0x7F); // Send the address with the write mask off
00587     uint8_t val = _spi.write(0); // The written value is ignored, reg value is read
00588     unselect();
00589     return val;
00590 }
00591 
00592 void RFM69::writeReg(uint8_t addr, uint8_t value)
00593 {
00594     select();
00595     _spi.write(addr | 0x80); // Send the address with the write mask on
00596     _spi.write(value); // New value follows
00597     unselect();
00598  }
00599 
00600 // select the transceiver
00601 void RFM69::select() {
00602    _interrupt.disable_irq();    // Disable Interrupts
00603 /*  // set RFM69 SPI settings
00604   SPI.setDataMode(SPI_MODE0);
00605   SPI.setBitOrder(MSBFIRST);
00606   SPI.setClockDivider(SPI_CLOCK_DIV4); // decided to slow down from DIV2 after SPI stalling in some instances, especially visible on mega1284p when RFM69 and FLASH chip both present  */
00607    _slaveSelectPin = 0;
00608 }
00609 
00610 // UNselect the transceiver chip
00611 void RFM69::unselect() {
00612     _slaveSelectPin = 1;
00613     _interrupt.enable_irq();     // Enable Interrupts
00614 }
00615 void RFM69::sendWait()
00616     {
00617      while (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PACKETSENT)
00618      {
00619        wait_ms(1);
00620      };  
00621 }
00622 void RFM69::fifoFlush()
00623 {
00624   while (readReg(REG_IRQFLAGS2) & (RF_IRQFLAGS2_FIFONOTEMPTY | RF_IRQFLAGS2_FIFOOVERRUN))
00625         readReg(REG_FIFO);
00626 }