Peter Drescher / ST_401_84MHZ

Dependents:   Nucleo_spi_master_20MHz Nucleo_vs_Arduino_Speed_Test DMA_I2S_Test MPU9150AHRS ... more

Committer:
dreschpe
Date:
Wed Mar 05 19:38:06 2014 +0000
Revision:
0:e54167eaccc6
Child:
1:d19543ab3afa
Rev 1.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dreschpe 0:e54167eaccc6 1 // use the STM32CubeMX Tool to calculate the register settings
dreschpe 0:e54167eaccc6 2 // www.st.com/stm32cube‎
dreschpe 0:e54167eaccc6 3 //
dreschpe 0:e54167eaccc6 4
dreschpe 0:e54167eaccc6 5 #include "stm32f4xx_hal.h"
dreschpe 0:e54167eaccc6 6
dreschpe 0:e54167eaccc6 7 static void SystemClock_Config_84MHz_internal(void)
dreschpe 0:e54167eaccc6 8 {
dreschpe 0:e54167eaccc6 9 RCC_ClkInitTypeDef RCC_ClkInitStruct;
dreschpe 0:e54167eaccc6 10 RCC_OscInitTypeDef RCC_OscInitStruct;
dreschpe 0:e54167eaccc6 11
dreschpe 0:e54167eaccc6 12 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; // internal 16MHz RC
dreschpe 0:e54167eaccc6 13 RCC_OscInitStruct.HSIState = RCC_HSI_ON;
dreschpe 0:e54167eaccc6 14 RCC_OscInitStruct.HSICalibrationValue = 6;
dreschpe 0:e54167eaccc6 15 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; // PLL on
dreschpe 0:e54167eaccc6 16 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
dreschpe 0:e54167eaccc6 17 RCC_OscInitStruct.PLL.PLLM = 16; // setup PLL divider
dreschpe 0:e54167eaccc6 18 RCC_OscInitStruct.PLL.PLLN = 336;
dreschpe 0:e54167eaccc6 19 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
dreschpe 0:e54167eaccc6 20 RCC_OscInitStruct.PLL.PLLQ = 4;
dreschpe 0:e54167eaccc6 21 HAL_RCC_OscConfig(&RCC_OscInitStruct);
dreschpe 0:e54167eaccc6 22
dreschpe 0:e54167eaccc6 23 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1;
dreschpe 0:e54167eaccc6 24 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
dreschpe 0:e54167eaccc6 25 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
dreschpe 0:e54167eaccc6 26 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
dreschpe 0:e54167eaccc6 27
dreschpe 0:e54167eaccc6 28 }