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targets/hal/TARGET_Freescale/TARGET_K20XX/serial_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2015 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include "serial_api.h"
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 #include <string.h>
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 22 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 23 #include "clk_freqs.h"
bogdanm 0:9b334a45a8ff 24 #include "PeripheralPins.h"
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 #define UART_NUM 3
bogdanm 0:9b334a45a8ff 27
bogdanm 0:9b334a45a8ff 28 static uint32_t serial_irq_ids[UART_NUM] = {0};
bogdanm 0:9b334a45a8ff 29 static uart_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 30
bogdanm 0:9b334a45a8ff 31 int stdio_uart_inited = 0;
bogdanm 0:9b334a45a8ff 32 serial_t stdio_uart;
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 void serial_init(serial_t *obj, PinName tx, PinName rx) {
bogdanm 0:9b334a45a8ff 35 // determine the UART to use
bogdanm 0:9b334a45a8ff 36 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 37 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 38 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
bogdanm 0:9b334a45a8ff 39 MBED_ASSERT((int)uart != NC);
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 obj->uart = (UART_Type *)uart;
bogdanm 0:9b334a45a8ff 42 // enable clk
bogdanm 0:9b334a45a8ff 43 switch (uart) {
bogdanm 0:9b334a45a8ff 44 case UART_0:
bogdanm 0:9b334a45a8ff 45 mcgpllfll_frequency();
bogdanm 0:9b334a45a8ff 46 SIM->SCGC4 |= SIM_SCGC4_UART0_MASK;
bogdanm 0:9b334a45a8ff 47 break;
bogdanm 0:9b334a45a8ff 48 case UART_1:
bogdanm 0:9b334a45a8ff 49 mcgpllfll_frequency();
bogdanm 0:9b334a45a8ff 50 SIM->SCGC4 |= SIM_SCGC4_UART1_MASK;
bogdanm 0:9b334a45a8ff 51 break;
bogdanm 0:9b334a45a8ff 52 case UART_2:
bogdanm 0:9b334a45a8ff 53 SIM->SCGC4 |= SIM_SCGC4_UART2_MASK;
bogdanm 0:9b334a45a8ff 54 break;
bogdanm 0:9b334a45a8ff 55 }
bogdanm 0:9b334a45a8ff 56 // Disable UART before changing registers
bogdanm 0:9b334a45a8ff 57 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 switch (uart) {
bogdanm 0:9b334a45a8ff 60 case UART_0:
bogdanm 0:9b334a45a8ff 61 obj->index = 0;
bogdanm 0:9b334a45a8ff 62 break;
bogdanm 0:9b334a45a8ff 63 case UART_1:
bogdanm 0:9b334a45a8ff 64 obj->index = 1;
bogdanm 0:9b334a45a8ff 65 break;
bogdanm 0:9b334a45a8ff 66 case UART_2:
bogdanm 0:9b334a45a8ff 67 obj->index = 2;
bogdanm 0:9b334a45a8ff 68 break;
bogdanm 0:9b334a45a8ff 69 }
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 // set default baud rate and format
bogdanm 0:9b334a45a8ff 72 serial_baud (obj, 9600);
bogdanm 0:9b334a45a8ff 73 serial_format(obj, 8, ParityNone, 1);
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 // pinout the chosen uart
bogdanm 0:9b334a45a8ff 76 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 77 pinmap_pinout(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 // set rx/tx pins in PullUp mode
bogdanm 0:9b334a45a8ff 80 if (tx != NC) {
bogdanm 0:9b334a45a8ff 81 pin_mode(tx, PullUp);
bogdanm 0:9b334a45a8ff 82 }
bogdanm 0:9b334a45a8ff 83 if (rx != NC) {
bogdanm 0:9b334a45a8ff 84 pin_mode(rx, PullUp);
bogdanm 0:9b334a45a8ff 85 }
bogdanm 0:9b334a45a8ff 86
bogdanm 0:9b334a45a8ff 87 obj->uart->C2 |= (UART_C2_RE_MASK | UART_C2_TE_MASK);
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 if (uart == STDIO_UART) {
bogdanm 0:9b334a45a8ff 90 stdio_uart_inited = 1;
bogdanm 0:9b334a45a8ff 91 memcpy(&stdio_uart, obj, sizeof(serial_t));
bogdanm 0:9b334a45a8ff 92 }
bogdanm 0:9b334a45a8ff 93 }
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 void serial_free(serial_t *obj) {
bogdanm 0:9b334a45a8ff 96 serial_irq_ids[obj->index] = 0;
bogdanm 0:9b334a45a8ff 97 }
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 void serial_baud(serial_t *obj, int baudrate) {
bogdanm 0:9b334a45a8ff 100 // save C2 state
bogdanm 0:9b334a45a8ff 101 uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 // Disable UART before changing registers
bogdanm 0:9b334a45a8ff 104 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 uint32_t PCLK;
bogdanm 0:9b334a45a8ff 107 if (obj->uart != UART2) {
bogdanm 0:9b334a45a8ff 108 PCLK = mcgpllfll_frequency();
bogdanm 0:9b334a45a8ff 109 }
bogdanm 0:9b334a45a8ff 110 else {
bogdanm 0:9b334a45a8ff 111 PCLK = bus_frequency();
bogdanm 0:9b334a45a8ff 112 }
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 uint16_t DL = PCLK / (16 * baudrate);
bogdanm 0:9b334a45a8ff 115 uint32_t BRFA = (2 * PCLK) / baudrate - 32 * DL;
bogdanm 0:9b334a45a8ff 116
bogdanm 0:9b334a45a8ff 117 // set BDH and BDL
bogdanm 0:9b334a45a8ff 118 obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f);
bogdanm 0:9b334a45a8ff 119 obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff);
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 obj->uart->C4 &= ~0x1F;
bogdanm 0:9b334a45a8ff 122 obj->uart->C4 |= BRFA & 0x1F;
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 // restore C2 state
bogdanm 0:9b334a45a8ff 125 obj->uart->C2 |= c2_state;
bogdanm 0:9b334a45a8ff 126 }
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
bogdanm 0:9b334a45a8ff 129 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
bogdanm 0:9b334a45a8ff 130 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
bogdanm 0:9b334a45a8ff 131 MBED_ASSERT((data_bits == 8) || (data_bits == 9));
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133 // save C2 state
bogdanm 0:9b334a45a8ff 134 uint32_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 // Disable UART before changing registers
bogdanm 0:9b334a45a8ff 137 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 // 8 data bits = 0 ... 9 data bits = 1
bogdanm 0:9b334a45a8ff 140 data_bits -= 8;
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 uint32_t parity_enable, parity_select;
bogdanm 0:9b334a45a8ff 143 switch (parity) {
bogdanm 0:9b334a45a8ff 144 case ParityNone:
bogdanm 0:9b334a45a8ff 145 parity_enable = 0;
bogdanm 0:9b334a45a8ff 146 parity_select = 0;
bogdanm 0:9b334a45a8ff 147 break;
bogdanm 0:9b334a45a8ff 148 case ParityOdd :
bogdanm 0:9b334a45a8ff 149 parity_enable = 1;
bogdanm 0:9b334a45a8ff 150 parity_select = 1;
bogdanm 0:9b334a45a8ff 151 data_bits++;
bogdanm 0:9b334a45a8ff 152 break;
bogdanm 0:9b334a45a8ff 153 case ParityEven:
bogdanm 0:9b334a45a8ff 154 parity_enable = 1;
bogdanm 0:9b334a45a8ff 155 parity_select = 0;
bogdanm 0:9b334a45a8ff 156 data_bits++;
bogdanm 0:9b334a45a8ff 157 break;
bogdanm 0:9b334a45a8ff 158 default:
bogdanm 0:9b334a45a8ff 159 break;
bogdanm 0:9b334a45a8ff 160 }
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 stop_bits -= 1;
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 uint32_t m10 = 0;
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 // 9 data bits + parity - only uart0 support
bogdanm 0:9b334a45a8ff 167 if (data_bits == 2) {
bogdanm 0:9b334a45a8ff 168 MBED_ASSERT(obj->index == 0);
bogdanm 0:9b334a45a8ff 169 data_bits = 0;
bogdanm 0:9b334a45a8ff 170 m10 = 1;
bogdanm 0:9b334a45a8ff 171 }
bogdanm 0:9b334a45a8ff 172
bogdanm 0:9b334a45a8ff 173 // data bits, parity and parity mode
bogdanm 0:9b334a45a8ff 174 obj->uart->C1 = ((data_bits << 4)
bogdanm 0:9b334a45a8ff 175 | (parity_enable << 1)
bogdanm 0:9b334a45a8ff 176 | (parity_select << 0));
bogdanm 0:9b334a45a8ff 177
bogdanm 0:9b334a45a8ff 178 //enable 10bit mode if needed
bogdanm 0:9b334a45a8ff 179 if (obj->index == 0) {
bogdanm 0:9b334a45a8ff 180 obj->uart->C4 &= ~UART_C4_M10_MASK;
bogdanm 0:9b334a45a8ff 181 obj->uart->C4 |= (m10 << UART_C4_M10_SHIFT);
bogdanm 0:9b334a45a8ff 182 }
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 // stop bits
bogdanm 0:9b334a45a8ff 185 obj->uart->BDH &= ~UART_BDH_SBR_MASK;
bogdanm 0:9b334a45a8ff 186 obj->uart->BDH |= (stop_bits << UART_BDH_SBR_SHIFT);
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 // restore C2 state
bogdanm 0:9b334a45a8ff 189 obj->uart->C2 |= c2_state;
bogdanm 0:9b334a45a8ff 190 }
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 /******************************************************************************
bogdanm 0:9b334a45a8ff 193 * INTERRUPTS HANDLING
bogdanm 0:9b334a45a8ff 194 ******************************************************************************/
bogdanm 0:9b334a45a8ff 195 static inline void uart_irq(uint8_t status, uint32_t index) {
bogdanm 0:9b334a45a8ff 196 if (serial_irq_ids[index] != 0) {
bogdanm 0:9b334a45a8ff 197 if (status & UART_S1_TDRE_MASK)
bogdanm 0:9b334a45a8ff 198 irq_handler(serial_irq_ids[index], TxIrq);
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 if (status & UART_S1_RDRF_MASK)
bogdanm 0:9b334a45a8ff 201 irq_handler(serial_irq_ids[index], RxIrq);
bogdanm 0:9b334a45a8ff 202 }
bogdanm 0:9b334a45a8ff 203 }
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 void uart0_irq() {uart_irq(UART0->S1, 0);}
bogdanm 0:9b334a45a8ff 206 void uart1_irq() {uart_irq(UART1->S1, 1);}
bogdanm 0:9b334a45a8ff 207 void uart2_irq() {uart_irq(UART2->S1, 2);}
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
bogdanm 0:9b334a45a8ff 210 irq_handler = handler;
bogdanm 0:9b334a45a8ff 211 serial_irq_ids[obj->index] = id;
bogdanm 0:9b334a45a8ff 212 }
bogdanm 0:9b334a45a8ff 213
bogdanm 0:9b334a45a8ff 214 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
bogdanm 0:9b334a45a8ff 215 IRQn_Type irq_n = (IRQn_Type)0;
bogdanm 0:9b334a45a8ff 216 uint32_t vector = 0;
bogdanm 0:9b334a45a8ff 217 switch ((int)obj->uart) {
bogdanm 0:9b334a45a8ff 218 case UART_0:
bogdanm 0:9b334a45a8ff 219 irq_n=UART0_RX_TX_IRQn;
bogdanm 0:9b334a45a8ff 220 vector = (uint32_t)&uart0_irq;
bogdanm 0:9b334a45a8ff 221 break;
bogdanm 0:9b334a45a8ff 222 case UART_1:
bogdanm 0:9b334a45a8ff 223 irq_n=UART1_RX_TX_IRQn;
bogdanm 0:9b334a45a8ff 224 vector = (uint32_t)&uart1_irq;
bogdanm 0:9b334a45a8ff 225 break;
bogdanm 0:9b334a45a8ff 226 case UART_2:
bogdanm 0:9b334a45a8ff 227 irq_n=UART2_RX_TX_IRQn;
bogdanm 0:9b334a45a8ff 228 vector = (uint32_t)&uart2_irq;
bogdanm 0:9b334a45a8ff 229 break;
bogdanm 0:9b334a45a8ff 230 }
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232 if (enable) {
bogdanm 0:9b334a45a8ff 233 switch (irq) {
bogdanm 0:9b334a45a8ff 234 case RxIrq:
bogdanm 0:9b334a45a8ff 235 obj->uart->C2 |= (UART_C2_RIE_MASK);
bogdanm 0:9b334a45a8ff 236 break;
bogdanm 0:9b334a45a8ff 237 case TxIrq:
bogdanm 0:9b334a45a8ff 238 obj->uart->C2 |= (UART_C2_TIE_MASK);
bogdanm 0:9b334a45a8ff 239 break;
bogdanm 0:9b334a45a8ff 240 }
bogdanm 0:9b334a45a8ff 241 NVIC_SetVector(irq_n, vector);
bogdanm 0:9b334a45a8ff 242 NVIC_EnableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 } else { // disable
bogdanm 0:9b334a45a8ff 245 int all_disabled = 0;
bogdanm 0:9b334a45a8ff 246 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
bogdanm 0:9b334a45a8ff 247 switch (irq) {
bogdanm 0:9b334a45a8ff 248 case RxIrq:
bogdanm 0:9b334a45a8ff 249 obj->uart->C2 &= ~(UART_C2_RIE_MASK);
bogdanm 0:9b334a45a8ff 250 break;
bogdanm 0:9b334a45a8ff 251 case TxIrq:
bogdanm 0:9b334a45a8ff 252 obj->uart->C2 &= ~(UART_C2_TIE_MASK);
bogdanm 0:9b334a45a8ff 253 break;
bogdanm 0:9b334a45a8ff 254 }
bogdanm 0:9b334a45a8ff 255 switch (other_irq) {
bogdanm 0:9b334a45a8ff 256 case RxIrq:
bogdanm 0:9b334a45a8ff 257 all_disabled = (obj->uart->C2 & (UART_C2_RIE_MASK)) == 0;
bogdanm 0:9b334a45a8ff 258 break;
bogdanm 0:9b334a45a8ff 259 case TxIrq:
bogdanm 0:9b334a45a8ff 260 all_disabled = (obj->uart->C2 & (UART_C2_TIE_MASK)) == 0;
bogdanm 0:9b334a45a8ff 261 break;
bogdanm 0:9b334a45a8ff 262 }
bogdanm 0:9b334a45a8ff 263 if (all_disabled)
bogdanm 0:9b334a45a8ff 264 NVIC_DisableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 265 }
bogdanm 0:9b334a45a8ff 266 }
bogdanm 0:9b334a45a8ff 267
bogdanm 0:9b334a45a8ff 268 int serial_getc(serial_t *obj) {
bogdanm 0:9b334a45a8ff 269 while (!serial_readable(obj));
bogdanm 0:9b334a45a8ff 270 return obj->uart->D;
bogdanm 0:9b334a45a8ff 271 }
bogdanm 0:9b334a45a8ff 272
bogdanm 0:9b334a45a8ff 273 void serial_putc(serial_t *obj, int c) {
bogdanm 0:9b334a45a8ff 274 while (!serial_writable(obj));
bogdanm 0:9b334a45a8ff 275 obj->uart->D = c;
bogdanm 0:9b334a45a8ff 276 }
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 int serial_readable(serial_t *obj) {
bogdanm 0:9b334a45a8ff 279
bogdanm 0:9b334a45a8ff 280 return (obj->uart->S1 & UART_S1_RDRF_MASK);
bogdanm 0:9b334a45a8ff 281 }
bogdanm 0:9b334a45a8ff 282
bogdanm 0:9b334a45a8ff 283 int serial_writable(serial_t *obj) {
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 return (obj->uart->S1 & UART_S1_TDRE_MASK);
bogdanm 0:9b334a45a8ff 286 }
bogdanm 0:9b334a45a8ff 287
bogdanm 0:9b334a45a8ff 288 void serial_clear(serial_t *obj) {
bogdanm 0:9b334a45a8ff 289 }
bogdanm 0:9b334a45a8ff 290
bogdanm 0:9b334a45a8ff 291 void serial_pinout_tx(PinName tx) {
bogdanm 0:9b334a45a8ff 292 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 293 }
bogdanm 0:9b334a45a8ff 294
bogdanm 0:9b334a45a8ff 295 void serial_break_set(serial_t *obj) {
bogdanm 0:9b334a45a8ff 296 obj->uart->C2 |= UART_C2_SBK_MASK;
bogdanm 0:9b334a45a8ff 297 }
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 void serial_break_clear(serial_t *obj) {
bogdanm 0:9b334a45a8ff 300 obj->uart->C2 &= ~UART_C2_SBK_MASK;
bogdanm 0:9b334a45a8ff 301 }