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Revision 136:5728e9819171, committed 2016-05-23
- Comitter:
- mbed_official
- Date:
- Mon May 23 14:15:16 2016 +0100
- Parent:
- 135:eec55f8ee438
- Child:
- 137:28723fa54344
- Commit message:
- Synchronized with git revision f74fc12313356f861665b8e8a11afcc972a543fc
Full URL: https://github.com/mbedmicro/mbed/commit/f74fc12313356f861665b8e8a11afcc972a543fc/
Changed in this revision
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/hal_tick.c Mon May 23 10:45:11 2016 +0100 +++ b/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/hal_tick.c Mon May 23 14:15:16 2016 +0100 @@ -40,7 +40,7 @@ void us_ticker_irq_handler(void); void set_compare(uint16_t count); -extern volatile uint32_t SlaveCounter; +extern volatile uint16_t SlaveCounter; extern volatile uint32_t oc_int_part; extern volatile uint16_t oc_rem_part;
--- a/targets/hal/TARGET_STM/TARGET_STM32F4/serial_api.c Mon May 23 10:45:11 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F4/serial_api.c Mon May 23 14:15:16 2016 +0100 @@ -202,8 +202,8 @@ // Enable USART clock switch (instance) { case UART_1: - __USART1_FORCE_RESET(); - __USART1_RELEASE_RESET(); + __HAL_RCC_USART1_FORCE_RESET(); + __HAL_RCC_USART1_RELEASE_RESET(); __HAL_RCC_USART1_CLK_ENABLE(); SERIAL_OBJ(index) = 0; #if DEVICE_SERIAL_ASYNCH_DMA @@ -211,8 +211,8 @@ #endif break; case UART_2: - __USART2_FORCE_RESET(); - __USART2_RELEASE_RESET(); + __HAL_RCC_USART2_FORCE_RESET(); + __HAL_RCC_USART2_RELEASE_RESET(); __HAL_RCC_USART2_CLK_ENABLE(); SERIAL_OBJ(index) = 1; #if DEVICE_SERIAL_ASYNCH_DMA @@ -221,8 +221,8 @@ break; #if defined(USART3_BASE) case UART_3: - __USART3_FORCE_RESET(); - __USART3_RELEASE_RESET(); + __HAL_RCC_USART3_FORCE_RESET(); + __HAL_RCC_USART3_RELEASE_RESET(); __HAL_RCC_USART3_CLK_ENABLE(); SERIAL_OBJ(index) = 2; #if DEVICE_SERIAL_ASYNCH_DMA @@ -232,8 +232,8 @@ #endif #if defined(UART4_BASE) case UART_4: - __USART4_FORCE_RESET(); - __USART4_RELEASE_RESET(); + __HAL_RCC_UART4_FORCE_RESET(); + __HAL_RCC_UART4_RELEASE_RESET(); __HAL_RCC_UART4_CLK_ENABLE(); SERIAL_OBJ(index) = 3; #if DEVICE_SERIAL_ASYNCH_DMA @@ -243,8 +243,8 @@ #endif #if defined(UART5_BASE) case UART_5: - __USART5_FORCE_RESET(); - __USART5_RELEASE_RESET(); + __HAL_RCC_UART5_FORCE_RESET(); + __HAL_RCC_UART5_RELEASE_RESET(); __HAL_RCC_UART5_CLK_ENABLE(); SERIAL_OBJ(index) = 4; #if DEVICE_SERIAL_ASYNCH_DMA @@ -254,8 +254,8 @@ #endif #if defined(USART6_BASE) case UART_6: - __USART6_FORCE_RESET(); - __USART6_RELEASE_RESET(); + __HAL_RCC_USART6_FORCE_RESET(); + __HAL_RCC_USART6_RELEASE_RESET(); __HAL_RCC_USART6_CLK_ENABLE(); SERIAL_OBJ(index) = 5; #if DEVICE_SERIAL_ASYNCH_DMA @@ -265,8 +265,8 @@ #endif #if defined(UART7_BASE) case UART_7: - __USART8_FORCE_RESET(); - __USART8_RELEASE_RESET(); + __HAL_RCC_UART7_FORCE_RESET(); + __HAL_RCC_UART7_RELEASE_RESET(); __HAL_RCC_UART7_CLK_ENABLE(); SERIAL_OBJ(index) = 6; #if DEVICE_SERIAL_ASYNCH_DMA @@ -276,8 +276,8 @@ #endif #if defined(UART8_BASE) case UART_8: - __USART8_FORCE_RESET(); - __USART8_RELEASE_RESET(); + __HAL_RCC_UART8_FORCE_RESET(); + __HAL_RCC_UART8_RELEASE_RESET(); __HAL_RCC_UART8_CLK_ENABLE(); SERIAL_OBJ(index) = 7; #if DEVICE_SERIAL_ASYNCH_DMA
--- a/targets/hal/TARGET_STM/TARGET_STM32L0/us_ticker.c Mon May 23 10:45:11 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32L0/us_ticker.c Mon May 23 14:15:16 2016 +0100 @@ -26,6 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include <stddef.h> +#include <stdbool.h> #include "us_ticker_api.h" #include "PeripheralNames.h" @@ -34,8 +35,9 @@ static TIM_HandleTypeDef TimMasterHandle; static int us_ticker_inited = 0; +static bool us_ticker_stabilized = false; -volatile uint32_t SlaveCounter = 0; +volatile uint16_t SlaveCounter = 0; volatile uint32_t oc_int_part = 0; volatile uint16_t oc_rem_part = 0; @@ -58,24 +60,39 @@ uint32_t us_ticker_read() { - uint32_t counter, counter2; + volatile uint16_t cntH_old, cntH, cntL; + if (!us_ticker_inited) us_ticker_init(); - // A situation might appear when Master overflows right after Slave is read and before the - // new (overflowed) value of Master is read. Which would make the code below consider the - // previous (incorrect) value of Slave and the new value of Master, which would return a - // value in the past. Avoid this by computing consecutive values of the timer until they - // are properly ordered. - counter = (uint32_t)(SlaveCounter << 16); - counter += TIM_MST->CNT; - while (1) { - counter2 = (uint32_t)(SlaveCounter << 16); - counter2 += TIM_MST->CNT; - if (counter2 > counter) { - break; - } - counter = counter2; - } - return counter2; + + // There's a situation where the first tick still may overflow and to avoid + // it we need to check if our ticker has stabilized and due to that we need + // to return only the lower part of your 32 bit software timer. + if (us_ticker_stabilized) { + do { + // For some reason on L0xx series we need to read and clear the + // overflow flag which give extra time to propelry handle possible + // hiccup after ~60s + if (__HAL_TIM_GET_FLAG(&TimMasterHandle, TIM_FLAG_CC1OF) == SET) { + __HAL_TIM_CLEAR_FLAG(&TimMasterHandle, TIM_FLAG_CC1OF); + } + cntH_old = SlaveCounter; + if (__HAL_TIM_GET_FLAG(&TimMasterHandle, TIM_FLAG_UPDATE) == SET) { + cntH_old += 1; + } + cntL = TIM_MST->CNT; + + cntH = SlaveCounter; + if (__HAL_TIM_GET_FLAG(&TimMasterHandle, TIM_FLAG_UPDATE) == SET) { + cntH += 1; + } + } while(cntH_old != cntH); + } else { + us_ticker_stabilized = true; + return (uint32_t) TIM_MST->CNT; + } + + // Glue the upper and lower part together to get a 32 bit timer + return (uint32_t)(cntH << 16 | cntL); } void us_ticker_set_interrupt(timestamp_t timestamp)