My fork during debugging.
Fork of NRF2401P by
Diff: NRF2401P.cpp
- Revision:
- 8:3e027705ce23
- Parent:
- 7:621a5b0cf1aa
- Child:
- 9:c21b80aaf250
--- a/NRF2401P.cpp Sun Jul 05 22:20:40 2015 +0000 +++ b/NRF2401P.cpp Sun Jul 05 23:33:37 2015 +0000 @@ -45,13 +45,10 @@ debug = false; } -/** -* writes to pc and waits -*/ void NRF2401P::log(char *msg) { if(debug) { - printf("\t <%s \t %s>\n\r",statusString(), msg); + printf("\t <%s \t %s>\n\r", statusString(), msg); wait(0.01); } } @@ -77,9 +74,9 @@ */ void NRF2401P::start() { - writeReg( CONFIG, 0x0c ); // set 16 bit crc - setTxRetry(0x01,0x0f); // 500 uS, 15 retries - setRadio(0,0x03); // 1MB/S 0dB + writeReg(CONFIG, 0x0c); // set 16 bit crc + setTxRetry(0x01, 0x0f); // 500 uS, 15 retries + setRadio(0, 0x03); // 1MB/S 0dB setDynamicPayload(); setChannel(76); // should be clear? setAddressWidth(5); @@ -90,7 +87,7 @@ } /** -* Sets up a reciever using shockburst and dynamic payload. Uses pipe 1 +* Sets up a receiver using shockburst and dynamic payload. Uses pipe 1 * defaults to 5 bytes */ void NRF2401P::quickRxSetup(int channel,long long addrRx) @@ -126,15 +123,12 @@ } } -/** -* Sets the number and the timimg of TX retries -*/ char NRF2401P::setTxRetry(char delay, char numTries) { char val = (delay&0xf)<<4 | (numTries&0xf); char chk; - writeReg (SETUP_RETR, val); - readReg( SETUP_RETR, &chk ); + writeReg(SETUP_RETR, val); + readReg(SETUP_RETR, &chk); if (chk&0xff == val) { return 0; } else { @@ -176,8 +170,10 @@ char NRF2401P::setRadio(char speed, char power) { char val=0, chk=0; - sprintf(logMsg, "Set radio"); - log(logMsg); + if (debug) { + sprintf(logMsg, "Set radio"); + log(logMsg); + } if (speed & 0x02) { val |= (1<<5); } @@ -186,10 +182,10 @@ val |= ((power & 0x03)<<1); printf("\n\r"); - writeReg (0x06, val); + writeReg(RF_SETUP, val); // read register to verify settings - readReg( 0x06, &chk ); + readReg(RF_SETUP, &chk); if (chk&0x2E == val) { return 0; } else { @@ -197,11 +193,6 @@ } } -/** -Set RF_CH = chan; - -F0= 2400 + chan [MHz] -*/ char NRF2401P::setChannel(char chan) { char chk=0; @@ -209,8 +200,8 @@ sprintf(logMsg, "Set channel"); log(logMsg); } - writeReg (0x05,(chan&0x7f)); - readReg(0x05,&chk); + writeReg(RF_CH, (chan&0x7f)); + readReg(RF_CH, &chk); if (chk&0x7f == chan&0x7f) { return 0; } else { @@ -232,7 +223,7 @@ //clearStatus(); //ce = 1; csn = 0; - char address = 0XA0; + char address = 0xA0; int i; // set up for writing status = spi->write( address ); @@ -281,7 +272,7 @@ char reg; csn = 0; address &= 0x1F; - reg = address | 0x20; + reg = address | W_REGISTER; status = spi->write( reg ); spi->write( data ); csn = 1; @@ -301,7 +292,7 @@ int i; // set up for writing address &= 0x1F; - reg = address| 0x20; + reg = address| W_REGISTER; status = spi->write( reg ); for ( i = width - 1; i >= 0; i-- ) { spi->write( data[ i ] ); @@ -334,7 +325,7 @@ */ void NRF2401P::clearStatus() { - writeReg(STATUS,0x70); + writeReg(STATUS, 0x70); if (debug) { sprintf(logMsg, "Clear status (%02x)", status ); log(logMsg); @@ -382,15 +373,15 @@ sprintf(logMsg, "Set Tx Mode"); log(logMsg); } - readReg( CONFIG, &data ); + readReg(CONFIG, &data); data &= ~( 1 << 0 ); flushTx(); flushRx(); - writeReg( CONFIG, data ); - writeReg( RX_ADDR_P0, txAdd, addressWidth ); // reset p0 - writeReg(EN_RXADDR,0x01); // enable pipe 0 for reading + writeReg(CONFIG, data); + writeReg(RX_ADDR_P0, txAdd, addressWidth); // reset p0 + writeReg(EN_RXADDR, 0x01); // enable pipe 0 for reading // check - readReg( 0x00, &data ); + readReg(CONFIG, &data); bit = ( data >> 0 ) & 1; ce=1; @@ -412,8 +403,8 @@ if ( ( width > 5 ) || ( width < 3 ) ) return false; width -= 2; - writeReg( 0x03, width ); - readReg( 0x03, &chk ); + writeReg(SETUP_AW, width); + readReg(SETUP_AW, &chk); if (chk&0x03 == width) { return 0; } else { @@ -427,8 +418,8 @@ char NRF2401P::setTxAddress( char *address ) { memcpy (txAdd,address, addressWidth); - writeReg( 0x0A, address, addressWidth ); //Write to RX_ADDR_P0 - writeReg( 0x10, address, addressWidth ); //Write to TX_ADDR + writeReg(RX_ADDR_P0, address, addressWidth); + writeReg(TX_ADDR, address, addressWidth); return 0; // must fix this } @@ -457,28 +448,28 @@ } if (pipe>5) return 0xff; if (pipe ==0) { - memcpy (pipe0Add,address, addressWidth); + memcpy(pipe0Add,address, addressWidth); } char reg = 0x0A + pipe; switch ( pipe ) { case ( 0 ) : case ( 1 ) : { - writeReg( reg, address, addressWidth ); //Write to RX_ADDR_P0 or _P1 + writeReg(reg, address, addressWidth); //Write to RX_ADDR_P0 or _P1 break; } case ( 2 ) : case ( 3 ) : case ( 4 ) : case ( 5 ) : { - writeReg( reg, address, 1 ); //Write to RX_ADDR_P2 ... _P5 + writeReg(reg, address, 1); //Write to RX_ADDR_P2 ... _P5 break; } } - readReg(EN_RXADDR,®); + readReg(EN_RXADDR, ®); reg |= (1<<pipe); - writeReg( EN_RXADDR,reg ); //Enable the pipe + writeReg(EN_RXADDR, reg); //Enable the pipe return 0; // Must fix this } @@ -501,7 +492,7 @@ */ char NRF2401P::checkStatus() { - readReg(0x07,&status); + readReg(STATUS, &status); return status; } @@ -511,7 +502,7 @@ bool NRF2401P::isAckData() { char fifo; - readReg(0x17,&fifo); + readReg(FIFO_STATUS, &fifo); bool isData = !(fifo&0x01); return isData; } @@ -543,7 +534,7 @@ width=0; } } else { - readReg(0x12,&width); // width of p1 + readReg(RX_PW_P1, &width); // width of p1 } // width=18; return width; @@ -590,8 +581,8 @@ void NRF2401P::setDynamicPayload() { dynamic = true; - writeReg(FEATURE,0x07); // Enable Dyn payload, Payload with Ack and w_tx_noack command - writeReg(EN_AA,0x3f); // EN_AA regi for P1 and P0 + writeReg(FEATURE, 0x07); // Enable Dyn payload, Payload with Ack and w_tx_noack command + writeReg(EN_AA, 0x3f); // EN_AA regi for P1 and P0 writeReg(DYNPD, 0x1F); } @@ -604,14 +595,14 @@ char data; char bit; ce=1; - readReg( CONFIG, &data ); + readReg(CONFIG, &data); if ((data>>1) &0x01) { return true; // Already powered up }; - data |= ( 0x02 ); - writeReg( 0x00, data ); + data |= (0x02); + writeReg(CONFIG, data); // check - readReg( 0x00, &data ); + readReg(CONFIG, &data); bit = ( data >> 1 ) & 1; wait(0.005); // wait 5ms @@ -634,15 +625,15 @@ char data; char bit; ce=1; - readReg( 0x00, &data ); - data |= ( 0x01 ); + readReg(CONFIG, &data); + data |= (0x01); - writeReg( 0x00, data ); + writeReg(CONFIG, data); if (pipe0Add[0]|pipe0Add[1]|pipe0Add[2]|pipe0Add[3]|pipe0Add[4] >0) { setRxAddress(pipe0Add,0); } // check - readReg( 0x00, &data ); + readReg(CONFIG, &data); bit = ( data >> 0 ) & 1; wait (0.001);