mcufriend_keil.h

00001 #ifndef MCUFRIEND_KEIL_H_
00002 #define MCUFRIEND_KEIL_H_
00003 
00004 #if defined(USE_SERIAL)
00005 #include "mcufriend_keil_spi.h"
00006 #else
00007 #include "pin_shield_1.h"     //shield pin macros e.g. A2_PORT, PIN_OUTPUT()
00008 #include "pin_shield_8.h"     //macros for write_8(), read_8(), setWriteDir(), ...
00009 
00010 // control pins as used in MCUFRIEND shields 
00011   #define RD_PORT A0_PORT
00012   #define RD_PIN  A0_PIN
00013   #define WR_PORT A1_PORT
00014   #define WR_PIN  A1_PIN
00015   #define CD_PORT A2_PORT
00016   #define CD_PIN  A2_PIN
00017   #define CS_PORT A3_PORT
00018   #define CS_PIN  A3_PIN
00019   #define RESET_PORT A4_PORT
00020   #define RESET_PIN  A4_PIN
00021 
00022 // general purpose pin macros
00023  #define RD_ACTIVE  PIN_LOW(RD_PORT, RD_PIN)
00024  #define RD_IDLE    PIN_HIGH(RD_PORT, RD_PIN)
00025  #define RD_OUTPUT  PIN_OUTPUT(RD_PORT, RD_PIN)
00026  #define WR_ACTIVE  PIN_LOW(WR_PORT, WR_PIN)
00027  #define WR_IDLE    PIN_HIGH(WR_PORT, WR_PIN)
00028  #define WR_OUTPUT  PIN_OUTPUT(WR_PORT, WR_PIN)
00029  #define CD_COMMAND PIN_LOW(CD_PORT, CD_PIN)
00030  #define CD_DATA    PIN_HIGH(CD_PORT, CD_PIN)
00031  #define CD_OUTPUT  PIN_OUTPUT(CD_PORT, CD_PIN)
00032  #define CS_ACTIVE  PIN_LOW(CS_PORT, CS_PIN)
00033  #define CS_IDLE    PIN_HIGH(CS_PORT, CS_PIN)
00034  #define CS_OUTPUT  PIN_OUTPUT(CS_PORT, CS_PIN)
00035  #define RESET_ACTIVE  PIN_LOW(RESET_PORT, RESET_PIN)
00036  #define RESET_IDLE    PIN_HIGH(RESET_PORT, RESET_PIN)
00037  #define RESET_OUTPUT  PIN_OUTPUT(RESET_PORT, RESET_PIN)
00038 
00039 #define WR_ACTIVE2  {WR_ACTIVE; WR_ACTIVE;}
00040 #define WR_ACTIVE4  {WR_ACTIVE2; WR_ACTIVE2;}
00041 #define WR_ACTIVE8  {WR_ACTIVE4; WR_ACTIVE4;}
00042 #define RD_ACTIVE2  {RD_ACTIVE; RD_ACTIVE;}
00043 #define RD_ACTIVE4  {RD_ACTIVE2; RD_ACTIVE2;}
00044 #define RD_ACTIVE8  {RD_ACTIVE4; RD_ACTIVE4;}
00045 #define RD_ACTIVE16 {RD_ACTIVE8; RD_ACTIVE8;}
00046 #define WR_IDLE2  {WR_IDLE; WR_IDLE;}
00047 #define WR_IDLE4  {WR_IDLE2; WR_IDLE2;}
00048 #define RD_IDLE2  {RD_IDLE; RD_IDLE;}
00049 #define RD_IDLE4  {RD_IDLE2; RD_IDLE2;}
00050 
00051 // General macros.   IOCLR registers are 1 cycle when optimised.
00052 #define WR_STROBE { WR_ACTIVE; WR_IDLE; }         //PWLW=TWRL=50ns
00053 #define RD_STROBE RD_IDLE, RD_ACTIVE, RD_ACTIVE, RD_ACTIVE   //PWLR=TRDL=150ns
00054 
00055 #if defined(TEENSY) || defined(__ARM_ARCH_7EM__) // -O2: F411@100MHz = 1.44s 
00056 //#define WRITE_DELAY { WR_ACTIVE; WR_ACTIVE; WR_ACTIVE; WR_ACTIVE; }
00057 //#define READ_DELAY  { RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; }
00058 #if 0
00059 #elif defined(STM32F401xx)
00060 #warning 84MHz
00061 #define WRITE_DELAY { WR_ACTIVE2; } //100MHz
00062 #define READ_DELAY  { RD_ACTIVE4; }
00063 #elif defined(STM32F411xx)
00064 #define WRITE_DELAY { WR_ACTIVE2; WR_ACTIVE; } //100MHz
00065 #define READ_DELAY  { RD_ACTIVE4; RD_ACTIVE2; }
00066 #elif defined(STM32F446xx)
00067 #warning 180MHz
00068 #define WRITE_DELAY { WR_ACTIVE8; } //180MHz
00069 #define IDLE_DELAY  { WR_IDLE2;WR_IDLE; }
00070 #define READ_DELAY  { RD_ACTIVE16;}
00071 #elif defined(STM32F767xx)
00072 #warning 216MHz
00073 #define WRITE_DELAY { WR_ACTIVE8; WR_ACTIVE8; } //216MHz
00074 #define IDLE_DELAY  { WR_IDLE4;WR_IDLE4; }
00075 #define READ_DELAY  { RD_ACTIVE16;RD_ACTIVE16;RD_ACTIVE16;}
00076 #elif defined(STM32H743xx) //STM32H743 GPIO needs testing
00077 #define WRITE_DELAY { WR_ACTIVE8;WR_ACTIVE2; } //F_CPU=400MHz
00078 #define IDLE_DELAY  { WR_IDLE2;WR_IDLE; }
00079 #define READ_DELAY  { RD_ACTIVE16;RD_ACTIVE16;RD_ACTIVE4;}
00080 #else 
00081 #error check specific STM32
00082 #endif
00083 #elif defined(__ARM_ARCH_7M__) // -O2: F103@72MHz = 2.68s
00084 #define WRITE_DELAY { }
00085 #define READ_DELAY  { RD_ACTIVE;  }
00086 #elif defined(__ARM_ARCH_6M__) // -O2: F072@48MHz = 5.03s
00087 #define WRITE_DELAY { }
00088 #define READ_DELAY  { }
00089 #endif
00090 
00091 #ifndef IDLE_DELAY
00092 #define IDLE_DELAY    { WR_IDLE; }
00093 #endif
00094 
00095 #define write8(x)     { write_8(x); WRITE_DELAY; WR_STROBE; IDLE_DELAY; }
00096 #define write16(x)    { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
00097 #define READ_8(dst)   { RD_STROBE; READ_DELAY; dst = read_8(); RD_IDLE2; RD_IDLE; } // read 250ns after RD_ACTIVE goes low
00098 #define READ_16(dst)  { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }
00099 
00100 #define CTL_INIT()   { RD_OUTPUT; WR_OUTPUT; CD_OUTPUT; CS_OUTPUT; RESET_OUTPUT; }
00101 #define WriteCmd(x)  { CD_COMMAND; write16(x); CD_DATA; }
00102 #define WriteData(x) { write16(x); }
00103 
00104 #endif   //!USE_SERIAL
00105 #endif   //MCUFRIEND_KEIL_H_