David Prentice
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MCUFRIEND_kbv_R299
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MCUFRIEND_kbv.cpp
00001 //#define SUPPORT_0139 //S6D0139 +280 bytes 00002 #define SUPPORT_0154 //S6D0154 +320 bytes 00003 //#define SUPPORT_1289 //SSD1289,SSD1297 (ID=0x9797) +626 bytes, 0.03s 00004 //#define SUPPORT_1580 //R61580 Untested 00005 #define SUPPORT_1963 //only works with 16BIT bus anyway 00006 //#define SUPPORT_4532 //LGDP4532 +120 bytes. thanks Leodino 00007 #define SUPPORT_4535 //LGDP4535 +180 bytes 00008 #define SUPPORT_68140 //RM68140 +52 bytes defaults to PIXFMT=0x55 00009 //#define SUPPORT_7735 00010 #define SUPPORT_7781 //ST7781 +172 bytes 00011 //#define SUPPORT_8230 //UC8230 +118 bytes 00012 //#define SUPPORT_8347D //HX8347-D, HX8347-G, HX8347-I, HX8367-A +520 bytes, 0.27s 00013 //#define SUPPORT_8347A //HX8347-A +500 bytes, 0.27s 00014 //#define SUPPORT_8352A //HX8352A +486 bytes, 0.27s 00015 //#define SUPPORT_8352B //HX8352B 00016 //#define SUPPORT_8357D_GAMMA //monster 34 byte 00017 //#define SUPPORT_9163 // 00018 //#define SUPPORT_9225 //ILI9225-B, ILI9225-G ID=0x9225, ID=0x9226, ID=0x6813 +380 bytes 00019 //#define SUPPORT_9326_5420 //ILI9326, SPFD5420 +246 bytes 00020 //#define SUPPORT_9342 //costs +114 bytes 00021 //#define SUPPORT_9806 //UNTESTED 00022 #define SUPPORT_9488_555 //costs +230 bytes, 0.03s / 0.19s 00023 #define SUPPORT_B509_7793 //R61509, ST7793 +244 bytes 00024 #define OFFSET_9327 32 //costs about 103 bytes, 0.08s 00025 00026 #include "MCUFRIEND_kbv.h" 00027 #if defined(USE_SERIAL) 00028 #include "utility/mcufriend_serial.h" 00029 //uint8_t running; 00030 #elif defined(__MBED__) && !defined(ARDUINO_ARCH_MBED) 00031 #include "utility/mcufriend_mbed.h" 00032 #elif defined(__CC_ARM) || defined(__CROSSWORKS_ARM) || defined(IS_STM32CUBEIDE) 00033 #include "utility/mcufriend_keil.h" 00034 #else 00035 #include "utility/mcufriend_shield.h" 00036 #endif 00037 00038 #define MIPI_DCS_REV1 (1<<0) 00039 #define AUTO_READINC (1<<1) 00040 #define READ_BGR (1<<2) 00041 #define READ_LOWHIGH (1<<3) 00042 #define READ_24BITS (1<<4) 00043 #define XSA_XEA_16BIT (1<<5) 00044 #define READ_NODUMMY (1<<6) 00045 #define INVERT_GS (1<<8) 00046 #define INVERT_SS (1<<9) 00047 #define MV_AXIS (1<<10) 00048 #define INVERT_RGB (1<<11) 00049 #define REV_SCREEN (1<<12) 00050 #define FLIP_VERT (1<<13) 00051 #define FLIP_HORIZ (1<<14) 00052 00053 #if (defined(USES_16BIT_BUS)) //only comes from SPECIALs 00054 #define USING_16BIT_BUS 1 00055 #else 00056 #define USING_16BIT_BUS 0 00057 #endif 00058 00059 MCUFRIEND_kbv::MCUFRIEND_kbv(int CS, int RS, int WR, int RD, int _RST):Adafruit_GFX(240, 320) 00060 { 00061 // we can not access GPIO pins until AHB has been enabled. 00062 } 00063 00064 static uint8_t done_reset, is8347, is555, is9797; 00065 static uint16_t color565_to_555(uint16_t color) { 00066 return (color & 0xFFC0) | ((color & 0x1F) << 1) | ((color & 0x01)); //lose Green LSB, extend Blue LSB 00067 } 00068 static uint16_t color555_to_565(uint16_t color) { 00069 return (color & 0xFFC0) | ((color & 0x0400) >> 5) | ((color & 0x3F) >> 1); //extend Green LSB 00070 } 00071 static uint8_t color565_to_r(uint16_t color) { 00072 return ((color & 0xF800) >> 8); // transform to rrrrrxxx 00073 } 00074 static uint8_t color565_to_g(uint16_t color) { 00075 return ((color & 0x07E0) >> 3); // transform to ggggggxx 00076 } 00077 static uint8_t color565_to_b(uint16_t color) { 00078 return ((color & 0x001F) << 3); // transform to bbbbbxxx 00079 } 00080 static void write24(uint16_t color) { 00081 uint8_t r = color565_to_r(color); 00082 uint8_t g = color565_to_g(color); 00083 uint8_t b = color565_to_b(color); 00084 write8(r); 00085 write8(g); 00086 write8(b); 00087 } 00088 00089 void MCUFRIEND_kbv::reset(void) 00090 { 00091 done_reset = 1; 00092 setWriteDir(); 00093 CTL_INIT(); 00094 CS_IDLE; 00095 RD_IDLE; 00096 WR_IDLE; 00097 RESET_IDLE; 00098 delay(50); 00099 RESET_ACTIVE; 00100 delay(100); 00101 RESET_IDLE; 00102 delay(100); 00103 WriteCmdData(0xB0, 0x0000); //R61520 needs this to read ID 00104 } 00105 00106 static void writecmddata(uint16_t cmd, uint16_t dat) 00107 { 00108 CS_ACTIVE; 00109 WriteCmd(cmd); 00110 WriteData(dat); 00111 CS_IDLE; 00112 } 00113 00114 void MCUFRIEND_kbv::WriteCmdData(uint16_t cmd, uint16_t dat) { writecmddata(cmd, dat); } 00115 00116 static void WriteCmdParamN(uint16_t cmd, int8_t N, uint8_t * block) 00117 { 00118 CS_ACTIVE; 00119 WriteCmd(cmd); 00120 while (N-- > 0) { 00121 uint8_t u8 = *block++; 00122 write8(u8); 00123 if (N && is8347) { 00124 cmd++; 00125 WriteCmd(cmd); 00126 } 00127 } 00128 CS_IDLE; 00129 } 00130 00131 static inline void WriteCmdParam4(uint8_t cmd, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4) 00132 { 00133 uint8_t d[4]; 00134 d[0] = d1, d[1] = d2, d[2] = d3, d[3] = d4; 00135 WriteCmdParamN(cmd, 4, d); 00136 } 00137 00138 //#define WriteCmdParam4(cmd, d1, d2, d3, d4) {uint8_t d[4];d[0] = d1, d[1] = d2, d[2] = d3, d[3] = d4;WriteCmdParamN(cmd, 4, d);} 00139 void MCUFRIEND_kbv::pushCommand(uint16_t cmd, uint8_t * block, int8_t N) { WriteCmdParamN(cmd, N, block); } 00140 00141 static uint16_t read16bits(void) 00142 { 00143 uint16_t ret; 00144 uint8_t lo; 00145 #if USING_16BIT_BUS 00146 READ_16(ret); //single strobe to read whole bus 00147 if (ret > 255) //ID might say 0x00D3 00148 return ret; 00149 #else 00150 delay(1); //1us should be adequate 00151 READ_8(ret); 00152 #endif 00153 //all MIPI_DCS_REV1 style params are 8-bit 00154 delay(1); //1us should be adequate 00155 READ_8(lo); 00156 return (ret << 8) | lo; 00157 } 00158 00159 uint16_t MCUFRIEND_kbv::readReg(uint16_t reg, int8_t index) 00160 { 00161 uint16_t ret; 00162 uint8_t lo; 00163 if (!done_reset) 00164 reset(); 00165 CS_ACTIVE; 00166 WriteCmd(reg); 00167 setReadDir(); 00168 delay(1); //1us should be adequate 00169 // READ_16(ret); 00170 do { ret = read16bits(); }while (--index >= 0); //need to test with SSD1963 00171 RD_IDLE; 00172 CS_IDLE; 00173 setWriteDir(); 00174 return ret; 00175 } 00176 00177 uint32_t MCUFRIEND_kbv::readReg32(uint16_t reg) 00178 { 00179 uint16_t h = readReg(reg, 0); 00180 uint16_t l = readReg(reg, 1); 00181 return ((uint32_t) h << 16) | (l); 00182 } 00183 00184 uint32_t MCUFRIEND_kbv::readReg40(uint16_t reg) 00185 { 00186 uint16_t h = readReg(reg, 0); 00187 uint16_t m = readReg(reg, 1); 00188 uint16_t l = readReg(reg, 2); 00189 return ((uint32_t) h << 24) | (m << 8) | (l >> 8); 00190 } 00191 00192 uint16_t MCUFRIEND_kbv::readID(void) 00193 { 00194 uint16_t ret, ret2; 00195 uint8_t msb; 00196 ret = readReg(0); //forces a reset() if called before begin() 00197 if (ret == 0x5408) //the SPFD5408 fails the 0xD3D3 test. 00198 return 0x5408; 00199 if (ret == 0x5420) //the SPFD5420 fails the 0xD3D3 test. 00200 return 0x5420; 00201 if (ret == 0x8989) //SSD1289 is always 8989 00202 return 0x1289; 00203 ret = readReg(0x67); //HX8347-A 00204 if (ret == 0x4747) 00205 return 0x8347; 00206 ret = readReg40(0xEF); //ILI9327: [xx 02 04 93 27 FF] 00207 if (ret == 0x9327) 00208 return 0x9327; 00209 //#if defined(SUPPORT_1963) && USING_16BIT_BUS 00210 ret = readReg32(0xA1); //SSD1963: [01 57 61 01] 00211 if (ret == 0x6101) 00212 return 0x1963; 00213 if (ret == 0xFFFF) //R61526: [xx FF FF FF] 00214 return 0x1526; //subsequent begin() enables Command Access 00215 if (ret == 0xFF00) //R61520: [xx FF FF 00] 00216 return 0x1520; //subsequent begin() enables Command Access 00217 //#endif 00218 ret = readReg40(0xBF); 00219 if (ret == 0x8357) //HX8357B: [xx 01 62 83 57 FF] 00220 return 0x8357; 00221 if (ret == 0x9481) //ILI9481: [xx 02 04 94 81 FF] 00222 return 0x9481; 00223 if (ret == 0x1511) //?R61511: [xx 02 04 15 11] not tested yet 00224 return 0x1511; 00225 if (ret == 0x1520) //?R61520: [xx 01 22 15 20] 00226 return 0x1520; 00227 if (ret == 0x1526) //?R61526: [xx 01 22 15 26] 00228 return 0x1526; 00229 if (ret == 0x1581) //R61581: [xx 01 22 15 81] 00230 return 0x1581; 00231 if (ret == 0x1400) //?RM68140:[xx FF 68 14 00] not tested yet 00232 return 0x6814; 00233 ret = readReg32(0xD4); 00234 if (ret == 0x5310) //NT35310: [xx 01 53 10] 00235 return 0x5310; 00236 ret = readReg32(0xD7); 00237 if (ret == 0x8031) //weird unknown from BangGood [xx 20 80 31] PrinceCharles 00238 return 0x8031; 00239 ret = readReg32(0xFE) >> 8; //weird unknown from BangGood [04 20 53] 00240 if (ret == 0x2053) 00241 return 0x2053; 00242 uint32_t ret32 = readReg32(0x04); 00243 msb = ret32 >> 16; 00244 ret = ret32; 00245 // if (msb = 0x38 && ret == 0x8000) //unknown [xx 38 80 00] with D3 = 0x1602 00246 if (msb == 0x00 && ret == 0x8000) { //HX8357-D [xx 00 80 00] 00247 #if 1 00248 uint8_t cmds[] = {0xFF, 0x83, 0x57}; 00249 pushCommand(0xB9, cmds, 3); 00250 msb = readReg(0xD0); 00251 if (msb == 0x99) return 0x0099; //HX8357-D from datasheet 00252 if (msb == 0x90) //HX8357-C undocumented 00253 #endif 00254 return 0x9090; //BIG CHANGE: HX8357-D was 0x8357 00255 } 00256 // if (msb == 0xFF && ret == 0xFFFF) //R61526 [xx FF FF FF] 00257 // return 0x1526; //subsequent begin() enables Command Access 00258 if (ret == 0x1526) //R61526 [xx 06 15 26] if I have written NVM 00259 return 0x1526; //subsequent begin() enables Command Access 00260 if (ret == 0x89F0) //ST7735S: [xx 7C 89 F0] 00261 return 0x7735; 00262 if (ret == 0x8552) //ST7789V: [xx 85 85 52] 00263 return 0x7789; 00264 if (ret == 0xAC11) //?unknown [xx 61 AC 11] 00265 return 0xAC11; 00266 ret32 = readReg32(0xD3); //[xx 91 63 00] 00267 ret = ret32 >> 8; 00268 if (ret == 0x9163) return ret; 00269 ret = readReg32(0xD3); //for ILI9488, 9486, 9340, 9341 00270 if (ret == 0x3229) return ret; 00271 msb = ret >> 8; 00272 if (msb == 0x93 || msb == 0x94 || msb == 0x98 || msb == 0x77 || msb == 0x16) 00273 return ret; //0x9488, 9486, 9340, 9341, 7796 00274 if (ret == 0x00D3 || ret == 0xD3D3) 00275 return ret; //16-bit write-only bus 00276 /* 00277 msb = 0x12; //read 3rd,4th byte. does not work in parallel 00278 pushCommand(0xD9, &msb, 1); 00279 ret2 = readReg(0xD3); 00280 msb = 0x13; 00281 pushCommand(0xD9, &msb, 1); 00282 ret = (ret2 << 8) | readReg(0xD3); 00283 // if (ret2 == 0x93) 00284 return ret2; 00285 */ 00286 return readReg(0); //0154, 7783, 9320, 9325, 9335, B505, B509 00287 } 00288 00289 // independent cursor and window registers. S6D0154, ST7781 increments. ILI92320/5 do not. 00290 int16_t MCUFRIEND_kbv::readGRAM(int16_t x, int16_t y, uint16_t * block, int16_t w, int16_t h) 00291 { 00292 uint16_t ret, dummy, _MR = _MW; 00293 int16_t n = w * h, row = 0, col = 0; 00294 uint8_t r, g, b, tmp; 00295 if (!is8347 && _lcd_capable & MIPI_DCS_REV1) // HX8347 uses same register 00296 _MR = 0x2E; 00297 if (_lcd_ID == 0x1602) _MR = 0x2E; 00298 setAddrWindow(x, y, x + w - 1, y + h - 1); 00299 while (n > 0) { 00300 if (!(_lcd_capable & MIPI_DCS_REV1)) { 00301 WriteCmdData(_MC, x + col); 00302 WriteCmdData(_MP, y + row); 00303 } 00304 CS_ACTIVE; 00305 WriteCmd(_MR); 00306 setReadDir(); 00307 if (_lcd_capable & READ_NODUMMY) { 00308 ; 00309 } else if ((_lcd_capable & MIPI_DCS_REV1) || _lcd_ID == 0x1289) { 00310 READ_8(r); 00311 } else { 00312 READ_16(dummy); 00313 } 00314 if (_lcd_ID == 0x1511) READ_8(r); //extra dummy for R61511 00315 while (n) { 00316 if (_lcd_capable & READ_24BITS) { 00317 READ_8(r); 00318 READ_8(g); 00319 READ_8(b); 00320 if (_lcd_capable & READ_BGR) 00321 ret = color565(b, g, r); 00322 else 00323 ret = color565(r, g, b); 00324 } else { 00325 READ_16(ret); 00326 if (_lcd_capable & READ_LOWHIGH) 00327 ret = (ret >> 8) | (ret << 8); 00328 if (_lcd_capable & READ_BGR) 00329 ret = (ret & 0x07E0) | (ret >> 11) | (ret << 11); 00330 } 00331 #if defined(SUPPORT_9488_555) 00332 if (is555) ret = color555_to_565(ret); 00333 #endif 00334 *block++ = ret; 00335 n--; 00336 if (!(_lcd_capable & AUTO_READINC)) 00337 break; 00338 } 00339 if (++col >= w) { 00340 col = 0; 00341 if (++row >= h) 00342 row = 0; 00343 } 00344 RD_IDLE; 00345 CS_IDLE; 00346 setWriteDir(); 00347 } 00348 if (!(_lcd_capable & MIPI_DCS_REV1)) 00349 setAddrWindow(0, 0, width() - 1, height() - 1); 00350 return 0; 00351 } 00352 00353 void MCUFRIEND_kbv::setRotation(uint8_t r) 00354 { 00355 uint16_t GS, SS_v, ORG, REV = _lcd_rev; 00356 uint8_t val, d[3]; 00357 rotation = r & 3; // just perform the operation ourselves on the protected variables 00358 _width = (rotation & 1) ? HEIGHT : WIDTH; 00359 _height = (rotation & 1) ? WIDTH : HEIGHT; 00360 switch (rotation) { 00361 case 0: //PORTRAIT: 00362 val = 0x48; //MY=0, MX=1, MV=0, ML=0, BGR=1 00363 break; 00364 case 1: //LANDSCAPE: 90 degrees 00365 val = 0x28; //MY=0, MX=0, MV=1, ML=0, BGR=1 00366 break; 00367 case 2: //PORTRAIT_REV: 180 degrees 00368 val = 0x98; //MY=1, MX=0, MV=0, ML=1, BGR=1 00369 break; 00370 case 3: //LANDSCAPE_REV: 270 degrees 00371 val = 0xF8; //MY=1, MX=1, MV=1, ML=1, BGR=1 00372 break; 00373 } 00374 if (_lcd_capable & INVERT_GS) 00375 val ^= 0x80; 00376 if (_lcd_capable & INVERT_SS) 00377 val ^= 0x40; 00378 if (_lcd_capable & INVERT_RGB) 00379 val ^= 0x08; 00380 if (_lcd_capable & MIPI_DCS_REV1) { 00381 if (_lcd_ID == 0x6814) { //.kbv my weird 0x9486 might be 68140 00382 GS = (val & 0x80) ? (1 << 6) : 0; //MY 00383 SS_v = (val & 0x40) ? (1 << 5) : 0; //MX 00384 val &= 0x28; //keep MV, BGR, MY=0, MX=0, ML=0 00385 d[0] = 0; 00386 d[1] = GS | SS_v | 0x02; //MY, MX 00387 d[2] = 0x3B; 00388 WriteCmdParamN(0xB6, 3, d); 00389 goto common_MC; 00390 } else if (_lcd_ID == 0x1963 || _lcd_ID == 0x9481 || _lcd_ID == 0x1511) { 00391 if (val & 0x80) 00392 val |= 0x01; //GS 00393 if ((val & 0x40)) 00394 val |= 0x02; //SS 00395 if (_lcd_ID == 0x1963) val &= ~0xC0; 00396 if (_lcd_ID == 0x9481) val &= ~0xD0; 00397 if (_lcd_ID == 0x1511) { 00398 val &= ~0x10; //remove ML 00399 val |= 0xC0; //force penguin 180 rotation 00400 } 00401 // val &= (_lcd_ID == 0x1963) ? ~0xC0 : ~0xD0; //MY=0, MX=0 with ML=0 for ILI9481 00402 goto common_MC; 00403 } else if (is8347) { 00404 _MC = 0x02, _MP = 0x06, _MW = 0x22, _SC = 0x02, _EC = 0x04, _SP = 0x06, _EP = 0x08; 00405 if (_lcd_ID == 0x0065) { //HX8352-B 00406 val |= 0x01; //GS=1 00407 if ((val & 0x10)) val ^= 0xD3; //(ML) flip MY, MX, ML, SS, GS 00408 if (r & 1) _MC = 0x82, _MP = 0x80; 00409 else _MC = 0x80, _MP = 0x82; 00410 } 00411 if (_lcd_ID == 0x5252) { //HX8352-A 00412 val |= 0x02; //VERT_SCROLLON 00413 if ((val & 0x10)) val ^= 0xD4; //(ML) flip MY, MX, SS. GS=1 00414 } 00415 goto common_BGR; 00416 } 00417 common_MC: 00418 _MC = 0x2A, _MP = 0x2B, _MW = 0x2C, _SC = 0x2A, _EC = 0x2A, _SP = 0x2B, _EP = 0x2B; 00419 common_BGR: 00420 WriteCmdParamN(is8347 ? 0x16 : 0x36, 1, &val); 00421 _lcd_madctl = val; 00422 // if (_lcd_ID == 0x1963) WriteCmdParamN(0x13, 0, NULL); //NORMAL mode 00423 } 00424 // cope with 9320 variants 00425 else { 00426 switch (_lcd_ID) { 00427 #if defined(SUPPORT_9225) 00428 case 0x9225: 00429 _SC = 0x37, _EC = 0x36, _SP = 0x39, _EP = 0x38; 00430 _MC = 0x20, _MP = 0x21, _MW = 0x22; 00431 GS = (val & 0x80) ? (1 << 9) : 0; 00432 SS_v = (val & 0x40) ? (1 << 8) : 0; 00433 WriteCmdData(0x01, GS | SS_v | 0x001C); // set Driver Output Control 00434 goto common_ORG; 00435 #endif 00436 #if defined(SUPPORT_0139) || defined(SUPPORT_0154) 00437 #ifdef SUPPORT_0139 00438 case 0x0139: 00439 _SC = 0x46, _EC = 0x46, _SP = 0x48, _EP = 0x47; 00440 goto common_S6D; 00441 #endif 00442 #ifdef SUPPORT_0154 00443 case 0x0154: 00444 _SC = 0x37, _EC = 0x36, _SP = 0x39, _EP = 0x38; 00445 goto common_S6D; 00446 #endif 00447 common_S6D: 00448 _MC = 0x20, _MP = 0x21, _MW = 0x22; 00449 GS = (val & 0x80) ? (1 << 9) : 0; 00450 SS_v = (val & 0x40) ? (1 << 8) : 0; 00451 // S6D0139 requires NL = 0x27, S6D0154 NL = 0x28 00452 WriteCmdData(0x01, GS | SS_v | ((_lcd_ID == 0x0139) ? 0x27 : 0x28)); 00453 goto common_ORG; 00454 #endif 00455 case 0x5420: 00456 case 0x7793: 00457 case 0x9326: 00458 case 0xB509: 00459 _MC = 0x200, _MP = 0x201, _MW = 0x202, _SC = 0x210, _EC = 0x211, _SP = 0x212, _EP = 0x213; 00460 GS = (val & 0x80) ? (1 << 15) : 0; 00461 uint16_t NL; 00462 NL = ((432 / 8) - 1) << 9; 00463 if (_lcd_ID == 0x9326 || _lcd_ID == 0x5420) NL >>= 1; 00464 WriteCmdData(0x400, GS | NL); 00465 goto common_SS; 00466 default: 00467 _MC = 0x20, _MP = 0x21, _MW = 0x22, _SC = 0x50, _EC = 0x51, _SP = 0x52, _EP = 0x53; 00468 GS = (val & 0x80) ? (1 << 15) : 0; 00469 WriteCmdData(0x60, GS | 0x2700); // Gate Scan Line (0xA700) 00470 common_SS: 00471 SS_v = (val & 0x40) ? (1 << 8) : 0; 00472 WriteCmdData(0x01, SS_v); // set Driver Output Control 00473 common_ORG: 00474 ORG = (val & 0x20) ? (1 << 3) : 0; 00475 #ifdef SUPPORT_8230 00476 if (_lcd_ID == 0x8230) { // UC8230 has strange BGR and READ_BGR behaviour 00477 if (rotation == 1 || rotation == 2) { 00478 val ^= 0x08; // change BGR bit for LANDSCAPE and PORTRAIT_REV 00479 } 00480 } 00481 #endif 00482 if (val & 0x08) 00483 ORG |= 0x1000; //BGR 00484 _lcd_madctl = ORG | 0x0030; 00485 WriteCmdData(0x03, _lcd_madctl); // set GRAM write direction and BGR=1. 00486 break; 00487 #ifdef SUPPORT_1289 00488 case 0x1289: 00489 _MC = 0x4E, _MP = 0x4F, _MW = 0x22, _SC = 0x44, _EC = 0x44, _SP = 0x45, _EP = 0x46; 00490 if (rotation & 1) 00491 val ^= 0xD0; // exchange Landscape modes 00492 GS = (val & 0x80) ? (1 << 14) : 0; //called TB (top-bottom), CAD=0 00493 SS_v = (val & 0x40) ? (1 << 9) : 0; //called RL (right-left) 00494 ORG = (val & 0x20) ? (1 << 3) : 0; //called AM 00495 _lcd_drivOut = GS | SS_v | (REV << 13) | 0x013F; //REV=0, BGR=0, MUX=319 00496 if (val & 0x08) 00497 _lcd_drivOut |= 0x0800; //BGR 00498 WriteCmdData(0x01, _lcd_drivOut); // set Driver Output Control 00499 if (is9797) WriteCmdData(0x11, ORG | 0x4C30); else // DFM=2, DEN=1, WM=1, TY=0 00500 WriteCmdData(0x11, ORG | 0x6070); // DFM=3, EN=0, TY=1 00501 break; 00502 #endif 00503 } 00504 } 00505 if ((rotation & 1) && ((_lcd_capable & MV_AXIS) == 0)) { 00506 uint16_t x; 00507 x = _MC, _MC = _MP, _MP = x; 00508 x = _SC, _SC = _SP, _SP = x; //.kbv check 0139 00509 x = _EC, _EC = _EP, _EP = x; //.kbv check 0139 00510 } 00511 setAddrWindow(0, 0, width() - 1, height() - 1); 00512 vertScroll(0, HEIGHT, 0); //reset scrolling after a rotation 00513 } 00514 00515 void MCUFRIEND_kbv::drawPixel(int16_t x, int16_t y, uint16_t color) 00516 { 00517 // MCUFRIEND just plots at edge if you try to write outside of the box: 00518 if (x < 0 || y < 0 || x >= width() || y >= height()) 00519 return; 00520 #if defined(SUPPORT_9488_555) 00521 if (is555) color = color565_to_555(color); 00522 #endif 00523 setAddrWindow(x, y, x, y); 00524 // CS_ACTIVE; WriteCmd(_MW); write16(color); CS_IDLE; //-0.01s +98B 00525 if (is9797) { CS_ACTIVE; WriteCmd(_MW); write24(color); CS_IDLE;} else 00526 WriteCmdData(_MW, color); 00527 } 00528 00529 void MCUFRIEND_kbv::setAddrWindow(int16_t x, int16_t y, int16_t x1, int16_t y1) 00530 { 00531 #if defined(OFFSET_9327) 00532 if (_lcd_ID == 0x9327) { 00533 if (rotation == 2) y += OFFSET_9327, y1 += OFFSET_9327; 00534 if (rotation == 3) x += OFFSET_9327, x1 += OFFSET_9327; 00535 } 00536 #endif 00537 #if 1 00538 if (_lcd_ID == 0x1526 && (rotation & 1)) { 00539 int16_t dx = x1 - x, dy = y1 - y; 00540 if (dy == 0) { y1++; } 00541 else if (dx == 0) { x1 += dy; y1 -= dy; } 00542 } 00543 #endif 00544 if (_lcd_capable & MIPI_DCS_REV1) { 00545 WriteCmdParam4(_SC, x >> 8, x, x1 >> 8, x1); //Start column instead of _MC 00546 WriteCmdParam4(_SP, y >> 8, y, y1 >> 8, y1); // 00547 if (is8347 && _lcd_ID == 0x0065) { //HX8352-B has separate _MC, _SC 00548 uint8_t d[2]; 00549 d[0] = x >> 8; d[1] = x; 00550 WriteCmdParamN(_MC, 2, d); //allows !MV_AXIS to work 00551 d[0] = y >> 8; d[1] = y; 00552 WriteCmdParamN(_MP, 2, d); 00553 } 00554 } else { 00555 WriteCmdData(_MC, x); 00556 WriteCmdData(_MP, y); 00557 if (!(x == x1 && y == y1)) { //only need MC,MP for drawPixel 00558 if (_lcd_capable & XSA_XEA_16BIT) { 00559 if (rotation & 1) 00560 y1 = y = (y1 << 8) | y; 00561 else 00562 x1 = x = (x1 << 8) | x; 00563 } 00564 WriteCmdData(_SC, x); 00565 WriteCmdData(_SP, y); 00566 WriteCmdData(_EC, x1); 00567 WriteCmdData(_EP, y1); 00568 } 00569 } 00570 } 00571 00572 void MCUFRIEND_kbv::fillRect(int16_t x, int16_t y, int16_t w, int16_t h, uint16_t color) 00573 { 00574 int16_t end; 00575 #if defined(SUPPORT_9488_555) 00576 if (is555) color = color565_to_555(color); 00577 #endif 00578 if (w < 0) { 00579 w = -w; 00580 x -= w; 00581 } //+ve w 00582 end = x + w; 00583 if (x < 0) 00584 x = 0; 00585 if (end > width()) 00586 end = width(); 00587 w = end - x; 00588 if (h < 0) { 00589 h = -h; 00590 y -= h; 00591 } //+ve h 00592 end = y + h; 00593 if (y < 0) 00594 y = 0; 00595 if (end > height()) 00596 end = height(); 00597 h = end - y; 00598 setAddrWindow(x, y, x + w - 1, y + h - 1); 00599 CS_ACTIVE; 00600 WriteCmd(_MW); 00601 if (h > w) { 00602 end = h; 00603 h = w; 00604 w = end; 00605 } 00606 uint8_t hi = color >> 8, lo = color & 0xFF; 00607 while (h-- > 0) { 00608 end = w; 00609 #if USING_16BIT_BUS 00610 #if defined(__MK66FX1M0__) //180MHz M4 00611 #define STROBE_16BIT {WR_ACTIVE4;WR_ACTIVE;WR_IDLE4;WR_IDLE;} //56ns 00612 #elif defined(__SAM3X8E__) //84MHz M3 00613 #define STROBE_16BIT {WR_ACTIVE4;WR_ACTIVE2;WR_IDLE4;WR_IDLE2;} //286ns ?ILI9486 00614 //#define STROBE_16BIT {WR_ACTIVE4;WR_ACTIVE;WR_IDLE4;WR_IDLE;} //238ns SSD1289 00615 //#define STROBE_16BIT {WR_ACTIVE2;WR_ACTIVE;WR_IDLE2;} //119ns RM68140 00616 #else //16MHz AVR 00617 #define STROBE_16BIT {WR_ACTIVE;WR_ACTIVE;WR_IDLE; } //375ns ?ILI9486 00618 #endif 00619 write_16(color); //we could just do the strobe 00620 lo = end & 7; 00621 hi = end >> 3; 00622 if (hi) 00623 do { 00624 STROBE_16BIT; 00625 STROBE_16BIT; 00626 STROBE_16BIT; 00627 STROBE_16BIT; 00628 STROBE_16BIT; 00629 STROBE_16BIT; 00630 STROBE_16BIT; 00631 STROBE_16BIT; 00632 } while (--hi > 0); 00633 while (lo-- > 0) { 00634 STROBE_16BIT; 00635 } 00636 #else 00637 #if defined(SUPPORT_1289) 00638 if (is9797) { 00639 uint8_t r = color565_to_r(color); 00640 uint8_t g = color565_to_g(color); 00641 uint8_t b = color565_to_b(color); 00642 do { 00643 write8(r); 00644 write8(g); 00645 write8(b); 00646 } while (--end != 0); 00647 } else 00648 #endif 00649 do { 00650 write8(hi); 00651 write8(lo); 00652 } while (--end != 0); 00653 #endif 00654 } 00655 CS_IDLE; 00656 if (!(_lcd_capable & MIPI_DCS_REV1) || ((_lcd_ID == 0x1526) && (rotation & 1))) 00657 setAddrWindow(0, 0, width() - 1, height() - 1); 00658 } 00659 00660 static void pushColors_any(uint16_t cmd, uint8_t * block, int16_t n, bool first, uint8_t flags) 00661 { 00662 uint16_t color; 00663 uint8_t h, l; 00664 bool isconst = flags & 1; 00665 bool isbigend = (flags & 2) != 0; 00666 CS_ACTIVE; 00667 if (first) { 00668 WriteCmd(cmd); 00669 } 00670 00671 if (!isconst && !isbigend) { 00672 uint16_t *block16 = (uint16_t*)block; 00673 while (n-- > 0) { 00674 color = *block16++; 00675 write16(color); 00676 } 00677 } else 00678 00679 while (n-- > 0) { 00680 if (isconst) { 00681 h = pgm_read_byte(block++); 00682 l = pgm_read_byte(block++); 00683 } else { 00684 h = (*block++); 00685 l = (*block++); 00686 } 00687 color = (isbigend) ? (h << 8 | l) : (l << 8 | h); 00688 #if defined(SUPPORT_9488_555) 00689 if (is555) color = color565_to_555(color); 00690 #endif 00691 if (is9797) write24(color); else 00692 write16(color); 00693 } 00694 CS_IDLE; 00695 } 00696 00697 void MCUFRIEND_kbv::pushColors(uint16_t * block, int16_t n, bool first) 00698 { 00699 pushColors_any(_MW, (uint8_t *)block, n, first, 0); 00700 } 00701 void MCUFRIEND_kbv::pushColors(uint8_t * block, int16_t n, bool first) 00702 { 00703 pushColors_any(_MW, (uint8_t *)block, n, first, 2); //regular bigend 00704 } 00705 void MCUFRIEND_kbv::pushColors(const uint8_t * block, int16_t n, bool first, bool bigend) 00706 { 00707 pushColors_any(_MW, (uint8_t *)block, n, first, bigend ? 3 : 1); 00708 } 00709 00710 void MCUFRIEND_kbv::vertScroll(int16_t top, int16_t scrollines, int16_t offset) 00711 { 00712 #if defined(OFFSET_9327) 00713 if (_lcd_ID == 0x9327) { 00714 if (rotation == 2 || rotation == 3) top += OFFSET_9327; 00715 } 00716 #endif 00717 int16_t bfa = HEIGHT - top - scrollines; // bottom fixed area 00718 int16_t vsp; 00719 int16_t sea = top; 00720 if (_lcd_ID == 0x9327) bfa += 32; 00721 if (offset <= -scrollines || offset >= scrollines) offset = 0; //valid scroll 00722 vsp = top + offset; // vertical start position 00723 if (offset < 0) 00724 vsp += scrollines; //keep in unsigned range 00725 sea = top + scrollines - 1; 00726 if (_lcd_capable & MIPI_DCS_REV1) { 00727 uint8_t d[6]; // for multi-byte parameters 00728 /* 00729 if (_lcd_ID == 0x9327) { //panel is wired for 240x432 00730 if (rotation == 2 || rotation == 3) { //180 or 270 degrees 00731 if (scrollines == HEIGHT) { 00732 scrollines = 432; // we get a glitch but hey-ho 00733 vsp -= 432 - HEIGHT; 00734 } 00735 if (vsp < 0) 00736 vsp += 432; 00737 } 00738 bfa = 432 - top - scrollines; 00739 } 00740 */ 00741 d[0] = top >> 8; //TFA 00742 d[1] = top; 00743 d[2] = scrollines >> 8; //VSA 00744 d[3] = scrollines; 00745 d[4] = bfa >> 8; //BFA 00746 d[5] = bfa; 00747 WriteCmdParamN(is8347 ? 0x0E : 0x33, 6, d); 00748 // if (offset == 0 && rotation > 1) vsp = top + scrollines; //make non-valid 00749 d[0] = vsp >> 8; //VSP 00750 d[1] = vsp; 00751 WriteCmdParamN(is8347 ? 0x14 : 0x37, 2, d); 00752 if (is8347) { 00753 d[0] = (offset != 0) ? (_lcd_ID == 0x8347 ? 0x02 : 0x08) : 0; 00754 WriteCmdParamN(_lcd_ID == 0x8347 ? 0x18 : 0x01, 1, d); //HX8347-D 00755 } else if (offset == 0 && (_lcd_capable & MIPI_DCS_REV1)) { 00756 WriteCmdParamN(0x13, 0, NULL); //NORMAL i.e. disable scroll 00757 } 00758 return; 00759 } 00760 // cope with 9320 style variants: 00761 switch (_lcd_ID) { 00762 case 0x7783: 00763 WriteCmdData(0x61, _lcd_rev); //!NDL, !VLE, REV 00764 WriteCmdData(0x6A, vsp); //VL# 00765 break; 00766 #ifdef SUPPORT_0139 00767 case 0x0139: 00768 WriteCmdData(0x07, 0x0213 | (_lcd_rev << 2)); //VLE1=1, GON=1, REV=x, D=3 00769 WriteCmdData(0x41, vsp); //VL# check vsp 00770 break; 00771 #endif 00772 #if defined(SUPPORT_0154) || defined(SUPPORT_9225) //thanks tongbajiel 00773 case 0x9225: 00774 case 0x0154: 00775 WriteCmdData(0x31, sea); //SEA 00776 WriteCmdData(0x32, top); //SSA 00777 WriteCmdData(0x33, vsp - top); //SST 00778 break; 00779 #endif 00780 #ifdef SUPPORT_1289 00781 case 0x1289: 00782 WriteCmdData(0x41, vsp); //VL# 00783 break; 00784 #endif 00785 case 0x5420: 00786 case 0x7793: 00787 case 0x9326: 00788 case 0xB509: 00789 WriteCmdData(0x401, (1 << 1) | _lcd_rev); //VLE, REV 00790 WriteCmdData(0x404, vsp); //VL# 00791 break; 00792 default: 00793 // 0x6809, 0x9320, 0x9325, 0x9335, 0xB505 can only scroll whole screen 00794 WriteCmdData(0x61, (1 << 1) | _lcd_rev); //!NDL, VLE, REV 00795 WriteCmdData(0x6A, vsp); //VL# 00796 break; 00797 } 00798 } 00799 00800 void MCUFRIEND_kbv::invertDisplay(bool i) 00801 { 00802 uint8_t val; 00803 _lcd_rev = ((_lcd_capable & REV_SCREEN) != 0) ^ i; 00804 if (_lcd_capable & MIPI_DCS_REV1) { 00805 if (is8347) { 00806 // HX8347D: 0x36 Panel Characteristic. REV_Panel 00807 // HX8347A: 0x36 is Display Control 10 00808 if (_lcd_ID == 0x8347 || _lcd_ID == 0x5252) // HX8347-A, HX5352-A 00809 val = _lcd_rev ? 6 : 2; //INVON id bit#2, NORON=bit#1 00810 else val = _lcd_rev ? 8 : 10; //HX8347-D, G, I: SCROLLON=bit3, INVON=bit1 00811 // HX8347: 0x01 Display Mode has diff bit mapping for A, D 00812 WriteCmdParamN(0x01, 1, &val); 00813 } else 00814 WriteCmdParamN(_lcd_rev ? 0x21 : 0x20, 0, NULL); 00815 return; 00816 } 00817 // cope with 9320 style variants: 00818 switch (_lcd_ID) { 00819 #ifdef SUPPORT_0139 00820 case 0x0139: 00821 #endif 00822 case 0x9225: //REV is in reg(0x07) like Samsung 00823 case 0x0154: 00824 WriteCmdData(0x07, 0x13 | (_lcd_rev << 2)); //.kbv kludge 00825 break; 00826 #ifdef SUPPORT_1289 00827 case 0x1289: 00828 _lcd_drivOut &= ~(1 << 13); 00829 if (_lcd_rev) 00830 _lcd_drivOut |= (1 << 13); 00831 WriteCmdData(0x01, _lcd_drivOut); 00832 break; 00833 #endif 00834 case 0x5420: 00835 case 0x7793: 00836 case 0x9326: 00837 case 0xB509: 00838 WriteCmdData(0x401, (1 << 1) | _lcd_rev); //.kbv kludge VLE 00839 break; 00840 default: 00841 WriteCmdData(0x61, _lcd_rev); 00842 break; 00843 } 00844 } 00845 00846 #define TFTLCD_DELAY 0xFFFF 00847 #define TFTLCD_DELAY8 0x7F 00848 static void init_table(const void *table, int16_t size) 00849 { 00850 //copes with any uint8_t table. Even HX8347 style 00851 uint8_t *p = (uint8_t *) table; 00852 while (size > 0) { 00853 uint8_t cmd = pgm_read_byte(p++); 00854 uint8_t len = pgm_read_byte(p++); 00855 if (cmd == TFTLCD_DELAY8) { 00856 delay(len); 00857 len = 0; 00858 } else { 00859 CS_ACTIVE; 00860 CD_COMMAND; 00861 write8(cmd); 00862 for (uint8_t d = 0; d++ < len; ) { 00863 uint8_t x = pgm_read_byte(p++); 00864 CD_DATA; 00865 write8(x); 00866 if (is8347 && d < len) { 00867 CD_COMMAND; 00868 cmd++; 00869 write8(cmd); 00870 } 00871 } 00872 CS_IDLE; 00873 } 00874 size -= len + 2; 00875 } 00876 } 00877 00878 static void init_table16(const void *table, int16_t size) 00879 { 00880 uint16_t *p = (uint16_t *) table; 00881 while (size > 0) { 00882 uint16_t cmd = pgm_read_word(p++); 00883 uint16_t d = pgm_read_word(p++); 00884 if (cmd == TFTLCD_DELAY) 00885 delay(d); 00886 else { 00887 writecmddata(cmd, d); //static function 00888 } 00889 size -= 2 * sizeof(int16_t); 00890 } 00891 } 00892 00893 void MCUFRIEND_kbv::begin(uint16_t ID) 00894 { 00895 int16_t *p16; //so we can "write" to a const protected variable. 00896 const uint8_t *table8_ads = NULL; 00897 int16_t table_size; 00898 reset(); 00899 _lcd_xor = 0; 00900 switch (_lcd_ID = ID) { 00901 /* 00902 static const uint16_t _regValues[] PROGMEM = { 00903 0x0000, 0x0001, // start oscillation 00904 0x0007, 0x0000, // source output control 0 D0 00905 0x0013, 0x0000, // power control 3 off 00906 0x0011, 0x2604, // 00907 0x0014, 0x0015, // 00908 0x0010, 0x3C00, // 00909 // 0x0013, 0x0040, // 00910 // 0x0013, 0x0060, // 00911 // 0x0013, 0x0070, // 00912 0x0013, 0x0070, // power control 3 PON PON1 AON 00913 00914 0x0001, 0x0127, // driver output control 00915 // 0x0002, 0x0700, // field 0 b/c waveform xor waveform 00916 0x0003, 0x1030, // 00917 0x0007, 0x0000, // 00918 0x0008, 0x0404, // 00919 0x000B, 0x0200, // 00920 0x000C, 0x0000, // 00921 0x00015,0x0000, // 00922 00923 //gamma setting 00924 0x0030, 0x0000, 00925 0x0031, 0x0606, 00926 0x0032, 0x0006, 00927 0x0033, 0x0403, 00928 0x0034, 0x0107, 00929 0x0035, 0x0101, 00930 0x0036, 0x0707, 00931 0x0037, 0x0304, 00932 0x0038, 0x0A00, 00933 0x0039, 0x0706, 00934 00935 0x0040, 0x0000, 00936 0x0041, 0x0000, 00937 0x0042, 0x013F, 00938 0x0043, 0x0000, 00939 0x0044, 0x0000, 00940 0x0045, 0x0000, 00941 0x0046, 0xEF00, 00942 0x0047, 0x013F, 00943 0x0048, 0x0000, 00944 0x0007, 0x0011, 00945 0x0007, 0x0017, 00946 }; 00947 */ 00948 #ifdef SUPPORT_0139 00949 case 0x0139: 00950 _lcd_capable = REV_SCREEN | XSA_XEA_16BIT; //remove AUTO_READINC 00951 static const uint16_t S6D0139_regValues[] PROGMEM = { 00952 0x0000, 0x0001, //Start oscillator 00953 0x0011, 0x1a00, //Power Control 2 00954 0x0014, 0x2020, //Power Control 4 00955 0x0010, 0x0900, //Power Control 1 00956 0x0013, 0x0040, //Power Control 3 00957 0x0013, 0x0060, //Power Control 3 00958 0x0013, 0x0070, //Power Control 3 00959 0x0011, 0x1a04, //Power Control 2 00960 0x0010, 0x2f00, //Power Control 1 00961 0x0001, 0x0127, //Driver Control: SM=0, GS=0, SS=1, 240x320 00962 0x0002, 0x0100, //LCD Control: (.kbv was 0700) FLD=0, BC= 0, EOR=1 00963 0x0003, 0x1030, //Entry Mode: TR1=0, DFM=0, BGR=1, I_D=3 00964 0x0007, 0x0000, //Display Control: everything off 00965 0x0008, 0x0303, //Blank Period: FP=3, BP=3 00966 0x0009, 0x0000, //f.k. 00967 0x000b, 0x0000, //Frame Control: 00968 0x000c, 0x0000, //Interface Control: system i/f 00969 0x0040, 0x0000, //Scan Line 00970 0x0041, 0x0000, //Vertical Scroll Control 00971 0x0007, 0x0014, //Display Control: VLE1=0, SPT=0, GON=1, REV=1, D=0 (halt) 00972 0x0007, 0x0016, //Display Control: VLE1=0, SPT=0, GON=1, REV=1, D=2 (blank) 00973 0x0007, 0x0017, //Display Control: VLE1=0, SPT=0, GON=1, REV=1, D=3 (normal) 00974 // 0x0007, 0x0217, //Display Control: VLE1=1, SPT=0, GON=1, REV=1, D=3 00975 }; 00976 init_table16(S6D0139_regValues, sizeof(S6D0139_regValues)); 00977 break; 00978 #endif 00979 00980 #ifdef SUPPORT_0154 00981 case 0x0154: 00982 _lcd_capable = AUTO_READINC | REV_SCREEN; 00983 static const uint16_t S6D0154_regValues[] PROGMEM = { 00984 0x0011, 0x001A, 00985 0x0012, 0x3121, //BT=3, DC1=1, DC2=2, DC3=1 00986 0x0013, 0x006C, //GVD=108 00987 0x0014, 0x4249, //VCM=66, VML=73 00988 00989 0x0010, 0x0800, //SAP=8 00990 TFTLCD_DELAY, 10, 00991 0x0011, 0x011A, //APON=0, PON=1, AON=0, VCI1_EN=1, VC=10 00992 TFTLCD_DELAY, 10, 00993 0x0011, 0x031A, //APON=0, PON=3, AON=0, VCI1_EN=1, VC=10 00994 TFTLCD_DELAY, 10, 00995 0x0011, 0x071A, //APON=0, PON=7, AON=0, VCI1_EN=1, VC=10 00996 TFTLCD_DELAY, 10, 00997 0x0011, 0x0F1A, //APON=0, PON=15, AON=0, VCI1_EN=1, VC=10 00998 TFTLCD_DELAY, 10, 00999 0x0011, 0x0F3A, //APON=0, PON=15, AON=1, VCI1_EN=1, VC=10 01000 TFTLCD_DELAY, 30, 01001 01002 0x0001, 0x0128, 01003 0x0002, 0x0100, 01004 0x0003, 0x1030, 01005 0x0007, 0x1012, 01006 0x0008, 0x0303, 01007 0x000B, 0x1100, 01008 0x000C, 0x0000, 01009 0x000F, 0x1801, 01010 0x0015, 0x0020, 01011 01012 0x0050,0x0101, 01013 0x0051,0x0603, 01014 0x0052,0x0408, 01015 0x0053,0x0000, 01016 0x0054,0x0605, 01017 0x0055,0x0406, 01018 0x0056,0x0303, 01019 0x0057,0x0303, 01020 0x0058,0x0010, 01021 0x0059,0x1000, 01022 01023 0x0007, 0x0012, //GON=1, REV=0, D=2 01024 TFTLCD_DELAY, 40, 01025 0x0007, 0x0013, //GON=1, REV=0, D=3 01026 0x0007, 0x0017, //GON=1, REV=1, D=3 DISPLAY ON 01027 }; 01028 init_table16(S6D0154_regValues, sizeof(S6D0154_regValues)); 01029 01030 break; 01031 #endif 01032 01033 #ifdef SUPPORT_1289 01034 case 0x9797: 01035 is9797 = 1; 01036 // _lcd_capable = 0 | XSA_XEA_16BIT | REV_SCREEN | AUTO_READINC | READ_24BITS; 01037 // deliberately set READ_BGR to disable Software Scroll in graphictest_kbv example 01038 _lcd_capable = 0 | XSA_XEA_16BIT | REV_SCREEN | AUTO_READINC | READ_24BITS | READ_BGR; 01039 _lcd_ID = 0x1289; 01040 goto common_1289; 01041 case 0x1289: 01042 _lcd_capable = 0 | XSA_XEA_16BIT | REV_SCREEN | AUTO_READINC; 01043 common_1289: 01044 // came from MikroElektronika library http://www.hmsprojects.com/tft_lcd.html 01045 static const uint16_t SSD1289_regValues[] PROGMEM = { 01046 0x0000, 0x0001, 01047 0x0003, 0xA8A4, 01048 0x000C, 0x0000, 01049 0x000D, 0x000A, // VRH=10 01050 0x000E, 0x2B00, 01051 0x001E, 0x00B7, 01052 0x0001, 0x2B3F, // setRotation() alters 01053 0x0002, 0x0600, // B_C=1, EOR=1 01054 0x0010, 0x0000, 01055 0x0011, 0x6070, // setRotation() alters 01056 0x0005, 0x0000, 01057 0x0006, 0x0000, 01058 0x0016, 0xEF1C, 01059 0x0017, 0x0003, 01060 0x0007, 0x0233, 01061 0x000B, 0x0000, 01062 0x000F, 0x0000, 01063 0x0030, 0x0707, 01064 0x0031, 0x0204, 01065 0x0032, 0x0204, 01066 0x0033, 0x0502, 01067 0x0034, 0x0507, 01068 0x0035, 0x0204, 01069 0x0036, 0x0204, 01070 0x0037, 0x0502, 01071 0x003A, 0x0302, 01072 0x003B, 0x0302, 01073 0x0023, 0x0000, 01074 0x0024, 0x0000, 01075 0x0025, 0x8000, 01076 }; 01077 init_table16(SSD1289_regValues, sizeof(SSD1289_regValues)); 01078 break; 01079 #endif 01080 01081 case 0x1511: // Unknown from Levy 01082 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1; //extra read_8(dummy) 01083 static const uint8_t R61511_regValues[] PROGMEM = { 01084 0xB0, 1, 0x00, //Command Access Protect 01085 }; 01086 table8_ads = R61511_regValues, table_size = sizeof(R61511_regValues); 01087 p16 = (int16_t *) & HEIGHT; 01088 *p16 = 480; 01089 p16 = (int16_t *) & WIDTH; 01090 *p16 = 320; 01091 break; 01092 01093 case 0x1520: 01094 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; 01095 static const uint8_t R61520_regValues[] PROGMEM = { 01096 0xB0, 1, 0x00, //Command Access Protect 01097 0xC0, 1, 0x0A, //DM=1, BGR=1 01098 }; 01099 table8_ads = R61520_regValues, table_size = sizeof(R61520_regValues); 01100 break; 01101 01102 case 0x1526: 01103 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; 01104 static const uint8_t R61526_regValues[] PROGMEM = { 01105 0xB0, 1, 0x03, //Command Access 01106 0xE2, 1, 0x3F, //Command Write Access 01107 0xC0, 1, 0x22, //REV=0, BGR=1, SS=0 01108 0xE2, 1, 0x00, //Command Write Protect 01109 }; 01110 table8_ads = R61526_regValues, table_size = sizeof(R61526_regValues); 01111 break; 01112 01113 #ifdef SUPPORT_1580 01114 case 0x1580: 01115 _lcd_capable = 0 | REV_SCREEN | READ_BGR | INVERT_GS | READ_NODUMMY; //thanks vanhan123 01116 static const uint16_t R61580_regValues[] PROGMEM = { //from MCHIP Graphics Lib drvTFT001.c 01117 // Synchronization after reset 01118 TFTLCD_DELAY, 2, 01119 0x0000, 0x0000, 01120 0x0000, 0x0000, 01121 0x0000, 0x0000, 01122 0x0000, 0x0000, 01123 01124 // Setup display 01125 0x00A4, 0x0001, // CALB=1 01126 TFTLCD_DELAY, 2, 01127 0x0060, 0xA700, // Driver Output Control 01128 0x0008, 0x0808, // Display Control BP=8, FP=8 01129 0x0030, 0x0111, // y control 01130 0x0031, 0x2410, // y control 01131 0x0032, 0x0501, // y control 01132 0x0033, 0x050C, // y control 01133 0x0034, 0x2211, // y control 01134 0x0035, 0x0C05, // y control 01135 0x0036, 0x2105, // y control 01136 0x0037, 0x1004, // y control 01137 0x0038, 0x1101, // y control 01138 0x0039, 0x1122, // y control 01139 0x0090, 0x0019, // 80Hz 01140 0x0010, 0x0530, // Power Control 01141 0x0011, 0x0237, //DC1=2, DC0=3, VC=7 01142 // 0x0011, 0x17B0, //DC1=7, DC0=3, VC=0 ?b12 ?b7 vanhan123 01143 0x0012, 0x01BF, //VCMR=1, PSON=1, PON=1, VRH=15 01144 // 0x0012, 0x013A, //VCMR=1, PSON=1, PON=1, VRH=10 vanhan123 01145 0x0013, 0x1300, //VDV=19 01146 TFTLCD_DELAY, 100, 01147 01148 0x0001, 0x0100, 01149 0x0002, 0x0200, 01150 0x0003, 0x1030, 01151 0x0009, 0x0001, 01152 0x000A, 0x0008, 01153 0x000C, 0x0001, 01154 0x000D, 0xD000, 01155 0x000E, 0x0030, 01156 0x000F, 0x0000, 01157 0x0020, 0x0000, 01158 0x0021, 0x0000, 01159 0x0029, 0x0077, 01160 0x0050, 0x0000, 01161 0x0051, 0xD0EF, 01162 0x0052, 0x0000, 01163 0x0053, 0x013F, 01164 0x0061, 0x0001, 01165 0x006A, 0x0000, 01166 0x0080, 0x0000, 01167 0x0081, 0x0000, 01168 0x0082, 0x005F, 01169 0x0093, 0x0701, 01170 0x0007, 0x0100, 01171 }; 01172 static const uint16_t R61580_DEM240320C[] PROGMEM = { //from DEM 240320C TMH-PW-N 01173 0x00, 0x0000, 01174 0x00, 0x0000, 01175 TFTLCD_DELAY, 100, 01176 0x00, 0x0000, 01177 0x00, 0x0000, 01178 0x00, 0x0000, 01179 0x00, 0x0000, 01180 0xA4, 0x0001, 01181 TFTLCD_DELAY, 100, 01182 0x60, 0xA700, 01183 0x08, 0x0808, 01184 /******************************************/ 01185 //Gamma Setting: 01186 0x30, 0x0203, 01187 0x31, 0x080F, 01188 0x32, 0x0401, 01189 0x33, 0x050B, 01190 0x34, 0x3330, 01191 0x35, 0x0B05, 01192 0x36, 0x0005, 01193 0x37, 0x0F08, 01194 0x38, 0x0302, 01195 0x39, 0x3033, 01196 /******************************************/ 01197 //Power Setting: 01198 0x90, 0x0018, //80Hz 01199 0x10, 0x0530, //BT,AP 01200 0x11, 0x0237, //DC1,DC0,VC 01201 0x12, 0x01BF, 01202 0x13, 0x1000, //VCOM 01203 TFTLCD_DELAY, 200, 01204 /******************************************/ 01205 0x01, 0x0100, 01206 0x02, 0x0200, 01207 0x03, 0x1030, 01208 0x09, 0x0001, 01209 0x0A, 0x0008, 01210 0x0C, 0x0000, 01211 0x0D, 0xD000, 01212 01213 0x0E, 0x0030, 01214 0x0F, 0x0000, 01215 0x20, 0x0000, //H Start 01216 0x21, 0x0000, //V Start 01217 0x29, 0x002E, 01218 0x50, 0x0000, 01219 0x51, 0x00EF, 01220 0x52, 0x0000, 01221 0x53, 0x013F, 01222 0x61, 0x0001, 01223 0x6A, 0x0000, 01224 0x80, 0x0000, 01225 0x81, 0x0000, 01226 0x82, 0x005F, 01227 0x93, 0x0701, 01228 /******************************************/ 01229 0x07, 0x0100, 01230 TFTLCD_DELAY, 100, 01231 }; 01232 init_table16(R61580_DEM240320C, sizeof(R61580_DEM240320C)); 01233 // init_table16(R61580_regValues, sizeof(R61580_regValues)); 01234 break; 01235 #endif 01236 01237 #if defined(SUPPORT_1963) && USING_16BIT_BUS 01238 case 0x1963: 01239 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | READ_NODUMMY | INVERT_SS | INVERT_RGB; 01240 // from NHD 5.0" 8-bit 01241 static const uint8_t SSD1963_NHD_50_regValues[] PROGMEM = { 01242 (0xE0), 1, 0x01, // PLL enable 01243 TFTLCD_DELAY8, 10, 01244 (0xE0), 1, 0x03, // Lock PLL 01245 (0xB0), 7, 0x08, 0x80, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION 01246 (0xF0), 1, 0x03, //was 00 pixel data interface 01247 // (0x3A), 1, 0x60, // SET R G B format = 6 6 6 01248 (0xE2), 3, 0x1D, 0x02, 0x54, //PLL multiplier, set PLL clock to 120M 01249 (0xE6), 3, 0x02, 0xFF, 0xFF, //PLL setting for PCLK, depends on resolution 01250 (0xB4), 8, 0x04, 0x20, 0x00, 0x58, 0x80, 0x00, 0x00, 0x00, //HSYNC 01251 (0xB6), 7, 0x02, 0x0D, 0x00, 0x20, 0x01, 0x00, 0x00, //VSYNC 01252 (0x13), 0, //Enter Normal mode 01253 (0x38), 0, //Exit Idle mode 01254 }; 01255 // from NHD 7.0" 8-bit 01256 static const uint8_t SSD1963_NHD_70_regValues[] PROGMEM = { 01257 (0xE2), 3, 0x1D, 0x02, 0x04, //PLL multiplier, set PLL clock to 120M 01258 (0xE0), 1, 0x01, // PLL enable 01259 TFTLCD_DELAY8, 10, 01260 (0xE0), 1, 0x03, // Lock PLL 01261 0x01, 0, //Soft Reset 01262 TFTLCD_DELAY8, 120, 01263 (0xB0), 7, 0x08, 0x80, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION 01264 (0xF0), 1, 0x03, //was 00 pixel data interface 01265 // (0x3A), 1, 0x60, // SET R G B format = 6 6 6 01266 (0xE6), 3, 0x0F, 0xFF, 0xFF, //PLL setting for PCLK, depends on resolution 01267 (0xB4), 8, 0x04, 0x20, 0x00, 0x58, 0x80, 0x00, 0x00, 0x00, //HSYNC 01268 (0xB6), 7, 0x02, 0x0D, 0x00, 0x20, 0x01, 0x00, 0x00, //VSYNC 01269 (0x13), 0, //Enter Normal mode 01270 (0x38), 0, //Exit Idle mode 01271 }; 01272 // from UTFTv2.81 initlcd.h 01273 static const uint8_t SSD1963_800_regValues[] PROGMEM = { 01274 (0xE2), 3, 0x1E, 0x02, 0x54, //PLL multiplier, set PLL clock to 120M 01275 (0xE0), 1, 0x01, // PLL enable 01276 TFTLCD_DELAY8, 10, 01277 (0xE0), 1, 0x03, // 01278 TFTLCD_DELAY8, 10, 01279 0x01, 0, //Soft Reset 01280 TFTLCD_DELAY8, 100, 01281 (0xE6), 3, 0x03, 0xFF, 0xFF, //PLL setting for PCLK, depends on resolution 01282 (0xB0), 7, 0x24, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION 01283 // (0xB0), 7, 0x24, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x2D, //LCD SPECIFICATION 01284 (0xB4), 8, 0x03, 0xA0, 0x00, 0x2E, 0x30, 0x00, 0x0F, 0x00, //HSYNC 01285 (0xB6), 7, 0x02, 0x0D, 0x00, 0x10, 0x10, 0x00, 0x08, //VSYNC 01286 (0xBA), 1, 0x0F, //GPIO[3:0] out 1 01287 (0xB8), 2, 0x07, 0x01, //GPIO3=input, GPIO[2:0]=output 01288 (0xF0), 1, 0x03, //pixel data interface 01289 TFTLCD_DELAY8, 1, 01290 0x28, 0, //Display Off 01291 0x11, 0, //Sleep Out 01292 TFTLCD_DELAY8, 100, 01293 0x29, 0, //Display On 01294 (0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00, //set PWM for B/L 01295 (0xD0), 1, 0x0D, 01296 }; 01297 // from UTFTv2.82 initlcd.h 01298 static const uint8_t SSD1963_800NEW_regValues[] PROGMEM = { 01299 (0xE2), 3, 0x1E, 0x02, 0x54, //PLL multiplier, set PLL clock to 120M 01300 (0xE0), 1, 0x01, // PLL enable 01301 TFTLCD_DELAY8, 10, 01302 (0xE0), 1, 0x03, // 01303 TFTLCD_DELAY8, 10, 01304 0x01, 0, //Soft Reset 01305 TFTLCD_DELAY8, 100, 01306 (0xE6), 3, 0x03, 0xFF, 0xFF, //PLL setting for PCLK, depends on resolution 01307 (0xB0), 7, 0x24, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION 01308 (0xB4), 8, 0x03, 0xA0, 0x00, 0x2E, 0x30, 0x00, 0x0F, 0x00, //HSYNC HT=928, HPS=46, HPW=48, LPS=15 01309 (0xB6), 7, 0x02, 0x0D, 0x00, 0x10, 0x10, 0x00, 0x08, //VSYNC VT=525, VPS=16, VPW=16, FPS=8 01310 (0xBA), 1, 0x0F, //GPIO[3:0] out 1 01311 (0xB8), 2, 0x07, 0x01, //GPIO3=input, GPIO[2:0]=output 01312 (0xF0), 1, 0x03, //pixel data interface 01313 TFTLCD_DELAY8, 1, 01314 0x28, 0, //Display Off 01315 0x11, 0, //Sleep Out 01316 TFTLCD_DELAY8, 100, 01317 0x29, 0, //Display On 01318 (0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00, //set PWM for B/L 01319 (0xD0), 1, 0x0D, 01320 }; 01321 // from UTFTv2.82 initlcd.h 01322 static const uint8_t SSD1963_800ALT_regValues[] PROGMEM = { 01323 (0xE2), 3, 0x23, 0x02, 0x04, //PLL multiplier, set PLL clock to 120M 01324 (0xE0), 1, 0x01, // PLL enable 01325 TFTLCD_DELAY8, 10, 01326 (0xE0), 1, 0x03, // 01327 TFTLCD_DELAY8, 10, 01328 0x01, 0, //Soft Reset 01329 TFTLCD_DELAY8, 100, 01330 (0xE6), 3, 0x04, 0x93, 0xE0, //PLL setting for PCLK, depends on resolution 01331 (0xB0), 7, 0x00, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION 01332 (0xB4), 8, 0x03, 0xA0, 0x00, 0x2E, 0x30, 0x00, 0x0F, 0x00, //HSYNC HT=928, HPS=46, HPW=48, LPS=15 01333 (0xB6), 7, 0x02, 0x0D, 0x00, 0x10, 0x10, 0x00, 0x08, //VSYNC VT=525, VPS=16, VPW=16, FPS=8 01334 (0xBA), 1, 0x0F, //GPIO[3:0] out 1 01335 (0xB8), 2, 0x07, 0x01, //GPIO3=input, GPIO[2:0]=output 01336 (0xF0), 1, 0x03, //pixel data interface 01337 TFTLCD_DELAY8, 1, 01338 0x28, 0, //Display Off 01339 0x11, 0, //Sleep Out 01340 TFTLCD_DELAY8, 100, 01341 0x29, 0, //Display On 01342 (0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00, //set PWM for B/L 01343 (0xD0), 1, 0x0D, 01344 }; 01345 // from UTFTv2.82 initlcd.h 01346 static const uint8_t SSD1963_480_regValues[] PROGMEM = { 01347 (0xE2), 3, 0x23, 0x02, 0x54, //PLL multiplier, set PLL clock to 120M 01348 (0xE0), 1, 0x01, // PLL enable 01349 TFTLCD_DELAY8, 10, 01350 (0xE0), 1, 0x03, // 01351 TFTLCD_DELAY8, 10, 01352 0x01, 0, //Soft Reset 01353 TFTLCD_DELAY8, 100, 01354 (0xE6), 3, 0x01, 0x1F, 0xFF, //PLL setting for PCLK, depends on resolution 01355 (0xB0), 7, 0x20, 0x00, 0x01, 0xDF, 0x01, 0x0F, 0x00, //LCD SPECIFICATION 01356 (0xB4), 8, 0x02, 0x13, 0x00, 0x08, 0x2B, 0x00, 0x02, 0x00, //HSYNC 01357 (0xB6), 7, 0x01, 0x20, 0x00, 0x04, 0x0C, 0x00, 0x02, //VSYNC 01358 (0xBA), 1, 0x0F, //GPIO[3:0] out 1 01359 (0xB8), 2, 0x07, 0x01, //GPIO3=input, GPIO[2:0]=output 01360 (0xF0), 1, 0x03, //pixel data interface 01361 TFTLCD_DELAY8, 1, 01362 0x28, 0, //Display Off 01363 0x11, 0, //Sleep Out 01364 TFTLCD_DELAY8, 100, 01365 0x29, 0, //Display On 01366 (0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00, //set PWM for B/L 01367 (0xD0), 1, 0x0D, 01368 }; 01369 // table8_ads = SSD1963_480_regValues, table_size = sizeof(SSD1963_480_regValues); 01370 table8_ads = SSD1963_800_regValues, table_size = sizeof(SSD1963_800_regValues); 01371 // table8_ads = SSD1963_NHD_50_regValues, table_size = sizeof(SSD1963_NHD_50_regValues); 01372 // table8_ads = SSD1963_NHD_70_regValues, table_size = sizeof(SSD1963_NHD_70_regValues); 01373 // table8_ads = SSD1963_800NEW_regValues, table_size = sizeof(SSD1963_800NEW_regValues); 01374 // table8_ads = SSD1963_800ALT_regValues, table_size = sizeof(SSD1963_800ALT_regValues); 01375 p16 = (int16_t *) & HEIGHT; 01376 *p16 = 480; 01377 p16 = (int16_t *) & WIDTH; 01378 *p16 = 800; 01379 break; 01380 #endif 01381 01382 case 0x3229: 01383 _lcd_capable = 0 | AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | INVERT_SS; // | READ_24BITS; 01384 static const uint8_t UNK3229_regValues[] PROGMEM = { 01385 //----------------Star Initial Sequence-------// 01386 // 0x11, 0, // exit sleep 01387 0x06, 0, //enter extern command [cmd=0x0607] 01388 0x07, 0, 01389 0xb1, 2, 0x00, 0x12, //RTN [00 12] 01390 0xb4, 1, 0x02, //line inversion [02] 01391 0xb6, 4, 0x00, 0x20, 0x27, 0x00, //[0A 82 27 00] 01392 0xca, 1, 0x01, // [23] 01393 0xcb, 1, 0x03, // [20] 01394 0xc0, 1, 0x13, //vrh [21] 01395 TFTLCD_DELAY8, 20, 01396 0xc5, 1, 0xcc, // [00] 01397 0xc6, 1, 0x00, // [00] 01398 0xc7, 1, 0x04, //osc [83] 01399 0xc8, 1, 0x03, // [20] 01400 0xcc, 1, 0x06, //vcm [31] 01401 0xcd, 1, 0x1c, //vdv [18] 01402 0xf9, 2, 0x15, 0x15, // ?? 13bit 454 [37] 01403 0xf3, 3, 0x0a, 0x02, 0x0a, // [06 03 06] 01404 0xf6, 3, 0x01, 0x10, 0x00, // [01 10 00] 01405 /* 01406 0xe0, 1, 0x05, //I don't believe these registers 01407 0xe1, 1, 0x32, //safer to use power-on defaults 01408 0xe2, 1, 0x77, 01409 0xe3, 1, 0x77, 01410 0xe4, 1, 0x7f, 01411 0xe5, 1, 0xfa, 01412 0xe6, 1, 0x00, 01413 0xe7, 1, 0x74, 01414 0xe8, 1, 0x27, 01415 0xe9, 1, 0x10, 01416 0xea, 1, 0xc0, 01417 0xeb, 1, 0x25, 01418 */ 01419 0xfa, 0, //exit extern command [cmd=0xFAFB] 01420 0xfb, 0, 01421 }; 01422 table8_ads = UNK3229_regValues, table_size = sizeof(UNK3229_regValues); // 01423 break; 01424 01425 #ifdef SUPPORT_4532 01426 //Support for LG Electronics LGDP4532 (also 4531 i guess) by Leodino v1.0 2-Nov-2016 01427 //based on data by waveshare and the datasheet of LG Electronics 01428 //My approach to get it working: the parameters by waveshare did no make it function allright 01429 //I started with remming lines to see if this helped. Basically the stuff in range 41-93 01430 //gives problems. 01431 //The other lines that are REMmed give no problems, but it seems default values are OK as well. 01432 case 0x4532: // thanks Leodino 01433 _lcd_capable = 0 | REV_SCREEN; // | INVERT_GS; 01434 static const uint16_t LGDP4532_regValues[] PROGMEM = { 01435 0x0000,0x0001, //Device code read 01436 0x0010,0x0628, //Power control 1 SAP[2:0] BT[3:0] AP[2:0] DK DSTB SLP 01437 0x0012,0x0006, //Power control 3 PON VRH[3:0] 01438 //0x0013,0x0A32, //Power control 4 VCOMG VDV[4:0] VCM[6:0] 01439 0x0011,0x0040, //Power control 2; DC1[2:0] DC0[2:0] VC[2:0] 01440 //0x0015,0x0050, //Regulator control RSET RI[2:0] RV[2:0] RCONT[2:0] 01441 0x0012,0x0016, //Power control 3 PON VRH[3:0] 01442 TFTLCD_DELAY,50, 01443 0x0010,0x5660, //Power control 1 SAP[2:0] BT[3:0] AP[2:0] DK DSTB SLP 01444 TFTLCD_DELAY,50, 01445 //0x0013,0x2A4E, //Power control 4 VCOMG VDV[4:0] VCM[6:0] 01446 //0x0001,0x0100, //Driver output control SM SS 01447 //0x0002,0x0300, //LCD Driving Wave Control 01448 //0x0003,0x1030, //Entry mode TRI DFM BGR ORG I/D[1:0] AM 01449 //0x0007,0x0202, //Display Control 1 PTDE[1:0] BASEE GON DTE COL D[1:0] 01450 TFTLCD_DELAY,50, 01451 //0x0008,0x0202, //Display Control 2 FP[3:0] BP[3:0] front and back porch (blank period at begin and end..) 01452 //0x000A,0x0000, //Test Register 1 (RA0h) 01453 //Gamma adjustment 01454 0x0030,0x0000, 01455 0x0031,0x0402, 01456 0x0032,0x0106, 01457 0x0033,0x0700, 01458 0x0034,0x0104, 01459 0x0035,0x0301, 01460 0x0036,0x0707, 01461 0x0037,0x0305, 01462 0x0038,0x0208, 01463 0x0039,0x0F0B, 01464 TFTLCD_DELAY,50, 01465 //some of this stuff in range 41-93 really throws things off.... 01466 //0x0041,0x0002, 01467 //0x0060,0x2700, //Driver Output Control (R60h) 01468 //0x0061,0x0001, //Base Image Display Control (R61h) 01469 //0x0090,0x0119, //Panel Interface Control 1 (R90h) DIVI[1:0] RTNI[4:0] 01470 //0x0092,0x010A, //Panel Interface Control 2 (R92h) NOWI[2:0] EQI2[1:0] EQI1[1:0] 01471 //0x0093,0x0004, //Panel Interface Control 3 (R93h) MCPI[2:0] 01472 //0x00A0,0x0100, //Test Register 1 (RA0h) 01473 TFTLCD_DELAY,50, 01474 0x0007,0x0133, //Display Control 1 PTDE[1:0] BASEE GON DTE COL D[1:0] 01475 TFTLCD_DELAY,50, 01476 //0x00A0,0x0000, //Test Register 1 (RA0h) 01477 }; 01478 init_table16(LGDP4532_regValues, sizeof(LGDP4532_regValues)); 01479 break; 01480 #endif 01481 01482 #ifdef SUPPORT_4535 01483 case 0x4535: 01484 _lcd_capable = 0 | REV_SCREEN; // | INVERT_GS; 01485 static const uint16_t LGDP4535_regValues[] PROGMEM = { 01486 0x0015, 0x0030, // Set the internal vcore voltage 01487 0x009A, 0x0010, // Start internal OSC 01488 0x0011, 0x0020, // set SS and SM bit 01489 0x0010, 0x3428, // set 1 line inversion 01490 0x0012, 0x0002, // set GRAM write direction and BGR=1 01491 0x0013, 0x1038, // Resize register 01492 TFTLCD_DELAY, 40, 01493 0x0012, 0x0012, // set the back porch and front porch 01494 TFTLCD_DELAY, 40, 01495 0x0010, 0x3420, // set non-display area refresh cycle ISC[3:0] 01496 0x0013, 0x3045, // FMARK function 01497 TFTLCD_DELAY, 70, 01498 0x0030, 0x0000, // RGB interface setting 01499 0x0031, 0x0402, // Frame marker Position 01500 0x0032, 0x0307, // RGB interface polarity 01501 0x0033, 0x0304, // SAP, BT[3:0], AP, DSTB, SLP, STB 01502 0x0034, 0x0004, // DC1[2:0], DC0[2:0], VC[2:0] 01503 0x0035, 0x0401, // VREG1OUT voltage 01504 0x0036, 0x0707, // VDV[4:0] for VCOM amplitude 01505 0x0037, 0x0305, // SAP, BT[3:0], AP, DSTB, SLP, STB 01506 0x0038, 0x0610, // DC1[2:0], DC0[2:0], VC[2:0] 01507 0x0039, 0x0610, // VREG1OUT voltage 01508 0x0001, 0x0100, // VDV[4:0] for VCOM amplitude 01509 0x0002, 0x0300, // VCM[4:0] for VCOMH 01510 0x0003, 0x1030, // GRAM horizontal Address 01511 0x0008, 0x0808, // GRAM Vertical Address 01512 0x000A, 0x0008, 01513 0x0060, 0x2700, // Gate Scan Line 01514 0x0061, 0x0001, // NDL,VLE, REV 01515 0x0090, 0x013E, 01516 0x0092, 0x0100, 01517 0x0093, 0x0100, 01518 0x00A0, 0x3000, 01519 0x00A3, 0x0010, 01520 0x0007, 0x0001, 01521 0x0007, 0x0021, 01522 0x0007, 0x0023, 01523 0x0007, 0x0033, 01524 0x0007, 0x0133, 01525 }; 01526 init_table16(LGDP4535_regValues, sizeof(LGDP4535_regValues)); 01527 break; 01528 #endif 01529 01530 case 0x5310: 01531 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | INVERT_SS | INVERT_RGB | READ_24BITS; 01532 static const uint8_t NT35310_regValues[] PROGMEM = { // 01533 TFTLCD_DELAY8, 10, //just some dummy 01534 }; 01535 table8_ads = NT35310_regValues, table_size = sizeof(NT35310_regValues); 01536 p16 = (int16_t *) & HEIGHT; 01537 *p16 = 480; 01538 p16 = (int16_t *) & WIDTH; 01539 *p16 = 320; 01540 break; 01541 01542 #ifdef SUPPORT_68140 01543 case 0x6814: 01544 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; 01545 static const uint8_t RM68140_regValues_max[] PROGMEM = { // 01546 0x3A, 1, 0x55, //Pixel format .kbv my Mega Shield 01547 }; 01548 table8_ads = RM68140_regValues_max, table_size = sizeof(RM68140_regValues_max); 01549 p16 = (int16_t *) & HEIGHT; 01550 *p16 = 480; 01551 p16 = (int16_t *) & WIDTH; 01552 *p16 = 320; 01553 break; 01554 #endif 01555 01556 #ifdef SUPPORT_7735 01557 case 0x7735: // 01558 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN | READ_24BITS; 01559 static const uint8_t PROGMEM table7735S[] = { 01560 // (COMMAND_BYTE), n, data_bytes.... 01561 0xB1, 3, 0x01, 0x2C, 0x2D, // [05 3C 3C] FRMCTR1 if GM==11 01562 0xB2, 3, 0x01, 0x2C, 0x2D, // [05 3C 3C] 01563 0xB3, 6, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D, // [05 3C 3C 05 3C 3C] 01564 0xB4, 1, 0x07, // [07] INVCTR Column inversion 01565 //ST7735XR Power Sequence 01566 0xC0, 3, 0xA2, 0x02, 0x84, // [A8 08 84] PWCTR1 01567 0xC1, 1, 0xC5, // [C0] 01568 0xC2, 2, 0x0A, 0x00, // [0A 00] 01569 0xC3, 2, 0x8A, 0x2A, // [8A 26] 01570 0xC4, 2, 0x8A, 0xEE, // [8A EE] 01571 0xC5, 1, 0x0E, // [05] VMCTR1 VCOM 01572 }; 01573 table8_ads = table7735S, table_size = sizeof(table7735S); // 01574 p16 = (int16_t *) & HEIGHT; 01575 *p16 = 160; 01576 p16 = (int16_t *) & WIDTH; 01577 *p16 = 128; 01578 break; 01579 #endif 01580 01581 #ifdef SUPPORT_7781 01582 case 0x7783: 01583 _lcd_capable = AUTO_READINC | REV_SCREEN | INVERT_GS; 01584 static const uint16_t ST7781_regValues[] PROGMEM = { 01585 0x00FF, 0x0001, //can we do 0xFF 01586 0x00F3, 0x0008, 01587 // LCD_Write_COM(0x00F3, 01588 01589 0x00, 0x0001, 01590 0x0001, 0x0100, // Driver Output Control Register (R01h) 01591 0x0002, 0x0700, // LCD Driving Waveform Control (R02h) 01592 0x0003, 0x1030, // Entry Mode (R03h) 01593 0x0008, 0x0302, 01594 0x0009, 0x0000, 01595 0x0010, 0x0000, // Power Control 1 (R10h) 01596 0x0011, 0x0007, // Power Control 2 (R11h) 01597 0x0012, 0x0000, // Power Control 3 (R12h) 01598 0x0013, 0x0000, // Power Control 4 (R13h) 01599 TFTLCD_DELAY, 50, 01600 0x0010, 0x14B0, // Power Control 1 SAP=1, BT=4, APE=1, AP=3 01601 TFTLCD_DELAY, 10, 01602 0x0011, 0x0007, // Power Control 2 VC=7 01603 TFTLCD_DELAY, 10, 01604 0x0012, 0x008E, // Power Control 3 VCIRE=1, VRH=14 01605 0x0013, 0x0C00, // Power Control 4 VDV=12 01606 0x0029, 0x0015, // NVM read data 2 VCM=21 01607 TFTLCD_DELAY, 10, 01608 0x0030, 0x0000, // Gamma Control 1 01609 0x0031, 0x0107, // Gamma Control 2 01610 0x0032, 0x0000, // Gamma Control 3 01611 0x0035, 0x0203, // Gamma Control 6 01612 0x0036, 0x0402, // Gamma Control 7 01613 0x0037, 0x0000, // Gamma Control 8 01614 0x0038, 0x0207, // Gamma Control 9 01615 0x0039, 0x0000, // Gamma Control 10 01616 0x003C, 0x0203, // Gamma Control 13 01617 0x003D, 0x0403, // Gamma Control 14 01618 0x0060, 0xA700, // Driver Output Control (R60h) .kbv was 0xa700 01619 0x0061, 0x0001, // Driver Output Control (R61h) 01620 0x0090, 0X0029, // Panel Interface Control 1 (R90h) 01621 01622 // Display On 01623 0x0007, 0x0133, // Display Control (R07h) 01624 TFTLCD_DELAY, 50, 01625 }; 01626 static const uint16_t ST7781_regValues_CPT24[] PROGMEM = { 01627 0x0001, 0x0100, // Driver Output Control Register (R01h) 01628 0x0002, 0x0700, // LCD Driving Waveform Control (R02h) 01629 0x0003, 0x1030, // Entry Mode (R03h) 01630 0x0008, 0x0302, // Porch 01631 0x0009, 0x0000, // Scan 01632 0x000A, 0x0008, // Fmark Off 01633 0x0010, 0x0000, // Power Control 1 (R10h) 01634 0x0011, 0x0005, // Power Control 2 (R11h) 01635 0x0012, 0x0000, // Power Control 3 (R12h) 01636 0x0013, 0x0000, // Power Control 4 (R13h) 01637 TFTLCD_DELAY, 100, 01638 0x0010, 0x12B0, // Power Control 1 SAP=1, BT=2, APE=1, AP=3 01639 TFTLCD_DELAY, 50, 01640 0x0011, 0x0007, // Power Control 2 VC=7 01641 TFTLCD_DELAY, 50, 01642 0x0012, 0x008C, // Power Control 3 VCIRE=1, VRH=12 01643 0x0013, 0x1700, // Power Control 4 VDV=23 01644 0x0029, 0x0020, // NVM read data 2 VCM=32 01645 TFTLCD_DELAY, 50, 01646 0x0030, 0x0000, // Gamma Control 1 App Note CPT 2.4 01647 0x0031, 0x0106, // Gamma Control 2 01648 0x0032, 0x0101, // Gamma Control 3 01649 0x0035, 0x0106, // Gamma Control 4 01650 0x0036, 0x0203, // Gamma Control 5 01651 0x0037, 0x0000, // Gamma Control 6 01652 0x0038, 0x0707, // Gamma Control 7 01653 0x0039, 0x0204, // Gamma Control 8 01654 0x003C, 0x0106, // Gamma Control 9 01655 0x003D, 0x0103, // Gamma Control 10 01656 0x0060, 0xA700, // Driver Output Control (R60h) .kbv was 0xa700 01657 0x0061, 0x0001, // Driver Output Control (R61h) 01658 0x0090, 0X0030, // Panel Interface Control 1 (R90h) 01659 01660 // Display On 01661 0x0007, 0x0133, // Display Control (R07h) 01662 TFTLCD_DELAY, 50, 01663 }; 01664 init_table16(ST7781_regValues_CPT24, sizeof(ST7781_regValues_CPT24)); 01665 //init_table16(ST7781_regValues, sizeof(ST7781_regValues)); 01666 break; 01667 #endif 01668 01669 case 0x7789: 01670 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; 01671 static const uint8_t ST7789_regValues[] PROGMEM = { 01672 (0xB2), 5, 0x0C, 0x0C, 0x00, 0x33, 0x33, //PORCTRK: Porch setting [08 08 00 22 22] PSEN=0 anyway 01673 (0xB7), 1, 0x35, //GCTRL: Gate Control [35] 01674 (0xBB), 1, 0x2B, //VCOMS: VCOM setting VCOM=1.175 [20] VCOM=0.9 01675 (0xC0), 1, 0x04, //LCMCTRL: LCM Control [2C] 01676 (0xC2), 2, 0x01, 0xFF, //VDVVRHEN: VDV and VRH Command Enable [01 FF] 01677 (0xC3), 1, 0x11, //VRHS: VRH Set VAP=4.4, VAN=-4.4 [0B] 01678 (0xC4), 1, 0x20, //VDVS: VDV Set [20] 01679 (0xC6), 1, 0x0F, //FRCTRL2: Frame Rate control in normal mode [0F] 01680 (0xD0), 2, 0xA4, 0xA1, //PWCTRL1: Power Control 1 [A4 A1] 01681 (0xE0), 14, 0xD0, 0x00, 0x05, 0x0E, 0x15, 0x0D, 0x37, 0x43, 0x47, 0x09, 0x15, 0x12, 0x16, 0x19, //PVGAMCTRL: Positive Voltage Gamma control 01682 (0xE1), 14, 0xD0, 0x00, 0x05, 0x0D, 0x0C, 0x06, 0x2D, 0x44, 0x40, 0x0E, 0x1C, 0x18, 0x16, 0x19, //NVGAMCTRL: Negative Voltage Gamma control 01683 }; 01684 static const uint8_t ST7789_regValues_arcain6[] PROGMEM = { 01685 (0xB2), 5, 0x0C, 0x0C, 0x00, 0x33, 0x33, //PORCTRK: Porch setting [08 08 00 22 22] PSEN=0 anyway 01686 (0xB7), 1, 0x35, //GCTRL: Gate Control [35] 01687 (0xBB), 1, 0x35, //VCOMS: VCOM setting VCOM=??? [20] VCOM=0.9 01688 (0xC0), 1, 0x2C, //LCMCTRL: LCM Control [2C] 01689 (0xC2), 2, 0x01, 0xFF, //VDVVRHEN: VDV and VRH Command Enable [01 FF] 01690 (0xC3), 1, 0x13, //VRHS: VRH Set VAP=???, VAN=-??? [0B] 01691 (0xC4), 1, 0x20, //VDVS: VDV Set [20] 01692 (0xC6), 1, 0x0F, //FRCTRL2: Frame Rate control in normal mode [0F] 01693 (0xCA), 1, 0x0F, //REGSEL2 [0F] 01694 (0xC8), 1, 0x08, //REGSEL1 [08] 01695 (0x55), 1, 0x90, //WRCACE [00] 01696 (0xD0), 2, 0xA4, 0xA1, //PWCTRL1: Power Control 1 [A4 A1] 01697 (0xE0), 14, 0xD0, 0x00, 0x06, 0x09, 0x0B, 0x2A, 0x3C, 0x55, 0x4B, 0x08, 0x16, 0x14, 0x19, 0x20, //PVGAMCTRL: Positive Voltage Gamma control 01698 (0xE1), 14, 0xD0, 0x00, 0x06, 0x09, 0x0B, 0x29, 0x36, 0x54, 0x4B, 0x0D, 0x16, 0x14, 0x21, 0x20, //NVGAMCTRL: Negative Voltage Gamma control 01699 }; 01700 table8_ads = ST7789_regValues, table_size = sizeof(ST7789_regValues); // 01701 break; 01702 01703 case 0x8031: //Unknown BangGood thanks PrinceCharles 01704 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN; 01705 static const uint8_t FK8031_regValues[] PROGMEM = { 01706 // 0xF2:8.2 = SM, 0xF2:8.0 = REV. invertDisplay(), vertScroll() do not work 01707 0xF2,11, 0x16, 0x16, 0x03, 0x08, 0x08, 0x08, 0x08, 0x10, 0x04, 0x16, 0x16, // f.k. 0xF2:8.2 SM=1 01708 0xFD, 3, 0x11, 0x02, 0x35, //f.k 0xFD:1.1 creates contiguous scan lins 01709 }; 01710 table8_ads = FK8031_regValues, table_size = sizeof(FK8031_regValues); 01711 break; 01712 01713 #ifdef SUPPORT_8347D 01714 case 0x4747: //HX8347-D 01715 _lcd_capable = REV_SCREEN | MIPI_DCS_REV1 | MV_AXIS | INVERT_SS | AUTO_READINC | READ_24BITS; 01716 goto common_8347DGI; 01717 case 0x6767: //HX8367-A 01718 case 0x7575: //HX8347-G 01719 case 0x9595: //HX8347-I 01720 _lcd_capable = REV_SCREEN | MIPI_DCS_REV1 | MV_AXIS; 01721 common_8347DGI: 01722 is8347 = 1; 01723 static const uint8_t HX8347G_2_regValues[] PROGMEM = { 01724 0xEA, 2, 0x00, 0x20, //PTBA[15:0] 01725 0xEC, 2, 0x0C, 0xC4, //STBA[15:0] 01726 0xE8, 1, 0x38, //OPON[7:0] 01727 0xE9, 1, 0x10, //OPON1[7:0] 01728 0xF1, 1, 0x01, //OTPS1B 01729 0xF2, 1, 0x10, //GEN 01730 //Gamma 2.2 Setting 01731 0x40, 13, 0x01, 0x00, 0x00, 0x10, 0x0E, 0x24, 0x04, 0x50, 0x02, 0x13, 0x19, 0x19, 0x16, 01732 0x50, 14, 0x1B, 0x31, 0x2F, 0x3F, 0x3F, 0x3E, 0x2F, 0x7B, 0x09, 0x06, 0x06, 0x0C, 0x1D, 0xCC, 01733 //Power Voltage Setting 01734 0x1B, 1, 0x1B, //VRH=4.65V 01735 0x1A, 1, 0x01, //BT (VGH~15V,VGL~-10V,DDVDH~5V) 01736 0x24, 1, 0x2F, //VMH(VCOM High voltage ~3.2V) 01737 0x25, 1, 0x57, //VML(VCOM Low voltage -1.2V) 01738 //****VCOM offset**/// 01739 0x23, 1, 0x88, //for Flicker adjust //can reload from OTP 01740 //Power on Setting 01741 0x18, 1, 0x34, //I/P_RADJ,N/P_RADJ, Normal mode 60Hz 01742 0x19, 1, 0x01, //OSC_EN='1', start Osc 01743 0x01, 1, 0x00, //DP_STB='0', out deep sleep 01744 0x1F, 1, 0x88, // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 01745 TFTLCD_DELAY8, 5, 01746 0x1F, 1, 0x80, // GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 01747 TFTLCD_DELAY8, 3, 01748 0x1F, 1, 0x90, // GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 01749 TFTLCD_DELAY8, 5, 01750 0x1F, 1, 0xD0, // GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 01751 TFTLCD_DELAY8, 5, 01752 //262k/65k color selection 01753 0x17, 1, 0x05, //default 0x06 262k color // 0x05 65k color 01754 //SET PANEL 01755 0x36, 1, 0x00, //SS_P, GS_P,REV_P,BGR_P 01756 //Display ON Setting 01757 0x28, 1, 0x38, //GON=1, DTE=1, D=1000 01758 TFTLCD_DELAY8, 40, 01759 0x28, 1, 0x3F, //GON=1, DTE=1, D=1100 01760 01761 0x16, 1, 0x18, 01762 }; 01763 init_table(HX8347G_2_regValues, sizeof(HX8347G_2_regValues)); 01764 break; 01765 #endif 01766 01767 #ifdef SUPPORT_8352A 01768 case 0x5252: //HX8352-A 01769 _lcd_capable = MIPI_DCS_REV1 | MV_AXIS; 01770 is8347 = 1; 01771 static const uint8_t HX8352A_regValues[] PROGMEM = { 01772 0x83, 1, 0x02, //Test Mode: TESTM=1 01773 0x85, 1, 0x03, //VDD ctl : VDC_SEL=3 [05] 01774 0x8B, 1, 0x01, //VGS_RES 1: RES_VGS1=1 01775 0x8C, 1, 0x93, //VGS_RES 2: RES_VGS2=1, anon=0x13 [93] 01776 0x91, 1, 0x01, //PWM control: SYNC=1 01777 0x83, 1, 0x00, //Test Mode: TESTM=0 01778 //Gamma Setting 01779 0x3E, 12, 0xB0, 0x03, 0x10, 0x56, 0x13, 0x46, 0x23, 0x76, 0x00, 0x5E, 0x4F, 0x40, 01780 //Power Voltage Setting 01781 0x17, 1, 0x91, //OSC 1: RADJ=9, OSC_EN=1 [F0] 01782 0x2B, 1, 0xF9, //Cycle 1: N_DC=F9 [BE] 01783 TFTLCD_DELAY8, 10, 01784 0x1B, 1, 0x14, //Power 3: BT=1, ??=1, AP=0 [42] 01785 0x1A, 1, 0x11, //Power 2: VC3=1, VC1=1 [05] 01786 0x1C, 1, 0x06, //Power 4: VRH=6 [0D] 01787 0x1F, 1, 0x42, //VCOM : VCM=42 [55] 01788 TFTLCD_DELAY8, 20, 01789 0x19, 1, 0x0A, //Power 1: DK=1, VL_TR1=1 [09] 01790 0x19, 1, 0x1A, //Power 1: PON=1, DK=1, VL_TR1=1 [09] 01791 TFTLCD_DELAY8, 40, 01792 0x19, 1, 0x12, //Power 1: PON=1, DK=1, STB=1 [09] 01793 TFTLCD_DELAY8, 40, 01794 0x1E, 1, 0x27, //Power 6: VCOMG=1, VDV=7 [10] 01795 TFTLCD_DELAY8, 100, 01796 //Display ON Setting 01797 0x24, 1, 0x60, //Display 2: PT=1, GON=1 [A0] 01798 0x3D, 1, 0x40, //Source 1: N_SAP=40 [C0] 01799 0x34, 1, 0x38, //Cycle 10: EQS=0x38 [38] 01800 0x35, 1, 0x38, //Cycle 11: EQP=0x38 [38] 01801 0x24, 1, 0x38, //Display 2: GON=1 D=2 [A0] 01802 TFTLCD_DELAY8, 40, 01803 0x24, 1, 0x3C, //Display 2: GON=1 D=3 [A0] 01804 0x16, 1, 0x1C, //Memaccess: GS=1, BGR=1, SS=1 01805 0x01, 1, 0x06, //Disp Mode: INVON=1, NORON=1 [02] 01806 0x55, 1, 0x06, //SM_PANEL=0, SS_PANEL=0, GS_PANEL=1, REV_PANEL=1, BGR_PANEL=0 01807 }; 01808 init_table(HX8352A_regValues, sizeof(HX8352A_regValues)); 01809 p16 = (int16_t *) & HEIGHT; 01810 *p16 = 400; 01811 break; 01812 #endif 01813 01814 #ifdef SUPPORT_8352B 01815 case 0x0065: //HX8352-B 01816 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN; 01817 is8347 = 1; 01818 static const uint8_t HX8352B_regValues[] PROGMEM = { 01819 // Register setting for EQ setting 01820 0xe5, 1, 0x10, // 01821 0xe7, 1, 0x10, // 01822 0xe8, 1, 0x48, // 01823 0xec, 1, 0x09, // 01824 0xed, 1, 0x6c, // 01825 // Power on Setting 01826 0x23, 1, 0x6F, //VMF 01827 0x24, 1, 0x57, //VMH 01828 0x25, 1, 0x71, //VML 01829 0xE2, 1, 0x18, // 01830 0x1B, 1, 0x15, //VRH 01831 0x01, 1, 0x00, // 01832 0x1C, 1, 0x03, //AP=3 01833 // Power on sequence 01834 0x19, 1, 0x01, //OSCEN=1 01835 TFTLCD_DELAY8, 5, 01836 0x1F, 1, 0x8C, //GASEN=1, DK=1, XDK=1 01837 0x1F, 1, 0x84, //GASEN=1, XDK=1 01838 TFTLCD_DELAY8, 10, 01839 0x1F, 1, 0x94, //GASEN=1, PON=1, XDK=1 01840 TFTLCD_DELAY8, 10, 01841 0x1F, 1, 0xD4, //GASEN=1, VCOMG=1, PON=1, XDK=1 01842 TFTLCD_DELAY8, 5, 01843 // Gamma Setting 01844 0x40, 13, 0x00, 0x2B, 0x29, 0x3E, 0x3D, 0x3F, 0x24, 0x74, 0x08, 0x06, 0x07, 0x0D, 0x17, 01845 0x50, 13, 0x00, 0x02, 0x01, 0x16, 0x14, 0x3F, 0x0B, 0x5B, 0x08, 0x12, 0x18, 0x19, 0x17, 01846 0x5D, 1, 0xFF, // 01847 01848 0x16, 1, 0x08, //MemoryAccess BGR=1 01849 0x28, 1, 0x20, //GON=1 01850 TFTLCD_DELAY8, 40, 01851 0x28, 1, 0x38, //GON=1, DTE=1, D=2 01852 TFTLCD_DELAY8, 40, 01853 0x28, 1, 0x3C, //GON=1, DTE=1, D=3 01854 01855 0x02, 2, 0x00, 0x00, //SC 01856 0x04, 2, 0x00, 0xEF, //EC 01857 0x06, 2, 0x00, 0x00, //SP 01858 0x08, 2, 0x01, 0x8F, //EP 01859 01860 0x80, 2, 0x00, 0x00, //CAC 01861 0x82, 2, 0x00, 0x00, //RAC 01862 0x17, 1, 0x05, //COLMOD = 565 01863 01864 }; 01865 init_table(HX8352B_regValues, sizeof(HX8352B_regValues)); 01866 p16 = (int16_t *) & HEIGHT; 01867 *p16 = 400; 01868 break; 01869 #endif 01870 01871 #ifdef SUPPORT_8347A 01872 case 0x8347: 01873 _lcd_capable = REV_SCREEN | MIPI_DCS_REV1 | MV_AXIS; 01874 // AN.01 The reference setting of CMO 3.2” Panel 01875 static const uint8_t HX8347A_CMO32_regValues[] PROGMEM = { 01876 // VENDOR Gamma for 3.2" 01877 (0x46), 12, 0xA4, 0x53, 0x00, 0x44, 0x04, 0x67, 0x33, 0x77, 0x12, 0x4C, 0x46, 0x44, 01878 // Display Setting 01879 (0x01), 1, 0x06, // IDMON=0, INVON=1, NORON=1, PTLON=0 01880 (0x16), 1, 0x48, // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0 01881 (0x23), 3, 0x95, 0x95, 0xFF, // N_DC=1001 0101, PI_DC=1001 0101, I_DC=1111 1111 01882 01883 (0x27), 4, 0x02, 0x02, 0x02, 0x02, // N_BP=2, N_FP=2, PI_BP=2, PI_FP=2 01884 (0x2C), 2, 0x02, 0x02, // I_BP=2, I_FP=2 01885 01886 (0x3a), 4, 0x01, 0x01, 0xF0, 0x00, // N_RTN=0, N_NW=1, P_RTN=0, P_NW=1, I_RTN=15, I_NW=0, DIV=0 01887 TFTLCD_DELAY8, 5, 01888 (0x35), 2, 0x38, 0x78, // EQS=38h, EQP=78h 01889 (0x3E), 1, 0x38, // SON=38h 01890 (0x40), 2, 0x0F, 0xF0, // GDON=0Fh, GDOFF 01891 // Power Supply Setting 01892 (0x19), 1, 0x49, // CADJ=0100, CUADJ=100, OSD_EN=1 ,60Hz 01893 (0x93), 1, 0x0F, // RADJ=1111, 100% 01894 TFTLCD_DELAY8, 5, 01895 (0x20), 1, 0x40, // BT=0100 01896 (0x1D), 3, 0x07, 0x00, 0x04, // VC1=7, VC3=0, VRH=?? 01897 //VCOM SETTING for 3.2" 01898 (0x44), 2, 0x4D, 0x11, // VCM=100 1101, VDV=1 0001 01899 TFTLCD_DELAY8, 10, 01900 (0x1C), 1, 0x04, // AP=100 01901 TFTLCD_DELAY8, 20, 01902 (0x1B), 1, 0x18, // GASENB=0, PON=0, DK=1, XDK=0, VLCD_TRI=0, STB=0 01903 TFTLCD_DELAY8, 40, 01904 (0x1B), 1, 0x10, // GASENB=0, PON=1, DK=0, XDK=0, VLCD_TRI=0, STB=0 01905 TFTLCD_DELAY8, 40, 01906 (0x43), 1, 0x80, //set VCOMG=1 01907 TFTLCD_DELAY8, 100, 01908 // Display ON Setting 01909 (0x90), 1, 0x7F, // SAP=0111 1111 01910 (0x26), 1, 0x04, //GON=0, DTE=0, D=01 01911 TFTLCD_DELAY8, 40, 01912 (0x26), 1, 0x24, //GON=1, DTE=0, D=01 01913 (0x26), 1, 0x2C, //GON=1, DTE=0, D=11 01914 TFTLCD_DELAY8, 40, 01915 (0x26), 1, 0x3C, //GON=1, DTE=1, D=11 01916 // INTERNAL REGISTER SETTING 01917 (0x57), 1, 0x02, // TEST_Mode=1: into TEST mode 01918 (0x55), 1, 0x00, // VDC_SEL=000, VDDD=1.95V 01919 (0xFE), 1, 0x5A, // For ESD protection 01920 (0x57), 1, 0x00, // TEST_Mode=0: exit TEST mode 01921 }; 01922 // AN.01 The reference setting of CMO 2.4” Panel 01923 static const uint8_t HX8347A_CMO24_regValues[] PROGMEM = { 01924 // VENDOR Gamma for 2.4" 01925 (0x46), 12, 0x94, 0x41, 0x00, 0x33, 0x23, 0x45, 0x44, 0x77, 0x12, 0xCC, 0x46, 0x82, 01926 // Display Setting 01927 (0x01), 1, 0x06, // IDMON=0, INVON=1, NORON=1, PTLON=0 01928 (0x16), 1, 0x48, // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0 01929 (0x23), 3, 0x95, 0x95, 0xFF, // N_DC=1001 0101, PI_DC=1001 0101, I_DC=1111 1111 01930 01931 (0x27), 4, 0x02, 0x02, 0x02, 0x02, // N_BP=2, N_FP=2, PI_BP=2, PI_FP=2 01932 (0x2C), 2, 0x02, 0x02, // I_BP=2, I_FP=2 01933 01934 (0x3a), 4, 0x01, 0x01, 0xF0, 0x00, // N_RTN=0, N_NW=1, P_RTN=0, P_NW=1, I_RTN=15, I_NW=0, DIV=0 01935 TFTLCD_DELAY8, 5, 01936 (0x35), 2, 0x38, 0x78, // EQS=38h, EQP=78h 01937 (0x3E), 1, 0x38, // SON=38h 01938 (0x40), 2, 0x0F, 0xF0, // GDON=0Fh, GDOFF 01939 // Power Supply Setting 01940 (0x19), 1, 0x49, // CADJ=0100, CUADJ=100, OSD_EN=1 ,60Hz 01941 (0x93), 1, 0x0F, // RADJ=1111, 100% 01942 TFTLCD_DELAY8, 5, 01943 (0x20), 1, 0x40, // BT=0100 01944 (0x1D), 3, 0x07, 0x00, 0x04, // VC1=7, VC3=0, VRH=?? 01945 //VCOM SETTING for 2.4" 01946 (0x44), 2, 0x40, 0x12, // VCM=100 0000, VDV=1 0001 01947 TFTLCD_DELAY8, 10, 01948 (0x1C), 1, 0x04, // AP=100 01949 TFTLCD_DELAY8, 20, 01950 (0x1B), 1, 0x18, // GASENB=0, PON=0, DK=1, XDK=0, VLCD_TRI=0, STB=0 01951 TFTLCD_DELAY8, 40, 01952 (0x1B), 1, 0x10, // GASENB=0, PON=1, DK=0, XDK=0, VLCD_TRI=0, STB=0 01953 TFTLCD_DELAY8, 40, 01954 (0x43), 1, 0x80, //set VCOMG=1 01955 TFTLCD_DELAY8, 100, 01956 // Display ON Setting 01957 (0x90), 1, 0x7F, // SAP=0111 1111 01958 (0x26), 1, 0x04, //GON=0, DTE=0, D=01 01959 TFTLCD_DELAY8, 40, 01960 (0x26), 1, 0x24, //GON=1, DTE=0, D=01 01961 (0x26), 1, 0x2C, //GON=1, DTE=0, D=11 01962 TFTLCD_DELAY8, 40, 01963 (0x26), 1, 0x3C, //GON=1, DTE=1, D=11 01964 // INTERNAL REGISTER SETTING 01965 (0x57), 1, 0x02, // TEST_Mode=1: into TEST mode 01966 (0x55), 1, 0x00, // VDC_SEL=000, VDDD=1.95V 01967 (0xFE), 1, 0x5A, // For ESD protection 01968 (0x57), 1, 0x00, // TEST_Mode=0: exit TEST mode 01969 }; 01970 static const uint8_t HX8347A_ITDB02_regValues[] PROGMEM = { 01971 // VENDOR Gamma ITDB02 same as CMO32. Delays are shorter than AN01 01972 (0x46), 12, 0xA4, 0x53, 0x00, 0x44, 0x04, 0x67, 0x33, 0x77, 0x12, 0x4C, 0x46, 0x44, 01973 // Display Setting 01974 (0x01), 1, 0x06, // IDMON=0, INVON=1, NORON=1, PTLON=0 01975 (0x16), 1, 0xC8, // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0 .itead 01976 (0x23), 3, 0x95, 0x95, 0xFF, // N_DC=1001 0101, PI_DC=1001 0101, I_DC=1111 1111 01977 01978 (0x27), 4, 0x02, 0x02, 0x02, 0x02, // N_BP=2, N_FP=2, PI_BP=2, PI_FP=2 01979 (0x2C), 2, 0x02, 0x02, // I_BP=2, I_FP=2 01980 01981 (0x3a), 4, 0x01, 0x00, 0xF0, 0x00, // N_RTN=0, N_NW=1, P_RTN=0, ?? P_NW=1, I_RTN=15, I_NW=0, DIV=0 .itead 01982 TFTLCD_DELAY8, 5, 01983 (0x35), 2, 0x38, 0x78, // EQS=38h, EQP=78h 01984 (0x3E), 1, 0x38, // SON=38h 01985 (0x40), 2, 0x0F, 0xF0, // GDON=0Fh, GDOFF 01986 // Power Supply Setting 01987 (0x19), 1, 0x49, // CADJ=0100, CUADJ=100, OSD_EN=1 ,60Hz 01988 (0x93), 1, 0x0F, // RADJ=1111, 100% 01989 TFTLCD_DELAY8, 5, 01990 (0x20), 1, 0x40, // BT=0100 01991 (0x1D), 3, 0x07, 0x00, 0x04, // VC1=7, VC3=0, VRH=?? 01992 //VCOM SETTING for ITDB02 01993 (0x44), 2, 0x4D, 0x0E, // VCM=101 0000 4D, VDV=1 0001 .itead 01994 TFTLCD_DELAY8, 5, 01995 (0x1C), 1, 0x04, // AP=100 01996 TFTLCD_DELAY8, 5, 01997 (0x1B), 1, 0x18, // GASENB=0, PON=0, DK=1, XDK=0, VLCD_TRI=0, STB=0 01998 TFTLCD_DELAY8, 5, 01999 (0x1B), 1, 0x10, // GASENB=0, PON=1, DK=0, XDK=0, VLCD_TRI=0, STB=0 02000 TFTLCD_DELAY8, 5, 02001 (0x43), 1, 0x80, //set VCOMG=1 02002 TFTLCD_DELAY8, 5, 02003 // Display ON Setting 02004 (0x90), 1, 0x7F, // SAP=0111 1111 02005 (0x26), 1, 0x04, //GON=0, DTE=0, D=01 02006 TFTLCD_DELAY8, 5, 02007 (0x26), 1, 0x24, //GON=1, DTE=0, D=01 02008 (0x26), 1, 0x2C, //GON=1, DTE=0, D=11 02009 TFTLCD_DELAY8, 5, 02010 (0x26), 1, 0x3C, //GON=1, DTE=1, D=11 02011 // INTERNAL REGISTER SETTING for ITDB02 02012 (0x57), 1, 0x02, // TEST_Mode=1: into TEST mode 02013 (0x95), 1, 0x01, // SET DISPLAY CLOCK AND PUMPING CLOCK TO SYNCHRONIZE .itead 02014 (0x57), 1, 0x00, // TEST_Mode=0: exit TEST mode 02015 }; 02016 static const uint8_t HX8347A_NHD_regValues[] PROGMEM = { 02017 //Gamma Setting NHD 02018 (0x46), 12, 0x94, 0x41, 0x00, 0x33, 0x23, 0x45, 0x44, 0x77, 0x12, 0xCC, 0x46, 0x82, 02019 (0x01), 1, 0x06, //Display Mode [06] 02020 (0x16), 1, 0xC8, //MADCTL [00] MY=1, MX=1, BGR=1 02021 // (0x70), 1, 0x05, //Panel [06] 16-bit 02022 (0x23), 3, 0x95, 0x95, 0xFF, //Cycle Control 1-3 [95 95 FF] 02023 (0x27), 4, 0x02, 0x02, 0x02, 0x02, //Display Control 2-5 [02 02 02 02] 02024 (0x2C), 2, 0x02, 0x02, //Display Control 6-7 [02 02] 02025 (0x3A), 4, 0x01, 0x01, 0xF0, 0x00, //Cycle Control 1-4 [01 01 F0 00] 02026 TFTLCD_DELAY8, 80, 02027 (0x35), 2, 0x38, 0x78, //Display Control 9-10 [09 09] EQS=56, EQP=120 02028 (0x3E), 1, 0x38, //Cycle Control 5 [38] 02029 (0x40), 1, 0x0F, //Cycle Control 6 [03] GDON=15 02030 (0x41), 1, 0xF0, //Cycle Control 14 [F8] GDOF=248 02031 02032 (0x19), 1, 0x2D, //OSC Control 1 [86] CADJ=2, CUADJ=6, OSCEN=1 02033 (0x93), 1, 0x06, //SAP Idle mode [00] ??? .nhd 02034 TFTLCD_DELAY8, 80, 02035 (0x20), 1, 0x40, //Power Control 6 [40] 02036 (0x1D), 3, 0x07, 0x00, 0x04, //Power Control 3-5 [04 00 06] VC=7 02037 (0x44), 2, 0x3C, 0x12, //VCOM Control 2-3 [5A 11] VCM=60, VDV=18 02038 TFTLCD_DELAY8, 80, 02039 (0x1C), 1, 0x04, //Power Control 2 [04] 02040 TFTLCD_DELAY8, 80, 02041 (0x43), 1, 0x80, //VCOM Control 1 [80] 02042 TFTLCD_DELAY8, 80, 02043 (0x1B), 1, 0x08, //Power Control 1 [00] DK=1 02044 TFTLCD_DELAY8, 80, 02045 (0x1B), 1, 0x10, //Power Control 1 [00] PON=1 02046 TFTLCD_DELAY8, 80, 02047 (0x90), 1, 0x7F, //Display Control 8 [0A] 02048 (0x26), 1, 0x04, //Display Control 1 [A0] D=1 02049 TFTLCD_DELAY8, 80, 02050 (0x26), 1, 0x24, //Display Control 1 [A0] GON=1, D=1 02051 (0x26), 1, 0x2C, //Display Control 1 [A0] GON=1, D=3 02052 TFTLCD_DELAY8, 80, 02053 (0x26), 1, 0x3C, //Display Control 1 [A0] GON=1, DTE=1, D=3 02054 (0x57), 1, 0x02, //? 02055 (0x55), 1, 0x00, //? 02056 (0x57), 1, 0x00, //? 02057 }; 02058 // Atmel ASF code uses VCOM2-3: 0x38, 0x12. 50ms delays and no TEST mode changes. 02059 init_table(HX8347A_NHD_regValues, sizeof(HX8347A_NHD_regValues)); 02060 // init_table(HX8347A_CMO32_regValues, sizeof(HX8347A_CMO32_regValues)); 02061 // init_table(HX8347A_CMO24_regValues, sizeof(HX8347A_CMO24_regValues)); 02062 // init_table(HX8347A_ITDB02_regValues, sizeof(HX8347A_ITDB02_regValues)); 02063 // init_table(HX8347G_2_regValues, sizeof(HX8347G_2_regValues)); 02064 break; 02065 #endif 02066 02067 case 0x8357: //BIG CHANGE: HX8357-B is now 0x8357 02068 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN; 02069 goto common_8357; 02070 case 0x9090: //BIG CHANGE: HX8357-D was 0x8357 02071 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN | READ_24BITS; 02072 common_8357: 02073 static const uint8_t HX8357C_regValues[] PROGMEM = { 02074 TFTLCD_DELAY8, 1, //dummy table 02075 }; 02076 table8_ads = HX8357C_regValues, table_size = sizeof(HX8357C_regValues); 02077 p16 = (int16_t *) & HEIGHT; 02078 *p16 = 480; 02079 p16 = (int16_t *) & WIDTH; 02080 *p16 = 320; 02081 break; 02082 02083 case 0x0099: //HX8357-D matches datasheet 02084 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN | READ_24BITS; 02085 static const uint8_t HX8357_99_regValues[] PROGMEM = { 02086 (0xB9), 3, 0xFF, 0x83, 0x57, // SETEXTC 02087 TFTLCD_DELAY8, 150, 02088 TFTLCD_DELAY8, 150, 02089 (0xB6), 1, 0x25, // SETCOM [4B 00] -2.5V+37*0.02V=-1.76V [-1.00V] 02090 (0xC0), 6, 0x50, 0x50, 0x01, 0x3C, 0x1E, 0x08, // SETSTBA [73 50 00 3C C4 08] 02091 (0xB4), 7, 0x02, 0x40, 0x00, 0x2A, 0x2A, 0x0D, 0x78, // SETCYC [02 40 00 2A 2A 0D 96] 02092 #ifdef SUPPORT_8357D_GAMMA 02093 // HX8357D_SETGAMMA [0B 0C 11 1D 25 37 43 4B 4E 47 41 39 35 31 2E 21 1C 1D 1D 26 31 44 4E 56 44 3F 39 33 31 2E 28 1D E0 01] 02094 (0xE0),34, 0x02, 0x0A, 0x11, 0x1D, 0x23, 0x35, 0x41, 0x4B, 0x4B, 0x42, 0x3A, 0x27, 0x1B, 0x08, 0x09, 0x03, 0x02, 0x0A, 0x11, 0x1D, 0x23, 0x35, 0x41, 0x4B, 0x4B, 0x42, 0x3A, 0x27, 0x1B, 0x08, 0x09, 0x03, 0x00, 0x01, 02095 #endif 02096 }; 02097 table8_ads = HX8357_99_regValues, table_size = sizeof(HX8357_99_regValues); 02098 p16 = (int16_t *) & HEIGHT; 02099 *p16 = 480; 02100 p16 = (int16_t *) & WIDTH; 02101 *p16 = 320; 02102 break; 02103 02104 #ifdef SUPPORT_8230 02105 case 0x8230: //thanks Auzman 02106 _lcd_capable = 0 | REV_SCREEN | INVERT_GS | INVERT_RGB | READ_BGR; 02107 static const uint16_t UC8230_regValues[] PROGMEM = { 02108 //After pin Reset wait at least 100ms 02109 TFTLCD_DELAY, 100, //at least 100ms 02110 0x0046, 0x0002, //MTP Disable 02111 0x0010, 0x1590, //SAP=1, BT=5, APE=1, AP=1 02112 0x0011, 0x0227, //DC1=2, DC0=2, VC=7 02113 0x0012, 0x80ff, //P5VMD=1, PON=7, VRH=15 02114 0x0013, 0x9c31, //VDV=28, VCM=49 02115 TFTLCD_DELAY, 10, //at least 10ms 02116 0x0002, 0x0300, //set N-line = 1 02117 0x0003, 0x1030, //set GRAM writing direction & BGR=1 02118 0x0060, 0xa700, //GS; gate scan: start position & drive line Q'ty 02119 0x0061, 0x0001, //REV, NDL, VLE 02120 /*--------------------Gamma control------------------------*/ 02121 0x0030, 0x0303, 02122 0x0031, 0x0303, 02123 0x0032, 0x0303, 02124 0x0033, 0x0300, 02125 0x0034, 0x0003, 02126 0x0035, 0x0303, 02127 0x0036, 0x1400, 02128 0x0037, 0x0303, 02129 0x0038, 0x0303, 02130 0x0039, 0x0303, 02131 0x003a, 0x0300, 02132 0x003b, 0x0003, 02133 0x003c, 0x0303, 02134 0x003d, 0x1400, 02135 //-----------------------------------------------------------// 02136 0x0020, 0x0000, //GRAM horizontal address 02137 0x0021, 0x0000, //GRAM vertical address 02138 //************** Partial Display control*********************// 02139 0x0080, 0x0000, 02140 0x0081, 0x0000, 02141 0x0082, 0x0000, 02142 0x0083, 0x0000, 02143 0x0084, 0x0000, 02144 0x0085, 0x0000, 02145 //-----------------------------------------------------------// 02146 0x0092, 0x0200, 02147 0x0093, 0x0303, 02148 0x0090, 0x0010, //set clocks/Line 02149 0x0000, 0x0001, 02150 TFTLCD_DELAY, 200, // Delay 200 ms 02151 0x0007, 0x0173, //Display on setting 02152 }; 02153 init_table16(UC8230_regValues, sizeof(UC8230_regValues)); 02154 break; 02155 #endif 02156 02157 #ifdef SUPPORT_9163 02158 case 0x9163: // 02159 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; 02160 static const uint8_t PROGMEM table9163C[] = { 02161 // (COMMAND_BYTE), n, data_bytes.... 02162 0x26, 1, 0x02, // [01] GAMMASET use CURVE=1, 2, 4, 8 02163 0xB1, 2, 0x08, 0x02, // [0E 14] FRMCTR1 if GM==011 61.7Hz 02164 0xB4, 1, 0x07, // [02] INVCTR 02165 0xB8, 1, 0x01, // [00] GSCTRL 02166 0xC0, 2, 0x0A, 0x02, // [0A 05] PWCTR1 if LCM==10 02167 0xC1, 1, 0x02, // [07] PWCTR2 02168 0xC5, 2, 0x50, 0x63, // [43 4D] VMCTR1 02169 0xC7, 1, 0, // [40] VCOMOFFS 02170 }; 02171 table8_ads = table9163C, table_size = sizeof(table9163C); // 02172 p16 = (int16_t *) & HEIGHT; 02173 *p16 = 160; 02174 p16 = (int16_t *) & WIDTH; 02175 *p16 = 128; 02176 break; 02177 #endif 02178 02179 #ifdef SUPPORT_9225 02180 #define ILI9225_DRIVER_OUTPUT_CTRL (0x01u) // Driver Output Control 02181 #define ILI9225_LCD_AC_DRIVING_CTRL (0x02u) // LCD AC Driving Control 02182 #define ILI9225_ENTRY_MODE (0x03u) // Entry Mode 02183 #define ILI9225_DISP_CTRL1 (0x07u) // Display Control 1 02184 #define ILI9225_BLANK_PERIOD_CTRL1 (0x08u) // Blank Period Control 02185 #define ILI9225_FRAME_CYCLE_CTRL (0x0Bu) // Frame Cycle Control 02186 #define ILI9225_INTERFACE_CTRL (0x0Cu) // Interface Control 02187 #define ILI9225_OSC_CTRL (0x0Fu) // Osc Control 02188 #define ILI9225_POWER_CTRL1 (0x10u) // Power Control 1 02189 #define ILI9225_POWER_CTRL2 (0x11u) // Power Control 2 02190 #define ILI9225_POWER_CTRL3 (0x12u) // Power Control 3 02191 #define ILI9225_POWER_CTRL4 (0x13u) // Power Control 4 02192 #define ILI9225_POWER_CTRL5 (0x14u) // Power Control 5 02193 #define ILI9225_VCI_RECYCLING (0x15u) // VCI Recycling 02194 #define ILI9225_RAM_ADDR_SET1 (0x20u) // Horizontal GRAM Address Set 02195 #define ILI9225_RAM_ADDR_SET2 (0x21u) // Vertical GRAM Address Set 02196 #define ILI9225_GRAM_DATA_REG (0x22u) // GRAM Data Register 02197 #define ILI9225_GATE_SCAN_CTRL (0x30u) // Gate Scan Control Register 02198 #define ILI9225_VERTICAL_SCROLL_CTRL1 (0x31u) // Vertical Scroll Control 1 Register 02199 #define ILI9225_VERTICAL_SCROLL_CTRL2 (0x32u) // Vertical Scroll Control 2 Register 02200 #define ILI9225_VERTICAL_SCROLL_CTRL3 (0x33u) // Vertical Scroll Control 3 Register 02201 #define ILI9225_PARTIAL_DRIVING_POS1 (0x34u) // Partial Driving Position 1 Register 02202 #define ILI9225_PARTIAL_DRIVING_POS2 (0x35u) // Partial Driving Position 2 Register 02203 #define ILI9225_HORIZONTAL_WINDOW_ADDR1 (0x36u) // Horizontal Address END Position HEA 02204 #define ILI9225_HORIZONTAL_WINDOW_ADDR2 (0x37u) // Horizontal Address START Position HSA 02205 #define ILI9225_VERTICAL_WINDOW_ADDR1 (0x38u) // Vertical Address END Position VEA 02206 #define ILI9225_VERTICAL_WINDOW_ADDR2 (0x39u) // Vertical Address START Position VSA 02207 #define ILI9225_GAMMA_CTRL1 (0x50u) // Gamma Control 1 02208 #define ILI9225_GAMMA_CTRL2 (0x51u) // Gamma Control 2 02209 #define ILI9225_GAMMA_CTRL3 (0x52u) // Gamma Control 3 02210 #define ILI9225_GAMMA_CTRL4 (0x53u) // Gamma Control 4 02211 #define ILI9225_GAMMA_CTRL5 (0x54u) // Gamma Control 5 02212 #define ILI9225_GAMMA_CTRL6 (0x55u) // Gamma Control 6 02213 #define ILI9225_GAMMA_CTRL7 (0x56u) // Gamma Control 7 02214 #define ILI9225_GAMMA_CTRL8 (0x57u) // Gamma Control 8 02215 #define ILI9225_GAMMA_CTRL9 (0x58u) // Gamma Control 9 02216 #define ILI9225_GAMMA_CTRL10 (0x59u) // Gamma Control 10 02217 02218 #define ILI9225C_INVOFF 0x20 02219 #define ILI9225C_INVON 0x21 02220 02221 case 0x6813: 02222 case 0x9226: 02223 _lcd_ID = 0x9225; //fall through 02224 case 0x9225: 02225 _lcd_capable = REV_SCREEN | READ_BGR; //thanks tongbajiel 02226 static const uint16_t ILI9225_regValues[] PROGMEM = { 02227 /* Start Initial Sequence */ 02228 /* Set SS bit and direction output from S528 to S1 */ 02229 ILI9225_POWER_CTRL1, 0x0000, // Set SAP,DSTB,STB 02230 ILI9225_POWER_CTRL2, 0x0000, // Set APON,PON,AON,VCI1EN,VC 02231 ILI9225_POWER_CTRL3, 0x0000, // Set BT,DC1,DC2,DC3 02232 ILI9225_POWER_CTRL4, 0x0000, // Set GVDD 02233 ILI9225_POWER_CTRL5, 0x0000, // Set VCOMH/VCOML voltage 02234 TFTLCD_DELAY, 40, 02235 02236 // Power-on sequence 02237 ILI9225_POWER_CTRL2, 0x0018, // Set APON,PON,AON,VCI1EN,VC 02238 ILI9225_POWER_CTRL3, 0x6121, // Set BT,DC1,DC2,DC3 02239 ILI9225_POWER_CTRL4, 0x006F, // Set GVDD /*007F 0088 */ 02240 ILI9225_POWER_CTRL5, 0x495F, // Set VCOMH/VCOML voltage 02241 ILI9225_POWER_CTRL1, 0x0800, // Set SAP,DSTB,STB 02242 TFTLCD_DELAY, 10, 02243 ILI9225_POWER_CTRL2, 0x103B, // Set APON,PON,AON,VCI1EN,VC 02244 TFTLCD_DELAY, 50, 02245 02246 ILI9225_DRIVER_OUTPUT_CTRL, 0x011C, // set the display line number and display direction 02247 ILI9225_LCD_AC_DRIVING_CTRL, 0x0100, // set 1 line inversion 02248 ILI9225_ENTRY_MODE, 0x1030, // set GRAM write direction and BGR=1. 02249 ILI9225_DISP_CTRL1, 0x0000, // Display off 02250 ILI9225_BLANK_PERIOD_CTRL1, 0x0808, // set the back porch and front porch 02251 ILI9225_FRAME_CYCLE_CTRL, 0x1100, // set the clocks number per line 02252 ILI9225_INTERFACE_CTRL, 0x0000, // CPU interface 02253 ILI9225_OSC_CTRL, 0x0D01, // Set Osc /*0e01*/ 02254 ILI9225_VCI_RECYCLING, 0x0020, // Set VCI recycling 02255 ILI9225_RAM_ADDR_SET1, 0x0000, // RAM Address 02256 ILI9225_RAM_ADDR_SET2, 0x0000, // RAM Address 02257 02258 /* Set GRAM area */ 02259 ILI9225_GATE_SCAN_CTRL, 0x0000, 02260 ILI9225_VERTICAL_SCROLL_CTRL1, 0x00DB, 02261 ILI9225_VERTICAL_SCROLL_CTRL2, 0x0000, 02262 ILI9225_VERTICAL_SCROLL_CTRL3, 0x0000, 02263 ILI9225_PARTIAL_DRIVING_POS1, 0x00DB, 02264 ILI9225_PARTIAL_DRIVING_POS2, 0x0000, 02265 ILI9225_HORIZONTAL_WINDOW_ADDR1, 0x00AF, 02266 ILI9225_HORIZONTAL_WINDOW_ADDR2, 0x0000, 02267 ILI9225_VERTICAL_WINDOW_ADDR1, 0x00DB, 02268 ILI9225_VERTICAL_WINDOW_ADDR2, 0x0000, 02269 02270 /* Set GAMMA curve */ 02271 ILI9225_GAMMA_CTRL1, 0x0000, 02272 ILI9225_GAMMA_CTRL2, 0x0808, 02273 ILI9225_GAMMA_CTRL3, 0x080A, 02274 ILI9225_GAMMA_CTRL4, 0x000A, 02275 ILI9225_GAMMA_CTRL5, 0x0A08, 02276 ILI9225_GAMMA_CTRL6, 0x0808, 02277 ILI9225_GAMMA_CTRL7, 0x0000, 02278 ILI9225_GAMMA_CTRL8, 0x0A00, 02279 ILI9225_GAMMA_CTRL9, 0x0710, 02280 ILI9225_GAMMA_CTRL10, 0x0710, 02281 02282 ILI9225_DISP_CTRL1, 0x0012, 02283 TFTLCD_DELAY, 50, 02284 ILI9225_DISP_CTRL1, 0x1017, 02285 }; 02286 init_table16(ILI9225_regValues, sizeof(ILI9225_regValues)); 02287 p16 = (int16_t *) & HEIGHT; 02288 *p16 = 220; 02289 p16 = (int16_t *) & WIDTH; 02290 *p16 = 176; 02291 break; 02292 #endif 02293 02294 case 0x0001: 02295 _lcd_capable = 0 | REV_SCREEN | INVERT_GS; //no RGB bug. thanks Ivo_Deshev 02296 goto common_9320; 02297 case 0x5408: 02298 _lcd_capable = 0 | REV_SCREEN | READ_BGR; //Red 2.4" thanks jorgenv, Ardlab_Gent 02299 // _lcd_capable = 0 | REV_SCREEN | READ_BGR | INVERT_GS; //Blue 2.8" might be different 02300 goto common_9320; 02301 case 0x1505: //R61505 thanks Ravi_kanchan2004. R61505V, R61505W different 02302 case 0x9320: 02303 _lcd_capable = 0 | REV_SCREEN | READ_BGR; 02304 common_9320: 02305 static const uint16_t ILI9320_regValues[] PROGMEM = { 02306 0x00e5, 0x8000, 02307 0x0000, 0x0001, 02308 0x0001, 0x100, 02309 0x0002, 0x0700, 02310 0x0003, 0x1030, 02311 0x0004, 0x0000, 02312 0x0008, 0x0202, 02313 0x0009, 0x0000, 02314 0x000A, 0x0000, 02315 0x000C, 0x0000, 02316 0x000D, 0x0000, 02317 0x000F, 0x0000, 02318 //-----Power On sequence----------------------- 02319 0x0010, 0x0000, 02320 0x0011, 0x0007, 02321 0x0012, 0x0000, 02322 0x0013, 0x0000, 02323 TFTLCD_DELAY, 50, 02324 0x0010, 0x17B0, //SAP=1, BT=7, APE=1, AP=3 02325 0x0011, 0x0007, //DC1=0, DC0=0, VC=7 02326 TFTLCD_DELAY, 10, 02327 0x0012, 0x013A, //VCMR=1, PON=3, VRH=10 02328 TFTLCD_DELAY, 10, 02329 0x0013, 0x1A00, //VDV=26 02330 0x0029, 0x000c, //VCM=12 02331 TFTLCD_DELAY, 10, 02332 //-----Gamma control----------------------- 02333 0x0030, 0x0000, 02334 0x0031, 0x0505, 02335 0x0032, 0x0004, 02336 0x0035, 0x0006, 02337 0x0036, 0x0707, 02338 0x0037, 0x0105, 02339 0x0038, 0x0002, 02340 0x0039, 0x0707, 02341 0x003C, 0x0704, 02342 0x003D, 0x0807, 02343 //-----Set RAM area----------------------- 02344 0x0060, 0xA700, //GS=1 02345 0x0061, 0x0001, 02346 0x006A, 0x0000, 02347 0x0021, 0x0000, 02348 0x0020, 0x0000, 02349 //-----Partial Display Control------------ 02350 0x0080, 0x0000, 02351 0x0081, 0x0000, 02352 0x0082, 0x0000, 02353 0x0083, 0x0000, 02354 0x0084, 0x0000, 02355 0x0085, 0x0000, 02356 //-----Panel Control---------------------- 02357 0x0090, 0x0010, 02358 0x0092, 0x0000, 02359 0x0093, 0x0003, 02360 0x0095, 0x0110, 02361 0x0097, 0x0000, 02362 0x0098, 0x0000, 02363 //-----Display on----------------------- 02364 0x0007, 0x0173, 02365 TFTLCD_DELAY, 50, 02366 }; 02367 init_table16(ILI9320_regValues, sizeof(ILI9320_regValues)); 02368 break; 02369 case 0x6809: 02370 _lcd_capable = 0 | REV_SCREEN | INVERT_GS | AUTO_READINC; 02371 goto common_93x5; 02372 case 0x9328: 02373 case 0x9325: 02374 _lcd_capable = 0 | REV_SCREEN | INVERT_GS; 02375 goto common_93x5; 02376 case 0x9331: 02377 case 0x9335: 02378 _lcd_capable = 0 | REV_SCREEN; 02379 common_93x5: 02380 static const uint16_t ILI9325_regValues[] PROGMEM = { 02381 0x00E5, 0x78F0, // set SRAM internal timing 02382 0x0001, 0x0100, // set Driver Output Control 02383 0x0002, 0x0200, // set 1 line inversion 02384 0x0003, 0x1030, // set GRAM write direction and BGR=1. 02385 0x0004, 0x0000, // Resize register 02386 0x0005, 0x0000, // .kbv 16bits Data Format Selection 02387 0x0008, 0x0207, // set the back porch and front porch 02388 0x0009, 0x0000, // set non-display area refresh cycle ISC[3:0] 02389 0x000A, 0x0000, // FMARK function 02390 0x000C, 0x0000, // RGB interface setting 02391 0x000D, 0x0000, // Frame marker Position 02392 0x000F, 0x0000, // RGB interface polarity 02393 // ----------- Power On sequence ----------- // 02394 0x0010, 0x0000, // SAP, BT[3:0], AP, DSTB, SLP, STB 02395 0x0011, 0x0007, // DC1[2:0], DC0[2:0], VC[2:0] 02396 0x0012, 0x0000, // VREG1OUT voltage 02397 0x0013, 0x0000, // VDV[4:0] for VCOM amplitude 02398 0x0007, 0x0001, 02399 TFTLCD_DELAY, 200, // Dis-charge capacitor power voltage 02400 0x0010, 0x1690, // SAP=1, BT=6, APE=1, AP=1, DSTB=0, SLP=0, STB=0 02401 0x0011, 0x0227, // DC1=2, DC0=2, VC=7 02402 TFTLCD_DELAY, 50, // wait_ms 50ms 02403 0x0012, 0x000D, // VCIRE=1, PON=0, VRH=5 02404 TFTLCD_DELAY, 50, // wait_ms 50ms 02405 0x0013, 0x1200, // VDV=28 for VCOM amplitude 02406 0x0029, 0x000A, // VCM=10 for VCOMH 02407 0x002B, 0x000D, // Set Frame Rate 02408 TFTLCD_DELAY, 50, // wait_ms 50ms 02409 0x0020, 0x0000, // GRAM horizontal Address 02410 0x0021, 0x0000, // GRAM Vertical Address 02411 // ----------- Adjust the Gamma Curve ----------// 02412 02413 0x0030, 0x0000, 02414 0x0031, 0x0404, 02415 0x0032, 0x0003, 02416 0x0035, 0x0405, 02417 0x0036, 0x0808, 02418 0x0037, 0x0407, 02419 0x0038, 0x0303, 02420 0x0039, 0x0707, 02421 0x003C, 0x0504, 02422 0x003D, 0x0808, 02423 02424 //------------------ Set GRAM area ---------------// 02425 0x0060, 0x2700, // Gate Scan Line GS=0 [0xA700] 02426 0x0061, 0x0001, // NDL,VLE, REV .kbv 02427 0x006A, 0x0000, // set scrolling line 02428 //-------------- Partial Display Control ---------// 02429 0x0080, 0x0000, 02430 0x0081, 0x0000, 02431 0x0082, 0x0000, 02432 0x0083, 0x0000, 02433 0x0084, 0x0000, 02434 0x0085, 0x0000, 02435 //-------------- Panel Control -------------------// 02436 0x0090, 0x0010, 02437 0x0092, 0x0000, 02438 0x0007, 0x0133, // 262K color and display ON 02439 }; 02440 init_table16(ILI9325_regValues, sizeof(ILI9325_regValues)); 02441 break; 02442 02443 #if defined(SUPPORT_9326_5420) 02444 case 0x5420: 02445 case 0x9326: 02446 _lcd_capable = REV_SCREEN | READ_BGR; 02447 static const uint16_t ILI9326_CPT28_regValues[] PROGMEM = { 02448 //************* Start Initial Sequence **********// 02449 0x0702, 0x3008, // Set internal timing, don’t change this value 02450 0x0705, 0x0036, // Set internal timing, don’t change this value 02451 0x070B, 0x1213, // Set internal timing, don’t change this value 02452 0x0001, 0x0100, // set SS and SM bit 02453 0x0002, 0x0100, // set 1 line inversion 02454 0x0003, 0x1030, // set GRAM write direction and BGR=1. 02455 0x0008, 0x0202, // set the back porch and front porch 02456 0x0009, 0x0000, // set non-display area refresh cycle ISC[3:0] 02457 0x000C, 0x0000, // RGB interface setting 02458 0x000F, 0x0000, // RGB interface polarity 02459 //*************Power On sequence ****************// 02460 0x0100, 0x0000, // SAP, BT[3:0], AP, DSTB, SLP, STB 02461 0x0102, 0x0000, // VREG1OUT voltage 02462 0x0103, 0x0000, // VDV[4:0] for VCOM amplitude 02463 TFTLCD_DELAY, 200, // Dis-charge capacitor power voltage 02464 0x0100, 0x1190, // SAP, BT[3:0], AP, DSTB, SLP, STB 02465 0x0101, 0x0227, // DC1[2:0], DC0[2:0], VC[2:0] 02466 TFTLCD_DELAY, 50, // Delay 50ms 02467 0x0102, 0x01BD, // VREG1OUT voltage 02468 TFTLCD_DELAY, 50, // Delay 50ms 02469 0x0103, 0x2D00, // VDV[4:0] for VCOM amplitude 02470 0x0281, 0x000E, // VCM[5:0] for VCOMH 02471 TFTLCD_DELAY, 50, // 02472 0x0200, 0x0000, // GRAM horizontal Address 02473 0x0201, 0x0000, // GRAM Vertical Address 02474 // ----------- Adjust the Gamma Curve ----------// 02475 0x0300, 0x0000, // 02476 0x0301, 0x0707, // 02477 0x0302, 0x0606, // 02478 0x0305, 0x0000, // 02479 0x0306, 0x0D00, // 02480 0x0307, 0x0706, // 02481 0x0308, 0x0005, // 02482 0x0309, 0x0007, // 02483 0x030C, 0x0000, // 02484 0x030D, 0x000A, // 02485 //------------------ Set GRAM area ---------------// 02486 0x0400, 0x3100, // Gate Scan Line 400 lines 02487 0x0401, 0x0001, // NDL,VLE, REV 02488 0x0404, 0x0000, // set scrolling line 02489 //-------------- Partial Display Control ---------// 02490 0x0500, 0x0000, // Partial Image 1 Display Position 02491 0x0501, 0x0000, // Partial Image 1 RAM Start/End Address 02492 0x0502, 0x0000, // Partial Image 1 RAM Start/End Address 02493 0x0503, 0x0000, // Partial Image 2 Display Position 02494 0x0504, 0x0000, // Partial Image 2 RAM Start/End Address 02495 0x0505, 0x0000, // Partial Image 2 RAM Start/End Address 02496 //-------------- Panel Control -------------------// 02497 0x0010, 0x0010, // DIVI[1:0];RTNI[4:0] 02498 0x0011, 0x0600, // NOWI[2:0];SDTI[2:0] 02499 0x0020, 0x0002, // DIVE[1:0];RTNE[5:0] 02500 0x0007, 0x0173, // 262K color and display ON 02501 }; 02502 init_table16(ILI9326_CPT28_regValues, sizeof(ILI9326_CPT28_regValues)); 02503 p16 = (int16_t *) & HEIGHT; 02504 *p16 = 400; 02505 p16 = (int16_t *) & WIDTH; 02506 *p16 = 240; 02507 break; 02508 #endif 02509 02510 case 0x9327: 02511 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; 02512 static const uint8_t ILI9327_regValues[] PROGMEM = { 02513 0xB0, 1, 0x00, //Disable Protect for cmds B1-DF, E0-EF, F0-FF 02514 // 0xE0, 1, 0x20, //NV Memory Write [00] 02515 // 0xD1, 3, 0x00, 0x71, 0x19, //VCOM control [00 40 0F] 02516 // 0xD0, 3, 0x07, 0x01, 0x08, //Power Setting [07 04 8C] 02517 0xC1, 4, 0x10, 0x10, 0x02, 0x02, //Display Timing [10 10 02 02] 02518 0xC0, 6, 0x00, 0x35, 0x00, 0x00, 0x01, 0x02, //Panel Drive [00 35 00 00 01 02 REV=0,GS=0,SS=0 02519 0xC5, 1, 0x04, //Frame Rate [04] 02520 0xD2, 2, 0x01, 0x04, //Power Setting [01 44] 02521 // 0xC8, 15, 0x04, 0x67, 0x35, 0x04, 0x08, 0x06, 0x24, 0x01, 0x37, 0x40, 0x03, 0x10, 0x08, 0x80, 0x00, 02522 // 0xC8, 15, 0x00, 0x77, 0x77, 0x04, 0x04, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 02523 0xCA, 1, 0x00, //DGC LUT ??? 02524 0xEA, 1, 0x80, //3-Gamma Function Enable 02525 // 0xB0, 1, 0x03, //Enable Protect 02526 }; 02527 table8_ads = ILI9327_regValues, table_size = sizeof(ILI9327_regValues); 02528 p16 = (int16_t *) & HEIGHT; 02529 *p16 = 400; 02530 p16 = (int16_t *) & WIDTH; 02531 *p16 = 240; 02532 break; 02533 case 0x1602: 02534 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; //does not readGRAM 02535 static const uint8_t XX1602_regValues[] PROGMEM = { 02536 0xB8, 1, 0x01, //GS [00] 02537 0xC0, 1, 0x0E, //??Power [0A] 02538 }; 02539 table8_ads = XX1602_regValues, table_size = sizeof(XX1602_regValues); 02540 break; 02541 02542 case 0x2053: //weird from BangGood 02543 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN | READ_BGR; 02544 goto common_9329; 02545 case 0xAC11: 02546 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN; //thanks viliam 02547 goto common_9329; 02548 case 0x9302: 02549 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; 02550 goto common_9329; 02551 case 0x9338: 02552 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; 02553 goto common_9329; 02554 case 0x9329: 02555 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | INVERT_SS | REV_SCREEN; 02556 common_9329: 02557 static const uint8_t ILI9329_regValues[] PROGMEM = { 02558 // 0xF6, 3, 0x01, 0x01, 0x00, //Interface Control needs EXTC=1 MX_EOR=1, TM=0, RIM=0 02559 // 0xB6, 3, 0x0A, 0x82, 0x27, //Display Function [0A 82 27] 02560 // 0xB7, 1, 0x06, //Entry Mode Set [06] 02561 0x36, 1, 0x00, //Memory Access [00] pointless but stops an empty array 02562 }; 02563 table8_ads = ILI9329_regValues, table_size = sizeof(ILI9329_regValues); 02564 break; 02565 02566 case 0x9340: //ILI9340 thanks Ravi_kanchan2004 and valmor_jr 02567 //_lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN; //Ravi 02568 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; //my new shield 02569 goto common_9341; 02570 case 0x9341: 02571 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; 02572 common_9341: 02573 static const uint8_t ILI9341_regValues_2_4[] PROGMEM = { // BOE 2.4" 02574 0xF6, 3, 0x01, 0x01, 0x00, //Interface Control needs EXTC=1 MV_EOR=0, TM=0, RIM=0 02575 0xCF, 3, 0x00, 0x81, 0x30, //Power Control B [00 81 30] 02576 0xED, 4, 0x64, 0x03, 0x12, 0x81, //Power On Seq [55 01 23 01] 02577 0xE8, 3, 0x85, 0x10, 0x78, //Driver Timing A [04 11 7A] 02578 0xCB, 5, 0x39, 0x2C, 0x00, 0x34, 0x02, //Power Control A [39 2C 00 34 02] 02579 0xF7, 1, 0x20, //Pump Ratio [10] 02580 0xEA, 2, 0x00, 0x00, //Driver Timing B [66 00] 02581 0xB0, 1, 0x00, //RGB Signal [00] 02582 0xB1, 2, 0x00, 0x1B, //Frame Control [00 1B] 02583 // 0xB6, 2, 0x0A, 0xA2, 0x27, //Display Function [0A 82 27 XX] .kbv SS=1 02584 0xB4, 1, 0x00, //Inversion Control [02] .kbv NLA=1, NLB=1, NLC=1 02585 0xC0, 1, 0x21, //Power Control 1 [26] 02586 0xC1, 1, 0x11, //Power Control 2 [00] 02587 0xC5, 2, 0x3F, 0x3C, //VCOM 1 [31 3C] 02588 0xC7, 1, 0xB5, //VCOM 2 [C0] 02589 0x36, 1, 0x48, //Memory Access [00] 02590 0xF2, 1, 0x00, //Enable 3G [02] 02591 0x26, 1, 0x01, //Gamma Set [01] 02592 0xE0, 15, 0x0f, 0x26, 0x24, 0x0b, 0x0e, 0x09, 0x54, 0xa8, 0x46, 0x0c, 0x17, 0x09, 0x0f, 0x07, 0x00, 02593 0xE1, 15, 0x00, 0x19, 0x1b, 0x04, 0x10, 0x07, 0x2a, 0x47, 0x39, 0x03, 0x06, 0x06, 0x30, 0x38, 0x0f, 02594 }; 02595 static const uint8_t ILI9341_regValues_ada[] PROGMEM = { // Adafruit_TFTLCD only works with EXTC=0 02596 // 0xF6, 3, 0x00, 0x01, 0x00, //Interface Control needs EXTC=1 TM=0, RIM=0 02597 // 0xF6, 3, 0x01, 0x01, 0x03, //Interface Control needs EXTC=1 RM=1, RIM=1 02598 0xF6, 3, 0x09, 0x01, 0x03, //Interface Control needs EXTC=1 RM=0, RIM=1 02599 0xB0, 1, 0x40, //RGB Signal [40] RCM=2 02600 0xB4, 1, 0x00, //Inversion Control [02] .kbv NLA=1, NLB=1, NLC=1 02601 0xC0, 1, 0x23, //Power Control 1 [26] 02602 0xC1, 1, 0x10, //Power Control 2 [00] 02603 0xC5, 2, 0x2B, 0x2B, //VCOM 1 [31 3C] 02604 0xC7, 1, 0xC0, //VCOM 2 [C0] 02605 0x36, 1, 0x88, //Memory Access [00] 02606 0xB1, 2, 0x00, 0x1B, //Frame Control [00 1B] 02607 0xB7, 1, 0x07, //Entry Mode [00] 02608 }; 02609 table8_ads = ILI9341_regValues_2_4, table_size = sizeof(ILI9341_regValues_2_4); // 02610 break; 02611 #if defined(SUPPORT_9342) 02612 case 0x9342: 02613 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | INVERT_GS | REV_SCREEN; 02614 static const uint8_t ILI9342_regValues_CPT24[] PROGMEM = { //CPT 2.4" 02615 (0xB9), 3, 0xFF, 0x93, 0x42, //[00 00 00] 02616 (0xC0), 2, 0x1D, 0x0A, //[26 09] 02617 (0xC1), 1, 0x02, //[10] 02618 (0xC5), 2, 0x2F, 0x2F, //[31 3C] 02619 (0xC7), 1, 0xC3, //[C0] 02620 (0xB8), 1, 0x0B, //[07] 02621 (0xE0), 15, 0x0F, 0x33, 0x30, 0x0C, 0x0F, 0x08, 0x5D, 0x66, 0x4A, 0x07, 0x13, 0x05, 0x1B, 0x0E, 0x08, 02622 (0xE1), 15, 0x08, 0x0E, 0x11, 0x02, 0x0E, 0x02, 0x24, 0x33, 0x37, 0x03, 0x0A, 0x09, 0x26, 0x33, 0x0F, 02623 }; 02624 static const uint8_t ILI9342_regValues_Tianma23[] PROGMEM = { //Tianma 2.3" 02625 (0xB9), 3, 0xFF, 0x93, 0x42, 02626 (0xC0), 2, 0x1D, 0x0A, 02627 (0xC1), 1, 0x01, 02628 (0xC5), 2, 0x2C, 0x2C, 02629 (0xC7), 1, 0xC6, 02630 (0xB8), 1, 0x09, 02631 (0xE0), 15, 0x0F, 0x26, 0x21, 0x07, 0x0A, 0x03, 0x4E, 0x62, 0x3E, 0x0B, 0x11, 0x00, 0x08, 0x02, 0x00, 02632 (0xE1), 15, 0x00, 0x19, 0x1E, 0x03, 0x0E, 0x03, 0x30, 0x23, 0x41, 0x03, 0x0B, 0x07, 0x2F, 0x36, 0x0F, 02633 }; 02634 static const uint8_t ILI9342_regValues_HSD23[] PROGMEM = { //HSD 2.3" 02635 (0xB9), 3, 0xFF, 0x93, 0x42, 02636 (0xC0), 2, 0x1D, 0x0A, 02637 (0xC1), 1, 0x02, 02638 (0xC5), 2, 0x2F, 0x27, 02639 (0xC7), 1, 0xA4, 02640 (0xB8), 1, 0x0B, 02641 (0xE0), 15, 0x0F, 0x24, 0x21, 0x0C, 0x0F, 0x06, 0x50, 0x75, 0x3F, 0x07, 0x12, 0x05, 0x11, 0x0B, 0x08, 02642 (0xE1), 15, 0x08, 0x1D, 0x20, 0x02, 0x0E, 0x04, 0x31, 0x24, 0x42, 0x03, 0x0B, 0x09, 0x30, 0x36, 0x0F, 02643 }; 02644 table8_ads = ILI9342_regValues_CPT24, table_size = sizeof(ILI9342_regValues_CPT24); // 02645 // table8_ads = ILI9342_regValues_Tianma23, table_size = sizeof(ILI9342_regValues_Tianma23); // 02646 // table8_ads = ILI9342_regValues_HSD23, table_size = sizeof(ILI9342_regValues_HSD23); // 02647 p16 = (int16_t *) & HEIGHT; 02648 *p16 = 240; 02649 p16 = (int16_t *) & WIDTH; 02650 *p16 = 320; 02651 break; 02652 #endif 02653 case 0x1581: //no BGR in MADCTL. set BGR in Panel Control 02654 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; //thanks zdravke 02655 goto common_9481; 02656 case 0x9481: 02657 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_BGR; 02658 common_9481: 02659 static const uint8_t ILI9481_regValues[] PROGMEM = { // Atmel MaxTouch 02660 0xB0, 1, 0x00, // unlocks E0, F0 02661 0xB3, 4, 0x02, 0x00, 0x00, 0x00, //Frame Memory, interface [02 00 00 00] 02662 0xB4, 1, 0x00, // Frame mode [00] 02663 0xD0, 3, 0x07, 0x42, 0x18, // Set Power [00 43 18] x1.00, x6, x3 02664 0xD1, 3, 0x00, 0x07, 0x10, // Set VCOM [00 00 00] x0.72, x1.02 02665 0xD2, 2, 0x01, 0x02, // Set Power for Normal Mode [01 22] 02666 0xD3, 2, 0x01, 0x02, // Set Power for Partial Mode [01 22] 02667 0xD4, 2, 0x01, 0x02, // Set Power for Idle Mode [01 22] 02668 0xC0, 5, 0x12, 0x3B, 0x00, 0x02, 0x11, //Panel Driving BGR for 1581 [10 3B 00 02 11] 02669 0xC1, 3, 0x10, 0x10, 0x88, // Display Timing Normal [10 10 88] 02670 0xC5, 1, 0x03, //Frame Rate [03] 02671 0xC6, 1, 0x02, //Interface Control [02] 02672 0xC8, 12, 0x00, 0x32, 0x36, 0x45, 0x06, 0x16, 0x37, 0x75, 0x77, 0x54, 0x0C, 0x00, 02673 0xCC, 1, 0x00, //Panel Control [00] 02674 }; 02675 static const uint8_t ILI9481_CPT29_regValues[] PROGMEM = { // 320x430 02676 0xB0, 1, 0x00, 02677 0xD0, 3, 0x07, 0x42, 0x1C, // Set Power [00 43 18] 02678 0xD1, 3, 0x00, 0x02, 0x0F, // Set VCOM [00 00 00] x0.695, x1.00 02679 0xD2, 2, 0x01, 0x11, // Set Power for Normal Mode [01 22] 02680 0xC0, 5, 0x10, 0x35, 0x00, 0x02, 0x11, //Set Panel Driving [10 3B 00 02 11] 02681 0xC5, 1, 0x03, //Frame Rate [03] 02682 0xC8, 12, 0x00, 0x30, 0x36, 0x45, 0x04, 0x16, 0x37, 0x75, 0x77, 0x54, 0x0F, 0x00, 02683 0xE4, 1, 0xA0, 02684 0xF0, 1, 0x01, 02685 0xF3, 2, 0x02, 0x1A, 02686 }; 02687 static const uint8_t ILI9481_PVI35_regValues[] PROGMEM = { // 320x480 02688 0xB0, 1, 0x00, 02689 0xD0, 3, 0x07, 0x41, 0x1D, // Set Power [00 43 18] 02690 0xD1, 3, 0x00, 0x2B, 0x1F, // Set VCOM [00 00 00] x0.900, x1.32 02691 0xD2, 2, 0x01, 0x11, // Set Power for Normal Mode [01 22] 02692 0xC0, 5, 0x10, 0x3B, 0x00, 0x02, 0x11, //Set Panel Driving [10 3B 00 02 11] 02693 0xC5, 1, 0x03, //Frame Rate [03] 02694 0xC8, 12, 0x00, 0x14, 0x33, 0x10, 0x00, 0x16, 0x44, 0x36, 0x77, 0x00, 0x0F, 0x00, 02695 0xE4, 1, 0xA0, 02696 0xF0, 1, 0x01, 02697 0xF3, 2, 0x40, 0x0A, 02698 }; 02699 static const uint8_t ILI9481_AUO317_regValues[] PROGMEM = { // 320x480 02700 0xB0, 1, 0x00, 02701 0xD0, 3, 0x07, 0x40, 0x1D, // Set Power [00 43 18] 02702 0xD1, 3, 0x00, 0x18, 0x13, // Set VCOM [00 00 00] x0.805, x1.08 02703 0xD2, 2, 0x01, 0x11, // Set Power for Normal Mode [01 22] 02704 0xC0, 5, 0x10, 0x3B, 0x00, 0x02, 0x11, //Set Panel Driving [10 3B 00 02 11] 02705 0xC5, 1, 0x03, //Frame Rate [03] 02706 0xC8, 12, 0x00, 0x44, 0x06, 0x44, 0x0A, 0x08, 0x17, 0x33, 0x77, 0x44, 0x08, 0x0C, 02707 0xE4, 1, 0xA0, 02708 0xF0, 1, 0x01, 02709 }; 02710 static const uint8_t ILI9481_CMO35_regValues[] PROGMEM = { // 320480 02711 0xB0, 1, 0x00, 02712 0xD0, 3, 0x07, 0x41, 0x1D, // Set Power [00 43 18] 07,41,1D 02713 0xD1, 3, 0x00, 0x1C, 0x1F, // Set VCOM [00 00 00] x0.825, x1.32 1C,1F 02714 0xD2, 2, 0x01, 0x11, // Set Power for Normal Mode [01 22] 02715 0xC0, 5, 0x10, 0x3B, 0x00, 0x02, 0x11, //Set Panel Driving [10 3B 00 02 11] 02716 0xC5, 1, 0x03, //Frame Rate [03] 02717 0xC6, 1, 0x83, 02718 0xC8, 12, 0x00, 0x26, 0x21, 0x00, 0x00, 0x1F, 0x65, 0x23, 0x77, 0x00, 0x0F, 0x00, 02719 0xF0, 1, 0x01, //? 02720 0xE4, 1, 0xA0, //?SETCABC on Himax 02721 0x36, 1, 0x48, //Memory Access [00] 02722 0xB4, 1, 0x11, 02723 }; 02724 static const uint8_t ILI9481_RGB_regValues[] PROGMEM = { // 320x480 02725 0xB0, 1, 0x00, 02726 0xD0, 3, 0x07, 0x41, 0x1D, // SETPOWER [00 43 18] 02727 0xD1, 3, 0x00, 0x2B, 0x1F, // SETVCOM [00 00 00] x0.900, x1.32 02728 0xD2, 2, 0x01, 0x11, // SETNORPOW for Normal Mode [01 22] 02729 0xC0, 6, 0x10, 0x3B, 0x00, 0x02, 0x11, 0x00, //SETPANEL [10 3B 00 02 11] 02730 0xC5, 1, 0x03, //SETOSC Frame Rate [03] 02731 0xC6, 1, 0x80, //SETRGB interface control 02732 0xC8, 12, 0x00, 0x14, 0x33, 0x10, 0x00, 0x16, 0x44, 0x36, 0x77, 0x00, 0x0F, 0x00, 02733 0xF3, 2, 0x40, 0x0A, 02734 0xF0, 1, 0x08, 02735 0xF6, 1, 0x84, 02736 0xF7, 1, 0x80, 02737 0x0C, 2, 0x00, 0x55, //RDCOLMOD 02738 0xB4, 1, 0x00, //SETDISPLAY 02739 // 0xB3, 4, 0x00, 0x01, 0x06, 0x01, //SETGRAM simple example 02740 0xB3, 4, 0x00, 0x01, 0x06, 0x30, //jpegs example 02741 }; 02742 table8_ads = ILI9481_regValues, table_size = sizeof(ILI9481_regValues); 02743 // table8_ads = ILI9481_CPT29_regValues, table_size = sizeof(ILI9481_CPT29_regValues); 02744 // table8_ads = ILI9481_PVI35_regValues, table_size = sizeof(ILI9481_PVI35_regValues); 02745 // table8_ads = ILI9481_AUO317_regValues, table_size = sizeof(ILI9481_AUO317_regValues); 02746 // table8_ads = ILI9481_CMO35_regValues, table_size = sizeof(ILI9481_CMO35_regValues); 02747 // table8_ads = ILI9481_RGB_regValues, table_size = sizeof(ILI9481_RGB_regValues); 02748 p16 = (int16_t *) & HEIGHT; 02749 *p16 = 480; 02750 p16 = (int16_t *) & WIDTH; 02751 *p16 = 320; 02752 break; 02753 case 0x9486: 02754 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; //Red 3.5", Blue 3.5" 02755 // _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN; //old Red 3.5" 02756 static const uint8_t ILI9486_regValues[] PROGMEM = { 02757 /* 02758 0xF2, 9, 0x1C, 0xA3, 0x32, 0x02, 0xB2, 0x12, 0xFF, 0x12, 0x00, //f.k 02759 0xF1, 2, 0x36, 0xA4, // 02760 0xF8, 2, 0x21, 0x04, // 02761 0xF9, 2, 0x00, 0x08, // 02762 */ 02763 0xC0, 2, 0x0d, 0x0d, //Power Control 1 [0E 0E] 02764 0xC1, 2, 0x43, 0x00, //Power Control 2 [43 00] 02765 0xC2, 1, 0x00, //Power Control 3 [33] 02766 0xC5, 4, 0x00, 0x48, 0x00, 0x48, //VCOM Control 1 [00 40 00 40] 02767 0xB4, 1, 0x00, //Inversion Control [00] 02768 0xB6, 3, 0x02, 0x02, 0x3B, // Display Function Control [02 02 3B] 02769 #define GAMMA9486 4 02770 #if GAMMA9486 == 0 02771 // default GAMMA terrible 02772 #elif GAMMA9486 == 1 02773 // GAMMA f.k. bad 02774 0xE0, 15, 0x0f, 0x31, 0x2b, 0x0c, 0x0e, 0x08, 0x4e, 0xf1, 0x37, 0x07, 0x10, 0x03, 0x0e, 0x09, 0x00, 02775 0xE1, 15, 0x00, 0x0e, 0x14, 0x03, 0x11, 0x07, 0x31, 0xC1, 0x48, 0x08, 0x0f, 0x0c, 0x31, 0x36, 0x0f, 02776 #elif GAMMA9486 == 2 02777 // 1.2 CPT 3.5 Inch Initial Code not bad 02778 0xE0, 15, 0x0F, 0x1B, 0x18, 0x0B, 0x0E, 0x09, 0x47, 0x94, 0x35, 0x0A, 0x13, 0x05, 0x08, 0x03, 0x00, 02779 0xE1, 15, 0x0F, 0x3A, 0x37, 0x0B, 0x0C, 0x05, 0x4A, 0x24, 0x39, 0x07, 0x10, 0x04, 0x27, 0x25, 0x00, 02780 #elif GAMMA9486 == 3 02781 // 2.2 HSD 3.5 Inch Initial Code not bad 02782 0xE0, 15, 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98, 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00, 02783 0xE1, 15, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75, 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00, 02784 #elif GAMMA9486 == 4 02785 // 3.2 TM 3.2 Inch Initial Code not bad 02786 0xE0, 15, 0x0F, 0x21, 0x1C, 0x0B, 0x0E, 0x08, 0x49, 0x98, 0x38, 0x09, 0x11, 0x03, 0x14, 0x10, 0x00, 02787 0xE1, 15, 0x0F, 0x2F, 0x2B, 0x0C, 0x0E, 0x06, 0x47, 0x76, 0x37, 0x07, 0x11, 0x04, 0x23, 0x1E, 0x00, 02788 #elif GAMMA9486 == 5 02789 // 4.2 WTK 3.5 Inch Initial Code too white 02790 0xE0, 15, 0x0F, 0x10, 0x08, 0x05, 0x09, 0x05, 0x37, 0x98, 0x26, 0x07, 0x0F, 0x02, 0x09, 0x07, 0x00, 02791 0xE1, 15, 0x0F, 0x38, 0x36, 0x0D, 0x10, 0x08, 0x59, 0x76, 0x48, 0x0A, 0x16, 0x0A, 0x37, 0x2F, 0x00, 02792 #endif 02793 }; 02794 table8_ads = ILI9486_regValues, table_size = sizeof(ILI9486_regValues); 02795 p16 = (int16_t *) & HEIGHT; 02796 *p16 = 480; 02797 p16 = (int16_t *) & WIDTH; 02798 *p16 = 320; 02799 break; 02800 case 0x7796: 02801 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; //thanks to safari1 02802 static const uint8_t PROGMEM ST7796_regValues[] = { 02803 0xB7, 1, 0xC6, //Entry Mode [06] 02804 0xE8, 8, 0x40, 0x8A, 0x00, 0x00, 0x29, 0x19, 0xA5, 0x33, //Adj3 [40 8A 00 00 25 0A 38 33] 02805 }; 02806 table8_ads = ST7796_regValues, table_size = sizeof(ST7796_regValues); 02807 p16 = (int16_t *) & HEIGHT; 02808 *p16 = 480; 02809 p16 = (int16_t *) & WIDTH; 02810 *p16 = 320; 02811 break; 02812 //goto common_9488; 02813 case 0x9487: //with thanks to Charlyf 02814 case 0x9488: 02815 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; 02816 common_9488: 02817 static const uint8_t ILI9488_regValues_max[] PROGMEM = { // Atmel MaxTouch 02818 0xC0, 2, 0x10, 0x10, //Power Control 1 [0E 0E] 02819 0xC1, 1, 0x41, //Power Control 2 [43] 02820 0xC5, 4, 0x00, 0x22, 0x80, 0x40, //VCOM Control 1 [00 40 00 40] 02821 0x36, 1, 0x68, //Memory Access [00] 02822 0xB0, 1, 0x00, //Interface [00] 02823 0xB1, 2, 0xB0, 0x11, //Frame Rate Control [B0 11] 02824 0xB4, 1, 0x02, //Inversion Control [02] 02825 0xB6, 3, 0x02, 0x02, 0x3B, // Display Function Control [02 02 3B] .kbv NL=480 02826 0xB7, 1, 0xC6, //Entry Mode [06] 02827 0x3A, 1, 0x55, //Interlace Pixel Format [XX] 02828 0xF7, 4, 0xA9, 0x51, 0x2C, 0x82, //Adjustment Control 3 [A9 51 2C 82] 02829 }; 02830 table8_ads = ILI9488_regValues_max, table_size = sizeof(ILI9488_regValues_max); 02831 p16 = (int16_t *) & HEIGHT; 02832 *p16 = 480; 02833 p16 = (int16_t *) & WIDTH; 02834 *p16 = 320; 02835 break; 02836 case 0xB505: //R61505V 02837 case 0xC505: //R61505W 02838 _lcd_capable = 0 | REV_SCREEN | READ_LOWHIGH; 02839 static const uint16_t R61505V_regValues[] PROGMEM = { 02840 0x0000, 0x0000, 02841 0x0000, 0x0000, 02842 0x0000, 0x0000, 02843 0x0000, 0x0001, 02844 0x00A4, 0x0001, //CALB=1 02845 TFTLCD_DELAY, 10, 02846 0x0060, 0x2700, //NL 02847 0x0008, 0x0808, //FP & BP 02848 0x0030, 0x0214, //Gamma settings 02849 0x0031, 0x3715, 02850 0x0032, 0x0604, 02851 0x0033, 0x0E16, 02852 0x0034, 0x2211, 02853 0x0035, 0x1500, 02854 0x0036, 0x8507, 02855 0x0037, 0x1407, 02856 0x0038, 0x1403, 02857 0x0039, 0x0020, 02858 0x0090, 0x0015, //DIVI & RTNI 02859 0x0010, 0x0410, //BT=4,AP=1 02860 0x0011, 0x0237, //DC1=2,DC0=3, VC=7 02861 0x0029, 0x0046, //VCM1=70 02862 0x002A, 0x0046, //VCMSEL=0,VCM2=70 02863 // Sleep mode IN sequence 02864 0x0007, 0x0000, 02865 //0x0012, 0x0000, //PSON=0,PON=0 02866 // Sleep mode EXIT sequence 02867 0x0012, 0x0189, //VCMR=1,PSON=0,PON=0,VRH=9 02868 0x0013, 0x1100, //VDV=17 02869 TFTLCD_DELAY, 150, 02870 0x0012, 0x01B9, //VCMR=1,PSON=1,PON=1,VRH=9 [018F] 02871 0x0001, 0x0100, //SS=1 Other mode settings 02872 0x0002, 0x0200, //BC0=1--Line inversion 02873 0x0003, 0x1030, 02874 0x0009, 0x0001, //ISC=1 [0000] 02875 0x000A, 0x0000, // [0000] 02876 // 0x000C, 0x0001, //RIM=1 [0000] 02877 0x000D, 0x0000, // [0000] 02878 0x000E, 0x0030, //VEM=3 VCOM equalize [0000] 02879 0x0061, 0x0001, 02880 0x006A, 0x0000, 02881 0x0080, 0x0000, 02882 0x0081, 0x0000, 02883 0x0082, 0x005F, 02884 0x0092, 0x0100, 02885 0x0093, 0x0701, 02886 TFTLCD_DELAY, 80, 02887 0x0007, 0x0100, //BASEE=1--Display On 02888 }; 02889 init_table16(R61505V_regValues, sizeof(R61505V_regValues)); 02890 break; 02891 02892 #if defined(SUPPORT_B509_7793) 02893 case 0x7793: 02894 case 0xB509: 02895 _lcd_capable = REV_SCREEN; 02896 static const uint16_t R61509V_regValues[] PROGMEM = { 02897 0x0000, 0x0000, 02898 0x0000, 0x0000, 02899 0x0000, 0x0000, 02900 0x0000, 0x0000, 02901 TFTLCD_DELAY, 15, 02902 0x0400, 0x6200, //NL=0x31 (49) i.e. 400 rows 02903 0x0008, 0x0808, 02904 //gamma 02905 0x0300, 0x0C00, 02906 0x0301, 0x5A0B, 02907 0x0302, 0x0906, 02908 0x0303, 0x1017, 02909 0x0304, 0x2300, 02910 0x0305, 0x1700, 02911 0x0306, 0x6309, 02912 0x0307, 0x0C09, 02913 0x0308, 0x100C, 02914 0x0309, 0x2232, 02915 02916 0x0010, 0x0016, //69.5Hz 0016 02917 0x0011, 0x0101, 02918 0x0012, 0x0000, 02919 0x0013, 0x0001, 02920 02921 0x0100, 0x0330, //BT,AP 02922 0x0101, 0x0237, //DC0,DC1,VC 02923 0x0103, 0x0D00, //VDV 02924 0x0280, 0x6100, //VCM 02925 0x0102, 0xC1B0, //VRH,VCMR,PSON,PON 02926 TFTLCD_DELAY, 50, 02927 02928 0x0001, 0x0100, 02929 0x0002, 0x0100, 02930 0x0003, 0x1030, //1030 02931 0x0009, 0x0001, 02932 0x000C, 0x0000, 02933 0x0090, 0x8000, 02934 0x000F, 0x0000, 02935 02936 0x0210, 0x0000, 02937 0x0211, 0x00EF, 02938 0x0212, 0x0000, 02939 0x0213, 0x018F, //432=01AF,400=018F 02940 0x0500, 0x0000, 02941 0x0501, 0x0000, 02942 0x0502, 0x005F, //??? 02943 0x0401, 0x0001, //REV=1 02944 0x0404, 0x0000, 02945 TFTLCD_DELAY, 50, 02946 02947 0x0007, 0x0100, //BASEE 02948 TFTLCD_DELAY, 50, 02949 02950 0x0200, 0x0000, 02951 0x0201, 0x0000, 02952 }; 02953 init_table16(R61509V_regValues, sizeof(R61509V_regValues)); 02954 p16 = (int16_t *) & HEIGHT; 02955 *p16 = 400; 02956 break; 02957 #endif 02958 02959 #ifdef SUPPORT_9806 02960 case 0x9806: 02961 _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; 02962 // from ZinggJM 02963 static const uint8_t ILI9806_regValues[] PROGMEM = { 02964 (0xFF), 3, /* EXTC Command Set enable register*/ 0xFF, 0x98, 0x06, 02965 (0xBA), 1, /* SPI Interface Setting*/0xE0, 02966 (0xBC), 21, /* GIP 1*/0x03, 0x0F, 0x63, 0x69, 0x01, 0x01, 0x1B, 0x11, 0x70, 0x73, 0xFF, 0xFF, 0x08, 0x09, 0x05, 0x00, 0xEE, 0xE2, 0x01, 0x00, 0xC1, 02967 (0xBD), 8, /* GIP 2*/0x01, 0x23, 0x45, 0x67, 0x01, 0x23, 0x45, 0x67, 02968 (0xBE), 9, /* GIP 3*/0x00, 0x22, 0x27, 0x6A, 0xBC, 0xD8, 0x92, 0x22, 0x22, 02969 (0xC7), 1, /* Vcom*/0x1E, 02970 (0xED), 3, /* EN_volt_reg*/0x7F, 0x0F, 0x00, 02971 (0xC0), 3, /* Power Control 1*/0xE3, 0x0B, 0x00, 02972 (0xFC), 1, 0x08, 02973 (0xDF), 6, /* Engineering Setting*/0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 02974 (0xF3), 1, /* DVDD Voltage Setting*/0x74, 02975 (0xB4), 3, /* Display Inversion Control*/0x00, 0x00, 0x00, 02976 (0xF7), 1, /* 480x854*/0x81, 02977 (0xB1), 3, /* Frame Rate*/0x00, 0x10, 0x14, 02978 (0xF1), 3, /* Panel Timing Control*/0x29, 0x8A, 0x07, 02979 (0xF2), 4, /*Panel Timing Control*/0x40, 0xD2, 0x50, 0x28, 02980 (0xC1), 4, /* Power Control 2*/0x17, 0x85, 0x85, 0x20, 02981 (0xE0), 16, 0x00, 0x0C, 0x15, 0x0D, 0x0F, 0x0C, 0x07, 0x05, 0x07, 0x0B, 0x10, 0x10, 0x0D, 0x17, 0x0F, 0x00, 02982 (0xE1), 16, 0x00, 0x0D, 0x15, 0x0E, 0x10, 0x0D, 0x08, 0x06, 0x07, 0x0C, 0x11, 0x11, 0x0E, 0x17, 0x0F, 0x00, 02983 (0x35), 1, /*Tearing Effect ON*/0x00, 02984 }; 02985 table8_ads = ILI9806_regValues, table_size = sizeof(ILI9806_regValues); 02986 p16 = (int16_t *) & HEIGHT; 02987 *p16 = 480; 02988 p16 = (int16_t *) & WIDTH; 02989 *p16 = 854; 02990 break; 02991 #endif 02992 default: 02993 p16 = (int16_t *) & WIDTH; 02994 *p16 = 0; //error value for WIDTH 02995 break; 02996 } 02997 _lcd_rev = ((_lcd_capable & REV_SCREEN) != 0); 02998 if (table8_ads != NULL) { 02999 static const uint8_t reset_off[] PROGMEM = { 03000 0x01, 0, //Soft Reset 03001 TFTLCD_DELAY8, 150, // .kbv will power up with ONLY reset, sleep out, display on 03002 0x28, 0, //Display Off 03003 0x3A, 1, 0x55, //Pixel read=565, write=565. 03004 }; 03005 static const uint8_t wake_on[] PROGMEM = { 03006 0x11, 0, //Sleep Out 03007 TFTLCD_DELAY8, 150, 03008 0x29, 0, //Display On 03009 }; 03010 init_table(&reset_off, sizeof(reset_off)); 03011 init_table(table8_ads, table_size); //can change PIXFMT 03012 init_table(&wake_on, sizeof(wake_on)); 03013 } 03014 setRotation(0); //PORTRAIT 03015 invertDisplay(false); 03016 #if defined(SUPPORT_9488_555) 03017 if (_lcd_ID == 0x9488) { 03018 is555 = 0; 03019 drawPixel(0, 0, 0xFFE0); 03020 if (readPixel(0, 0) == 0xFF1F) { 03021 uint8_t pixfmt = 0x06; 03022 pushCommand(0x3A, &pixfmt, 1); 03023 _lcd_capable &= ~READ_24BITS; 03024 is555 = 1; 03025 } 03026 } 03027 #endif 03028 } 03029
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