h3 imported to make Bob work

Dependents:   mDot_Bob

Committer:
daveheitzman
Date:
Fri Oct 23 18:26:28 2015 +0000
Revision:
0:a9de25fd7c41
publishing mDot_Bob

Who changed what in which revision?

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daveheitzman 0:a9de25fd7c41 1 /*
daveheitzman 0:a9de25fd7c41 2 * H3LIS331DL.h
daveheitzman 0:a9de25fd7c41 3 * A library for 3-Axis Digital Accelerometer(±400g)
daveheitzman 0:a9de25fd7c41 4 *
daveheitzman 0:a9de25fd7c41 5 * Copyright (c) 2014 seeed technology inc.
daveheitzman 0:a9de25fd7c41 6 * Website : www.seeed.cc
daveheitzman 0:a9de25fd7c41 7 * Author : lawliet zou
daveheitzman 0:a9de25fd7c41 8 * Create Time: April 2014
daveheitzman 0:a9de25fd7c41 9 * Change Log :
daveheitzman 0:a9de25fd7c41 10 *
daveheitzman 0:a9de25fd7c41 11 * The MIT License (MIT)
daveheitzman 0:a9de25fd7c41 12 *
daveheitzman 0:a9de25fd7c41 13 * Permission is hereby granted, free of charge, to any person obtaining a copy
daveheitzman 0:a9de25fd7c41 14 * of this software and associated documentation files (the "Software"), to deal
daveheitzman 0:a9de25fd7c41 15 * in the Software without restriction, including without limitation the rights
daveheitzman 0:a9de25fd7c41 16 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
daveheitzman 0:a9de25fd7c41 17 * copies of the Software, and to permit persons to whom the Software is
daveheitzman 0:a9de25fd7c41 18 * furnished to do so, subject to the following conditions:
daveheitzman 0:a9de25fd7c41 19 *
daveheitzman 0:a9de25fd7c41 20 * The above copyright notice and this permission notice shall be included in
daveheitzman 0:a9de25fd7c41 21 * all copies or substantial portions of the Software.
daveheitzman 0:a9de25fd7c41 22 *
daveheitzman 0:a9de25fd7c41 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
daveheitzman 0:a9de25fd7c41 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
daveheitzman 0:a9de25fd7c41 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
daveheitzman 0:a9de25fd7c41 26 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
daveheitzman 0:a9de25fd7c41 27 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
daveheitzman 0:a9de25fd7c41 28 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
daveheitzman 0:a9de25fd7c41 29 * THE SOFTWARE.
daveheitzman 0:a9de25fd7c41 30 */
daveheitzman 0:a9de25fd7c41 31
daveheitzman 0:a9de25fd7c41 32 #include "mbed.h"
daveheitzman 0:a9de25fd7c41 33
daveheitzman 0:a9de25fd7c41 34 #ifndef H3LIS331DL_H
daveheitzman 0:a9de25fd7c41 35 #define H3LIS331DL_H
daveheitzman 0:a9de25fd7c41 36
daveheitzman 0:a9de25fd7c41 37 #define MEMS_SET 0x01
daveheitzman 0:a9de25fd7c41 38 #define MEMS_RESET 0x00
daveheitzman 0:a9de25fd7c41 39
daveheitzman 0:a9de25fd7c41 40 #define H3LIS331DL_MEMS_I2C_ADDRESS 0x18//0x32
daveheitzman 0:a9de25fd7c41 41
daveheitzman 0:a9de25fd7c41 42 //Register and define
daveheitzman 0:a9de25fd7c41 43 #define H3LIS331DL_WHO_AM_I 0x0F // device identification register
daveheitzman 0:a9de25fd7c41 44
daveheitzman 0:a9de25fd7c41 45 // CONTROL REGISTER 1
daveheitzman 0:a9de25fd7c41 46 #define H3LIS331DL_CTRL_REG1 0x20
daveheitzman 0:a9de25fd7c41 47 #define H3LIS331DL_PM BIT(5) //PowerMode selection: 000 - power down / 001 - normal mode / other - low power
daveheitzman 0:a9de25fd7c41 48 #define H3LIS331DL_DR BIT(3) //output data rate: 00 - 50hz / 01 - 100hz / 10 - 400hz / 11 - 1000hz
daveheitzman 0:a9de25fd7c41 49 #define H3LIS331DL_ZEN BIT(2) //Z-axis enable: 0 - disable / 1 - enable
daveheitzman 0:a9de25fd7c41 50 #define H3LIS331DL_YEN BIT(1) //Y-axis enable: 0 - disable / 1 - enable
daveheitzman 0:a9de25fd7c41 51 #define H3LIS331DL_XEN BIT(0) //Y-axis enable: 0 - disable / 1 - enable
daveheitzman 0:a9de25fd7c41 52
daveheitzman 0:a9de25fd7c41 53 //CONTROL REGISTER 2
daveheitzman 0:a9de25fd7c41 54 #define H3LIS331DL_CTRL_REG2 0x21
daveheitzman 0:a9de25fd7c41 55 #define H3LIS331DL_BOOT BIT(7) //reboot memory content, default is 0
daveheitzman 0:a9de25fd7c41 56 #define H3LIS331DL_HPM BIT(5) //High-pass-filter mode selection, default is 00
daveheitzman 0:a9de25fd7c41 57 #define H3LIS331DL_FDS BIT(4) //Filter data selection, default is 0
daveheitzman 0:a9de25fd7c41 58 #define H3LIS331DL_HPEN2 BIT(3) //High-pass filter enabled for interrupt 2 source, default is 0
daveheitzman 0:a9de25fd7c41 59 #define H3LIS331DL_HPEN1 BIT(2) //High-pass filter enabled for interrupt 1 source, default is 0
daveheitzman 0:a9de25fd7c41 60 #define H3LIS331DL_HPCF BIT(0) //High-pass filter cutoff frequency configuration, default is 00
daveheitzman 0:a9de25fd7c41 61
daveheitzman 0:a9de25fd7c41 62 //CONTROL REGISTER 3
daveheitzman 0:a9de25fd7c41 63 #define H3LIS331DL_CTRL_REG3 0x22
daveheitzman 0:a9de25fd7c41 64 #define H3LIS331DL_IHL BIT(7) //Interrupt active high,low. default is 0
daveheitzman 0:a9de25fd7c41 65 #define H3LIS331DL_PP_OD BIT(6) //Push-pull/open drain selection on interrupt pad. default is 0
daveheitzman 0:a9de25fd7c41 66 #define H3LIS331DL_LIR2 BIT(5) //Latch interrupt request on INT2_SRC register, with INT2_SRC register cleared by read INT2_SRC itself. default is 0
daveheitzman 0:a9de25fd7c41 67 #define H3LIS331DL_I2_CFG BIT(3) //Data signal on INT2 pad control bits, default is 00
daveheitzman 0:a9de25fd7c41 68 #define H3LIS331DL_LIR1 BIT(2) //Latch interrupt request on the INT1_SRC register, with the INT1_SRC register cleared by reading the INT1_SRC register.
daveheitzman 0:a9de25fd7c41 69 #define H3LIS331DL_I1_CFG BIT(0) //Data signal on INT1 pad control bits, default is 00
daveheitzman 0:a9de25fd7c41 70
daveheitzman 0:a9de25fd7c41 71 //CONTROL REGISTER 4
daveheitzman 0:a9de25fd7c41 72 #define H3LIS331DL_CTRL_REG4 0x23
daveheitzman 0:a9de25fd7c41 73 #define H3LIS331DL_BDU BIT(7) //Block data update, default is 0
daveheitzman 0:a9de25fd7c41 74 #define H3LIS331DL_BLE BIT(6) //Big/little endian data selection, default is 0
daveheitzman 0:a9de25fd7c41 75 #define H3LIS331DL_FS BIT(4) //Full scale selection, default is 00(00:100g;01:200g;11:400g)
daveheitzman 0:a9de25fd7c41 76 #define H3LIS331DL_ST_SIGN BIT(3) //
daveheitzman 0:a9de25fd7c41 77 #define H3LIS331DL_ST BIT(1) //
daveheitzman 0:a9de25fd7c41 78 #define H3LIS331DL_SIM BIT(0) // SPI serial interface mode selection, default is 0
daveheitzman 0:a9de25fd7c41 79
daveheitzman 0:a9de25fd7c41 80 //CONTROL REGISTER 5
daveheitzman 0:a9de25fd7c41 81 #define H3LIS331DL_CTRL_REG5 0x24
daveheitzman 0:a9de25fd7c41 82 #define H3LIS331DL_TURN_ON BIT(0) // Turn-on mode selection selection for sleep to wake function. default is 00
daveheitzman 0:a9de25fd7c41 83
daveheitzman 0:a9de25fd7c41 84 #define H3LIS331DL_HP_FILTER_RESET 0x25 //
daveheitzman 0:a9de25fd7c41 85
daveheitzman 0:a9de25fd7c41 86 //REFERENCE/DATA_CAPTURE
daveheitzman 0:a9de25fd7c41 87 #define H3LIS331DL_REFERENCE_REG 0x26 //
daveheitzman 0:a9de25fd7c41 88 #define H3LIS331DL_REF BIT(0) //
daveheitzman 0:a9de25fd7c41 89
daveheitzman 0:a9de25fd7c41 90 //STATUS_REG_AXIES
daveheitzman 0:a9de25fd7c41 91 #define H3LIS331DL_STATUS_REG 0x27 //
daveheitzman 0:a9de25fd7c41 92
daveheitzman 0:a9de25fd7c41 93 //OUTPUT REGISTER
daveheitzman 0:a9de25fd7c41 94 #define H3LIS331DL_OUT_X_L 0x28 //x-axis acceleration data
daveheitzman 0:a9de25fd7c41 95 #define H3LIS331DL_OUT_X_H 0x29
daveheitzman 0:a9de25fd7c41 96 #define H3LIS331DL_OUT_Y_L 0x2A //y-axis acceleration data
daveheitzman 0:a9de25fd7c41 97 #define H3LIS331DL_OUT_Y_H 0x2B
daveheitzman 0:a9de25fd7c41 98 #define H3LIS331DL_OUT_Z_L 0x2C //z-axis acceleration data
daveheitzman 0:a9de25fd7c41 99 #define H3LIS331DL_OUT_Z_H 0x2D
daveheitzman 0:a9de25fd7c41 100
daveheitzman 0:a9de25fd7c41 101
daveheitzman 0:a9de25fd7c41 102 //INTERRUPT 1 CONFIGURATION
daveheitzman 0:a9de25fd7c41 103 #define H3LIS331DL_INT1_CFG 0x30
daveheitzman 0:a9de25fd7c41 104
daveheitzman 0:a9de25fd7c41 105 //INTERRUPT 2 CONFIGURATION
daveheitzman 0:a9de25fd7c41 106 #define H3LIS331DL_INT2_CFG 0x34
daveheitzman 0:a9de25fd7c41 107 #define H3LIS331DL_ANDOR BIT(7)
daveheitzman 0:a9de25fd7c41 108 #define H3LIS331DL_INT_6D BIT(6)
daveheitzman 0:a9de25fd7c41 109
daveheitzman 0:a9de25fd7c41 110 //INT REGISTERS
daveheitzman 0:a9de25fd7c41 111 #define H3LIS331DL_INT1_THS 0x32
daveheitzman 0:a9de25fd7c41 112 #define H3LIS331DL_INT1_DURATION 0x33
daveheitzman 0:a9de25fd7c41 113 #define H3LIS331DL_INT2_THS 0x36
daveheitzman 0:a9de25fd7c41 114 #define H3LIS331DL_INT2_DURATION 0x37
daveheitzman 0:a9de25fd7c41 115
daveheitzman 0:a9de25fd7c41 116 //INTERRUPT 1 SOURCE REGISTER
daveheitzman 0:a9de25fd7c41 117 #define H3LIS331DL_INT1_SRC 0x31
daveheitzman 0:a9de25fd7c41 118 #define H3LIS331DL_INT2_SRC 0x35
daveheitzman 0:a9de25fd7c41 119
daveheitzman 0:a9de25fd7c41 120 //INT_CFG bit mask
daveheitzman 0:a9de25fd7c41 121 #define H3LIS331DL_INT_AND 0x80
daveheitzman 0:a9de25fd7c41 122 #define H3LIS331DL_INT_OR 0x00
daveheitzman 0:a9de25fd7c41 123 #define H3LIS331DL_INT_ZHIE_ENABLE 0x20
daveheitzman 0:a9de25fd7c41 124 #define H3LIS331DL_INT_ZHIE_DISABLE 0x00
daveheitzman 0:a9de25fd7c41 125 #define H3LIS331DL_INT_ZLIE_ENABLE 0x10
daveheitzman 0:a9de25fd7c41 126 #define H3LIS331DL_INT_ZLIE_DISABLE 0x00
daveheitzman 0:a9de25fd7c41 127 #define H3LIS331DL_INT_YHIE_ENABLE 0x08
daveheitzman 0:a9de25fd7c41 128 #define H3LIS331DL_INT_YHIE_DISABLE 0x00
daveheitzman 0:a9de25fd7c41 129 #define H3LIS331DL_INT_YLIE_ENABLE 0x04
daveheitzman 0:a9de25fd7c41 130 #define H3LIS331DL_INT_YLIE_DISABLE 0x00
daveheitzman 0:a9de25fd7c41 131 #define H3LIS331DL_INT_XHIE_ENABLE 0x02
daveheitzman 0:a9de25fd7c41 132 #define H3LIS331DL_INT_XHIE_DISABLE 0x00
daveheitzman 0:a9de25fd7c41 133 #define H3LIS331DL_INT_XLIE_ENABLE 0x01
daveheitzman 0:a9de25fd7c41 134 #define H3LIS331DL_INT_XLIE_DISABLE 0x00
daveheitzman 0:a9de25fd7c41 135
daveheitzman 0:a9de25fd7c41 136 //INT_SRC bit mask
daveheitzman 0:a9de25fd7c41 137 #define H3LIS331DL_INT_SRC_IA 0x40
daveheitzman 0:a9de25fd7c41 138 #define H3LIS331DL_INT_SRC_ZH 0x20
daveheitzman 0:a9de25fd7c41 139 #define H3LIS331DL_INT_SRC_ZL 0x10
daveheitzman 0:a9de25fd7c41 140 #define H3LIS331DL_INT_SRC_YH 0x08
daveheitzman 0:a9de25fd7c41 141 #define H3LIS331DL_INT_SRC_YL 0x04
daveheitzman 0:a9de25fd7c41 142 #define H3LIS331DL_INT_SRC_XH 0x02
daveheitzman 0:a9de25fd7c41 143 #define H3LIS331DL_INT_SRC_XL 0x01
daveheitzman 0:a9de25fd7c41 144
daveheitzman 0:a9de25fd7c41 145 //STATUS REGISTER bit mask
daveheitzman 0:a9de25fd7c41 146 #define H3LIS331DL_STATUS_REG_ZYXOR 0x80 // 1:new data set has over written the previous one
daveheitzman 0:a9de25fd7c41 147 // 0:no overrun has occurred (default)
daveheitzman 0:a9de25fd7c41 148 #define H3LIS331DL_STATUS_REG_ZOR 0x40 // 0:no overrun has occurred (default)
daveheitzman 0:a9de25fd7c41 149 // 1:new Z-axis data has over written the previous one
daveheitzman 0:a9de25fd7c41 150 #define H3LIS331DL_STATUS_REG_YOR 0x20 // 0:no overrun has occurred (default)
daveheitzman 0:a9de25fd7c41 151 // 1:new Y-axis data has over written the previous one
daveheitzman 0:a9de25fd7c41 152 #define H3LIS331DL_STATUS_REG_XOR 0x10 // 0:no overrun has occurred (default)
daveheitzman 0:a9de25fd7c41 153 // 1:new X-axis data has over written the previous one
daveheitzman 0:a9de25fd7c41 154 #define H3LIS331DL_STATUS_REG_ZYXDA 0x08 // 0:a new set of data is not yet avvious one
daveheitzman 0:a9de25fd7c41 155 // 1:a new set of data is available
daveheitzman 0:a9de25fd7c41 156 #define H3LIS331DL_STATUS_REG_ZDA 0x04 // 0:a new data for the Z-Axis is not availvious one
daveheitzman 0:a9de25fd7c41 157 // 1:a new data for the Z-Axis is available
daveheitzman 0:a9de25fd7c41 158 #define H3LIS331DL_STATUS_REG_YDA 0x02 // 0:a new data for the Y-Axis is not available
daveheitzman 0:a9de25fd7c41 159 // 1:a new data for the Y-Axis is available
daveheitzman 0:a9de25fd7c41 160 #define H3LIS331DL_STATUS_REG_XDA 0x01 // 0:a new data for the X-Axis is not available
daveheitzman 0:a9de25fd7c41 161 // 1:a new data for the X-Axis is available
daveheitzman 0:a9de25fd7c41 162 #define H3LIS331DL_DATAREADY_BIT H3LIS331DL_STATUS_REG_ZYXDA
daveheitzman 0:a9de25fd7c41 163
daveheitzman 0:a9de25fd7c41 164 #define ValBit(VAR,Place) (VAR & (1<<Place))
daveheitzman 0:a9de25fd7c41 165 #define BIT(x) ( (x) )
daveheitzman 0:a9de25fd7c41 166
daveheitzman 0:a9de25fd7c41 167 typedef uint8_t H3LIS331DL_Axis_t;
daveheitzman 0:a9de25fd7c41 168 typedef uint8_t H3LIS331DL_IntConf_t;
daveheitzman 0:a9de25fd7c41 169
daveheitzman 0:a9de25fd7c41 170 //define structure
daveheitzman 0:a9de25fd7c41 171 typedef enum {
daveheitzman 0:a9de25fd7c41 172 MEMS_SUCCESS = 0x01,
daveheitzman 0:a9de25fd7c41 173 MEMS_ERROR = 0x00
daveheitzman 0:a9de25fd7c41 174 } status_t;
daveheitzman 0:a9de25fd7c41 175
daveheitzman 0:a9de25fd7c41 176 typedef enum {
daveheitzman 0:a9de25fd7c41 177 MEMS_ENABLE = 0x01,
daveheitzman 0:a9de25fd7c41 178 MEMS_DISABLE = 0x00
daveheitzman 0:a9de25fd7c41 179 } State_t;
daveheitzman 0:a9de25fd7c41 180
daveheitzman 0:a9de25fd7c41 181 typedef struct {
daveheitzman 0:a9de25fd7c41 182 int16_t AXIS_X;
daveheitzman 0:a9de25fd7c41 183 int16_t AXIS_Y;
daveheitzman 0:a9de25fd7c41 184 int16_t AXIS_Z;
daveheitzman 0:a9de25fd7c41 185 } AxesRaw_t;
daveheitzman 0:a9de25fd7c41 186
daveheitzman 0:a9de25fd7c41 187 typedef enum {
daveheitzman 0:a9de25fd7c41 188 H3LIS331DL_ODR_50Hz = 0x00,
daveheitzman 0:a9de25fd7c41 189 H3LIS331DL_ODR_100Hz = 0x01,
daveheitzman 0:a9de25fd7c41 190 H3LIS331DL_ODR_400Hz = 0x02,
daveheitzman 0:a9de25fd7c41 191 H3LIS331DL_ODR_1000Hz = 0x03
daveheitzman 0:a9de25fd7c41 192 } H3LIS331DL_ODR_t;
daveheitzman 0:a9de25fd7c41 193
daveheitzman 0:a9de25fd7c41 194 typedef enum {
daveheitzman 0:a9de25fd7c41 195 H3LIS331DL_CONTINUOUS_MODE = 0x00,
daveheitzman 0:a9de25fd7c41 196 H3LIS331DL_SINGLE_MODE = 0x01,
daveheitzman 0:a9de25fd7c41 197 H3LIS331DL_SLEEP_MODE = 0x02
daveheitzman 0:a9de25fd7c41 198 } H3LIS331DL_Mode_M_t;
daveheitzman 0:a9de25fd7c41 199
daveheitzman 0:a9de25fd7c41 200 typedef enum {
daveheitzman 0:a9de25fd7c41 201 H3LIS331DL_POWER_DOWN = 0x00,
daveheitzman 0:a9de25fd7c41 202 H3LIS331DL_NORMAL = 0x01,
daveheitzman 0:a9de25fd7c41 203 H3LIS331DL_LOW_POWER_05 = 0x02,
daveheitzman 0:a9de25fd7c41 204 H3LIS331DL_LOW_POWER_1 = 0x03,
daveheitzman 0:a9de25fd7c41 205 H3LIS331DL_LOW_POWER_2 = 0x04,
daveheitzman 0:a9de25fd7c41 206 H3LIS331DL_LOW_POWER_5 = 0x05,
daveheitzman 0:a9de25fd7c41 207 H3LIS331DL_LOW_POWER_10 = 0x06,
daveheitzman 0:a9de25fd7c41 208 } H3LIS331DL_Mode_t;
daveheitzman 0:a9de25fd7c41 209
daveheitzman 0:a9de25fd7c41 210 typedef enum {
daveheitzman 0:a9de25fd7c41 211 H3LIS331DL_HPM_NORMAL_MODE_RES = 0x00,
daveheitzman 0:a9de25fd7c41 212 H3LIS331DL_HPM_REF_SIGNAL = 0x01,
daveheitzman 0:a9de25fd7c41 213 H3LIS331DL_HPM_NORMAL_MODE = 0x02,
daveheitzman 0:a9de25fd7c41 214 } H3LIS331DL_HPFMode_t;
daveheitzman 0:a9de25fd7c41 215
daveheitzman 0:a9de25fd7c41 216 typedef enum {
daveheitzman 0:a9de25fd7c41 217 H3LIS331DL_HPFCF_0 = 0x00,
daveheitzman 0:a9de25fd7c41 218 H3LIS331DL_HPFCF_1 = 0x01,
daveheitzman 0:a9de25fd7c41 219 H3LIS331DL_HPFCF_2 = 0x02,
daveheitzman 0:a9de25fd7c41 220 H3LIS331DL_HPFCF_3 = 0x03,
daveheitzman 0:a9de25fd7c41 221 } H3LIS331DL_HPFCutOffFreq_t;
daveheitzman 0:a9de25fd7c41 222
daveheitzman 0:a9de25fd7c41 223 typedef enum {
daveheitzman 0:a9de25fd7c41 224 H3LIS331DL_INT_SOURCE = 0x00,
daveheitzman 0:a9de25fd7c41 225 H3LIS331DL_INT_1OR2_SOURCE = 0x01,
daveheitzman 0:a9de25fd7c41 226 H3LIS331DL_DATA_READY = 0x02,
daveheitzman 0:a9de25fd7c41 227 H3LIS331DL_BOOT_RUNNING = 0x03
daveheitzman 0:a9de25fd7c41 228 } H3LIS331DL_INT_Conf_t;
daveheitzman 0:a9de25fd7c41 229
daveheitzman 0:a9de25fd7c41 230 typedef enum {
daveheitzman 0:a9de25fd7c41 231 H3LIS331DL_SLEEP_TO_WAKE_DIS = 0x00,
daveheitzman 0:a9de25fd7c41 232 H3LIS331DL_SLEEP_TO_WAKE_ENA = 0x03,
daveheitzman 0:a9de25fd7c41 233 } H3LIS331DL_Sleep_To_Wake_Conf_t;
daveheitzman 0:a9de25fd7c41 234
daveheitzman 0:a9de25fd7c41 235 typedef enum {
daveheitzman 0:a9de25fd7c41 236 H3LIS331DL_FULLSCALE_2 = 0x00,
daveheitzman 0:a9de25fd7c41 237 H3LIS331DL_FULLSCALE_4 = 0x01,
daveheitzman 0:a9de25fd7c41 238 H3LIS331DL_FULLSCALE_8 = 0x03,
daveheitzman 0:a9de25fd7c41 239 } H3LIS331DL_Fullscale_t;
daveheitzman 0:a9de25fd7c41 240
daveheitzman 0:a9de25fd7c41 241 typedef enum {
daveheitzman 0:a9de25fd7c41 242 H3LIS331DL_BLE_LSB = 0x00,
daveheitzman 0:a9de25fd7c41 243 H3LIS331DL_BLE_MSB = 0x01
daveheitzman 0:a9de25fd7c41 244 } H3LIS331DL_Endianess_t;
daveheitzman 0:a9de25fd7c41 245
daveheitzman 0:a9de25fd7c41 246 typedef enum {
daveheitzman 0:a9de25fd7c41 247 H3LIS331DL_SPI_4_WIRE = 0x00,
daveheitzman 0:a9de25fd7c41 248 H3LIS331DL_SPI_3_WIRE = 0x01
daveheitzman 0:a9de25fd7c41 249 } H3LIS331DL_SPIMode_t;
daveheitzman 0:a9de25fd7c41 250
daveheitzman 0:a9de25fd7c41 251 typedef enum {
daveheitzman 0:a9de25fd7c41 252 H3LIS331DL_X_ENABLE = 0x01,
daveheitzman 0:a9de25fd7c41 253 H3LIS331DL_X_DISABLE = 0x00,
daveheitzman 0:a9de25fd7c41 254 H3LIS331DL_Y_ENABLE = 0x02,
daveheitzman 0:a9de25fd7c41 255 H3LIS331DL_Y_DISABLE = 0x00,
daveheitzman 0:a9de25fd7c41 256 H3LIS331DL_Z_ENABLE = 0x04,
daveheitzman 0:a9de25fd7c41 257 H3LIS331DL_Z_DISABLE = 0x00
daveheitzman 0:a9de25fd7c41 258 } H3LIS331DL_AXISenable_t;
daveheitzman 0:a9de25fd7c41 259
daveheitzman 0:a9de25fd7c41 260 typedef enum {
daveheitzman 0:a9de25fd7c41 261 H3LIS331DL_UP_SX = 0x44,
daveheitzman 0:a9de25fd7c41 262 H3LIS331DL_UP_DX = 0x42,
daveheitzman 0:a9de25fd7c41 263 H3LIS331DL_DW_SX = 0x41,
daveheitzman 0:a9de25fd7c41 264 H3LIS331DL_DW_DX = 0x48,
daveheitzman 0:a9de25fd7c41 265 H3LIS331DL_TOP = 0x60,
daveheitzman 0:a9de25fd7c41 266 H3LIS331DL_BOTTOM = 0x50
daveheitzman 0:a9de25fd7c41 267 } H3LIS331DL_POSITION_6D_t;
daveheitzman 0:a9de25fd7c41 268
daveheitzman 0:a9de25fd7c41 269 typedef enum {
daveheitzman 0:a9de25fd7c41 270 H3LIS331DL_INT_MODE_OR = 0x00,
daveheitzman 0:a9de25fd7c41 271 H3LIS331DL_INT_MODE_6D_MOVEMENT = 0x01,
daveheitzman 0:a9de25fd7c41 272 H3LIS331DL_INT_MODE_AND = 0x02,
daveheitzman 0:a9de25fd7c41 273 H3LIS331DL_INT_MODE_6D_POSITION = 0x03
daveheitzman 0:a9de25fd7c41 274 } H3LIS331DL_IntMode_t;
daveheitzman 0:a9de25fd7c41 275
daveheitzman 0:a9de25fd7c41 276
daveheitzman 0:a9de25fd7c41 277 class H3LIS331DL
daveheitzman 0:a9de25fd7c41 278 {
daveheitzman 0:a9de25fd7c41 279 public:
daveheitzman 0:a9de25fd7c41 280 H3LIS331DL(PinName sda, PinName scl){
daveheitzman 0:a9de25fd7c41 281 i2c = new mbed::I2C(sda, scl);
daveheitzman 0:a9de25fd7c41 282 i2c->frequency(100000);
daveheitzman 0:a9de25fd7c41 283 _adjVal[0] = _adjVal[1] = _adjVal[2] = 0;
daveheitzman 0:a9de25fd7c41 284 };
daveheitzman 0:a9de25fd7c41 285 void init(H3LIS331DL_ODR_t odr = H3LIS331DL_ODR_100Hz,
daveheitzman 0:a9de25fd7c41 286 H3LIS331DL_Mode_t mode = H3LIS331DL_NORMAL,H3LIS331DL_Fullscale_t fullScale = H3LIS331DL_FULLSCALE_2);
daveheitzman 0:a9de25fd7c41 287 void importPara(int16_t val_x, int16_t val_y, int16_t val_z);
daveheitzman 0:a9de25fd7c41 288 void readXYZ(int16_t* x, int16_t* y, int16_t* z);
daveheitzman 0:a9de25fd7c41 289 void getAcceleration(float* xyz);
daveheitzman 0:a9de25fd7c41 290 //Sensor Configuration Functions
daveheitzman 0:a9de25fd7c41 291 status_t getWHO_AM_I(uint8_t * val);
daveheitzman 0:a9de25fd7c41 292 status_t setODR(H3LIS331DL_ODR_t dr);
daveheitzman 0:a9de25fd7c41 293 status_t setMode(H3LIS331DL_Mode_t pm);
daveheitzman 0:a9de25fd7c41 294 status_t setAxis(H3LIS331DL_Axis_t axis);
daveheitzman 0:a9de25fd7c41 295 status_t setFullScale(H3LIS331DL_Fullscale_t fs);
daveheitzman 0:a9de25fd7c41 296 status_t setBDU(State_t bdu);
daveheitzman 0:a9de25fd7c41 297 status_t setBLE(H3LIS331DL_Endianess_t ble);
daveheitzman 0:a9de25fd7c41 298 status_t setSelfTest(State_t st);
daveheitzman 0:a9de25fd7c41 299 status_t setSelfTestSign(State_t st_sign);
daveheitzman 0:a9de25fd7c41 300 status_t turnONEnable(H3LIS331DL_Sleep_To_Wake_Conf_t stw);
daveheitzman 0:a9de25fd7c41 301 status_t setBOOT(State_t boot);
daveheitzman 0:a9de25fd7c41 302 status_t setFDS(State_t fds);
daveheitzman 0:a9de25fd7c41 303 status_t setSPI34Wire(H3LIS331DL_SPIMode_t sim);
daveheitzman 0:a9de25fd7c41 304
daveheitzman 0:a9de25fd7c41 305 //Filtering Functions
daveheitzman 0:a9de25fd7c41 306 status_t setHPFMode(H3LIS331DL_HPFMode_t hpm);
daveheitzman 0:a9de25fd7c41 307 status_t setHPFCutOFF(H3LIS331DL_HPFCutOffFreq_t hpf);
daveheitzman 0:a9de25fd7c41 308 status_t setFilterDataSel(State_t state);
daveheitzman 0:a9de25fd7c41 309 status_t setReference(int8_t ref);
daveheitzman 0:a9de25fd7c41 310
daveheitzman 0:a9de25fd7c41 311 //Interrupt Functions
daveheitzman 0:a9de25fd7c41 312 status_t setIntHighLow(State_t hil);
daveheitzman 0:a9de25fd7c41 313 status_t setIntPPOD(State_t pp_od);
daveheitzman 0:a9de25fd7c41 314 status_t setInt1DataSign(H3LIS331DL_INT_Conf_t i_cfg);
daveheitzman 0:a9de25fd7c41 315 status_t setInt2DataSign(H3LIS331DL_INT_Conf_t i_cfg);
daveheitzman 0:a9de25fd7c41 316 status_t setInt1HPEnable(State_t stat);
daveheitzman 0:a9de25fd7c41 317 status_t setInt2HPEnable(State_t stat);
daveheitzman 0:a9de25fd7c41 318 status_t int1LatchEnable(State_t latch);
daveheitzman 0:a9de25fd7c41 319 status_t int2LatchEnable(State_t latch);
daveheitzman 0:a9de25fd7c41 320 status_t resetInt1Latch(void);
daveheitzman 0:a9de25fd7c41 321 status_t resetInt2Latch(void);
daveheitzman 0:a9de25fd7c41 322 status_t setInt1Configuration(H3LIS331DL_IntConf_t ic);
daveheitzman 0:a9de25fd7c41 323 status_t setInt2Configuration(H3LIS331DL_IntConf_t ic);
daveheitzman 0:a9de25fd7c41 324 status_t setInt1Threshold(uint8_t ths);
daveheitzman 0:a9de25fd7c41 325 status_t setInt2Threshold(uint8_t ths);
daveheitzman 0:a9de25fd7c41 326 status_t setInt1Duration(uint8_t id);
daveheitzman 0:a9de25fd7c41 327 status_t setInt2Duration(uint8_t id);
daveheitzman 0:a9de25fd7c41 328 status_t setInt1Mode(H3LIS331DL_IntMode_t int_mode);
daveheitzman 0:a9de25fd7c41 329 status_t setInt2Mode(H3LIS331DL_IntMode_t int_mode);
daveheitzman 0:a9de25fd7c41 330 status_t getInt1Src(uint8_t* val);
daveheitzman 0:a9de25fd7c41 331 status_t getInt2Src(uint8_t* val);
daveheitzman 0:a9de25fd7c41 332 status_t getInt1SrcBit(uint8_t statusBIT, uint8_t* val);
daveheitzman 0:a9de25fd7c41 333 status_t getInt2SrcBit(uint8_t statusBIT, uint8_t* val);
daveheitzman 0:a9de25fd7c41 334
daveheitzman 0:a9de25fd7c41 335 //Other Reading Functions
daveheitzman 0:a9de25fd7c41 336 status_t getStatusReg(uint8_t* val);
daveheitzman 0:a9de25fd7c41 337 status_t getStatusBit(uint8_t statusBIT, uint8_t* val);
daveheitzman 0:a9de25fd7c41 338 status_t getAccAxesRaw(AxesRaw_t* buff);
daveheitzman 0:a9de25fd7c41 339 status_t get6DPositionInt1(uint8_t* val);
daveheitzman 0:a9de25fd7c41 340 status_t get6DPositionInt2(uint8_t* val);
daveheitzman 0:a9de25fd7c41 341
daveheitzman 0:a9de25fd7c41 342 private:
daveheitzman 0:a9de25fd7c41 343 I2C * i2c;
daveheitzman 0:a9de25fd7c41 344 uint8_t readReg(uint8_t deviceAddr, uint8_t Reg, uint8_t* Data);
daveheitzman 0:a9de25fd7c41 345 uint8_t writeReg(uint8_t deviceAddress, uint8_t WriteAddr, uint8_t Data);
daveheitzman 0:a9de25fd7c41 346 int16_t _adjVal[3];
daveheitzman 0:a9de25fd7c41 347 };
daveheitzman 0:a9de25fd7c41 348
daveheitzman 0:a9de25fd7c41 349 #endif /*__H3LIS331DL_H */