Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
board.c
00001 #include "board.h" 00002 #include "fsl_gpio.h" 00003 #include "fsl_clock_config.h" 00004 #include "emwin_support.h" 00005 00006 /* Initialize the LCD_DISP. */ 00007 void BOARD_InitLcd(void) 00008 { 00009 volatile uint32_t i = 0x100U; 00010 00011 gpio_pin_config_t config = { 00012 kGPIO_DigitalOutput, 0, 00013 }; 00014 00015 /* Reset the LCD. */ 00016 GPIO_PinInit(LCD_DISP_GPIO, LCD_DISP_GPIO_PIN, &config); 00017 00018 GPIO_WritePinOutput(LCD_DISP_GPIO, LCD_DISP_GPIO_PIN, 0); 00019 00020 while (i--) 00021 { 00022 } 00023 00024 GPIO_WritePinOutput(LCD_DISP_GPIO, LCD_DISP_GPIO_PIN, 1); 00025 00026 /* Backlight. */ 00027 config.outputLogic = 1; 00028 GPIO_PinInit(LCD_BL_GPIO, LCD_BL_GPIO_PIN, &config); 00029 00030 /*Clock setting for LPI2C*/ 00031 CLOCK_SetMux(kCLOCK_Lpi2cMux, LPI2C_CLOCK_SOURCE_SELECT); 00032 CLOCK_SetDiv(kCLOCK_Lpi2cDiv, LPI2C_CLOCK_SOURCE_DIVIDER); 00033 } 00034 00035 void BOARD_InitLcdifPixelClock(void) 00036 { 00037 /* 00038 * The desired output frame rate is 60Hz. So the pixel clock frequency is: 00039 * (480 + 41 + 4 + 18) * (272 + 10 + 4 + 2) * 60 = 9.2M. 00040 * Here set the LCDIF pixel clock to 9.3M. 00041 */ 00042 00043 /* 00044 * Initialize the Video PLL. 00045 * Video PLL output clock is OSC24M * (loopDivider + (denominator / numerator)) / postDivider = 93MHz. 00046 */ 00047 clock_video_pll_config_t config = { 00048 .loopDivider = 31, .postDivider = 8, .numerator = 0, .denominator = 0, 00049 }; 00050 00051 CLOCK_InitVideoPll(&config); 00052 00053 /* 00054 * 000 derive clock from PLL2 00055 * 001 derive clock from PLL3 PFD3 00056 * 010 derive clock from PLL5 00057 * 011 derive clock from PLL2 PFD0 00058 * 100 derive clock from PLL2 PFD1 00059 * 101 derive clock from PLL3 PFD1 00060 */ 00061 CLOCK_SetMux(kCLOCK_LcdifPreMux, 2); 00062 00063 CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 4); 00064 00065 CLOCK_SetDiv(kCLOCK_LcdifDiv, 1); 00066 }
Generated on Wed Jul 20 2022 15:03:44 by
