Daisuke Kimura / Mbed 2 deprecated Fx0Hackson

Team 6

Dependencies:   HTTPClient PowerControl SNICInterface_mod mbed-rtos mbed

Fork of HTTPClient_WiFi_HelloWorld by KDDI Fx0 hackathon

ADC_full/adc.cpp@10:4f206e833249, 2015-02-15 (annotated)

Committer:
daisukekmr
Date:
Sun Feb 15 04:34:59 2015 +0000
Revision:
10:4f206e833249
add light sensor.; make http get request a function.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
daisukekmr 10:4f206e833249 1 /* mbed Library - ADC
daisukekmr 10:4f206e833249 2 * Copyright (c) 2010, sblandford
daisukekmr 10:4f206e833249 3 * released under MIT license http://mbed.org/licence/mit
daisukekmr 10:4f206e833249 4 */
daisukekmr 10:4f206e833249 5 #include "mbed.h"
daisukekmr 10:4f206e833249 6 #include "adc.h"
daisukekmr 10:4f206e833249 7
daisukekmr 10:4f206e833249 8
daisukekmr 10:4f206e833249 9 ADC *ADC::instance;
daisukekmr 10:4f206e833249 10
daisukekmr 10:4f206e833249 11 ADC::ADC(int sample_rate, int cclk_div)
daisukekmr 10:4f206e833249 12 {
daisukekmr 10:4f206e833249 13
daisukekmr 10:4f206e833249 14 int i, adc_clk_freq, pclk, clock_div, max_div=1;
daisukekmr 10:4f206e833249 15
daisukekmr 10:4f206e833249 16 //Work out CCLK
daisukekmr 10:4f206e833249 17 adc_clk_freq=CLKS_PER_SAMPLE*sample_rate;
daisukekmr 10:4f206e833249 18 int m = (LPC_SC->PLL0CFG & 0xFFFF) + 1;
daisukekmr 10:4f206e833249 19 int n = (LPC_SC->PLL0CFG >> 16) + 1;
daisukekmr 10:4f206e833249 20 int cclkdiv = LPC_SC->CCLKCFG + 1;
daisukekmr 10:4f206e833249 21 int Fcco = (2 * m * XTAL_FREQ) / n;
daisukekmr 10:4f206e833249 22 int cclk = Fcco / cclkdiv;
daisukekmr 10:4f206e833249 23
daisukekmr 10:4f206e833249 24 //Power up the ADC
daisukekmr 10:4f206e833249 25 LPC_SC->PCONP |= (1 << 12);
daisukekmr 10:4f206e833249 26 //Set clock at cclk / 1.
daisukekmr 10:4f206e833249 27 LPC_SC->PCLKSEL0 &= ~(0x3 << 24);
daisukekmr 10:4f206e833249 28 switch (cclk_div) {
daisukekmr 10:4f206e833249 29 case 1:
daisukekmr 10:4f206e833249 30 LPC_SC->PCLKSEL0 |= 0x1 << 24;
daisukekmr 10:4f206e833249 31 break;
daisukekmr 10:4f206e833249 32 case 2:
daisukekmr 10:4f206e833249 33 LPC_SC->PCLKSEL0 |= 0x2 << 24;
daisukekmr 10:4f206e833249 34 break;
daisukekmr 10:4f206e833249 35 case 4:
daisukekmr 10:4f206e833249 36 LPC_SC->PCLKSEL0 |= 0x0 << 24;
daisukekmr 10:4f206e833249 37 break;
daisukekmr 10:4f206e833249 38 case 8:
daisukekmr 10:4f206e833249 39 LPC_SC->PCLKSEL0 |= 0x3 << 24;
daisukekmr 10:4f206e833249 40 break;
daisukekmr 10:4f206e833249 41 default:
daisukekmr 10:4f206e833249 42 fprintf(stderr, "Warning: ADC CCLK clock divider must be 1, 2, 4 or 8. %u supplied.\n",
daisukekmr 10:4f206e833249 43 cclk_div);
daisukekmr 10:4f206e833249 44 fprintf(stderr, "Defaulting to 1.\n");
daisukekmr 10:4f206e833249 45 LPC_SC->PCLKSEL0 |= 0x1 << 24;
daisukekmr 10:4f206e833249 46 break;
daisukekmr 10:4f206e833249 47 }
daisukekmr 10:4f206e833249 48 pclk = cclk / cclk_div;
daisukekmr 10:4f206e833249 49 clock_div=pclk / adc_clk_freq;
daisukekmr 10:4f206e833249 50
daisukekmr 10:4f206e833249 51 if (clock_div > 0xFF) {
daisukekmr 10:4f206e833249 52 fprintf(stderr, "Warning: Clock division is %u which is above 255 limit. Re-Setting at limit.\n",
daisukekmr 10:4f206e833249 53 clock_div);
daisukekmr 10:4f206e833249 54 clock_div=0xFF;
daisukekmr 10:4f206e833249 55 }
daisukekmr 10:4f206e833249 56 if (clock_div == 0) {
daisukekmr 10:4f206e833249 57 fprintf(stderr, "Warning: Clock division is 0. Re-Setting to 1.\n");
daisukekmr 10:4f206e833249 58 clock_div=1;
daisukekmr 10:4f206e833249 59 }
daisukekmr 10:4f206e833249 60
daisukekmr 10:4f206e833249 61 _adc_clk_freq=pclk / clock_div;
daisukekmr 10:4f206e833249 62 if (_adc_clk_freq > MAX_ADC_CLOCK) {
daisukekmr 10:4f206e833249 63 fprintf(stderr, "Warning: Actual ADC sample rate of %u which is above %u limit\n",
daisukekmr 10:4f206e833249 64 _adc_clk_freq / CLKS_PER_SAMPLE, MAX_ADC_CLOCK / CLKS_PER_SAMPLE);
daisukekmr 10:4f206e833249 65 while ((pclk / max_div) > MAX_ADC_CLOCK) max_div++;
daisukekmr 10:4f206e833249 66 fprintf(stderr, "Maximum recommended sample rate is %u\n", (pclk / max_div) / CLKS_PER_SAMPLE);
daisukekmr 10:4f206e833249 67 }
daisukekmr 10:4f206e833249 68
daisukekmr 10:4f206e833249 69 LPC_ADC->ADCR =
daisukekmr 10:4f206e833249 70 ((clock_div - 1 ) << 8 ) | //Clkdiv
daisukekmr 10:4f206e833249 71 ( 1 << 21 ); //A/D operational
daisukekmr 10:4f206e833249 72
daisukekmr 10:4f206e833249 73 //Default no channels enabled
daisukekmr 10:4f206e833249 74 LPC_ADC->ADCR &= ~0xFF;
daisukekmr 10:4f206e833249 75 //Default NULL global custom isr
daisukekmr 10:4f206e833249 76 _adc_g_isr = NULL;
daisukekmr 10:4f206e833249 77 //Initialize arrays
daisukekmr 10:4f206e833249 78 for (i=7; i>=0; i--) {
daisukekmr 10:4f206e833249 79 _adc_data[i] = 0;
daisukekmr 10:4f206e833249 80 _adc_isr[i] = NULL;
daisukekmr 10:4f206e833249 81 }
daisukekmr 10:4f206e833249 82
daisukekmr 10:4f206e833249 83
daisukekmr 10:4f206e833249 84 //* Attach IRQ
daisukekmr 10:4f206e833249 85 instance = this;
daisukekmr 10:4f206e833249 86 NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr);
daisukekmr 10:4f206e833249 87
daisukekmr 10:4f206e833249 88 //Disable global interrupt
daisukekmr 10:4f206e833249 89 LPC_ADC->ADINTEN &= ~0x100;
daisukekmr 10:4f206e833249 90
daisukekmr 10:4f206e833249 91 };
daisukekmr 10:4f206e833249 92
daisukekmr 10:4f206e833249 93 void ADC::_adcisr(void)
daisukekmr 10:4f206e833249 94 {
daisukekmr 10:4f206e833249 95 instance->adcisr();
daisukekmr 10:4f206e833249 96 }
daisukekmr 10:4f206e833249 97
daisukekmr 10:4f206e833249 98
daisukekmr 10:4f206e833249 99 void ADC::adcisr(void)
daisukekmr 10:4f206e833249 100 {
daisukekmr 10:4f206e833249 101 uint32_t stat;
daisukekmr 10:4f206e833249 102 int chan;
daisukekmr 10:4f206e833249 103
daisukekmr 10:4f206e833249 104 // Read status
daisukekmr 10:4f206e833249 105 stat = LPC_ADC->ADSTAT;
daisukekmr 10:4f206e833249 106 //Scan channels for over-run or done and update array
daisukekmr 10:4f206e833249 107 if (stat & 0x0101) _adc_data[0] = LPC_ADC->ADDR0;
daisukekmr 10:4f206e833249 108 if (stat & 0x0202) _adc_data[1] = LPC_ADC->ADDR1;
daisukekmr 10:4f206e833249 109 if (stat & 0x0404) _adc_data[2] = LPC_ADC->ADDR2;
daisukekmr 10:4f206e833249 110 if (stat & 0x0808) _adc_data[3] = LPC_ADC->ADDR3;
daisukekmr 10:4f206e833249 111 if (stat & 0x1010) _adc_data[4] = LPC_ADC->ADDR4;
daisukekmr 10:4f206e833249 112 if (stat & 0x2020) _adc_data[5] = LPC_ADC->ADDR5;
daisukekmr 10:4f206e833249 113 if (stat & 0x4040) _adc_data[6] = LPC_ADC->ADDR6;
daisukekmr 10:4f206e833249 114 if (stat & 0x8080) _adc_data[7] = LPC_ADC->ADDR7;
daisukekmr 10:4f206e833249 115
daisukekmr 10:4f206e833249 116 // Channel that triggered interrupt
daisukekmr 10:4f206e833249 117 chan = (LPC_ADC->ADGDR >> 24) & 0x07;
daisukekmr 10:4f206e833249 118 //User defined interrupt handlers
daisukekmr 10:4f206e833249 119 if (_adc_isr[chan] != NULL)
daisukekmr 10:4f206e833249 120 _adc_isr[chan](_adc_data[chan]);
daisukekmr 10:4f206e833249 121 if (_adc_g_isr != NULL)
daisukekmr 10:4f206e833249 122 _adc_g_isr(chan, _adc_data[chan]);
daisukekmr 10:4f206e833249 123 return;
daisukekmr 10:4f206e833249 124 }
daisukekmr 10:4f206e833249 125
daisukekmr 10:4f206e833249 126 int ADC::_pin_to_channel(PinName pin) {
daisukekmr 10:4f206e833249 127 int chan;
daisukekmr 10:4f206e833249 128 switch (pin) {
daisukekmr 10:4f206e833249 129 case p15://=p0.23 of LPC1768
daisukekmr 10:4f206e833249 130 default:
daisukekmr 10:4f206e833249 131 chan=0;
daisukekmr 10:4f206e833249 132 break;
daisukekmr 10:4f206e833249 133 case p16://=p0.24 of LPC1768
daisukekmr 10:4f206e833249 134 chan=1;
daisukekmr 10:4f206e833249 135 break;
daisukekmr 10:4f206e833249 136 case p17://=p0.25 of LPC1768
daisukekmr 10:4f206e833249 137 chan=2;
daisukekmr 10:4f206e833249 138 break;
daisukekmr 10:4f206e833249 139 case p18://=p0.26 of LPC1768
daisukekmr 10:4f206e833249 140 chan=3;
daisukekmr 10:4f206e833249 141 break;
daisukekmr 10:4f206e833249 142 case p19://=p1.30 of LPC1768
daisukekmr 10:4f206e833249 143 chan=4;
daisukekmr 10:4f206e833249 144 break;
daisukekmr 10:4f206e833249 145 case p20://=p1.31 of LPC1768
daisukekmr 10:4f206e833249 146 chan=5;
daisukekmr 10:4f206e833249 147 break;
daisukekmr 10:4f206e833249 148 }
daisukekmr 10:4f206e833249 149 return(chan);
daisukekmr 10:4f206e833249 150 }
daisukekmr 10:4f206e833249 151
daisukekmr 10:4f206e833249 152 PinName ADC::channel_to_pin(int chan) {
daisukekmr 10:4f206e833249 153 const PinName pin[8]={p15, p16, p17, p18, p19, p20, p15, p15};
daisukekmr 10:4f206e833249 154
daisukekmr 10:4f206e833249 155 if ((chan < 0) || (chan > 5))
daisukekmr 10:4f206e833249 156 fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan);
daisukekmr 10:4f206e833249 157 return(pin[chan & 0x07]);
daisukekmr 10:4f206e833249 158 }
daisukekmr 10:4f206e833249 159
daisukekmr 10:4f206e833249 160
daisukekmr 10:4f206e833249 161 int ADC::channel_to_pin_number(int chan) {
daisukekmr 10:4f206e833249 162 const int pin[8]={15, 16, 17, 18, 19, 20, 0, 0};
daisukekmr 10:4f206e833249 163
daisukekmr 10:4f206e833249 164 if ((chan < 0) || (chan > 5))
daisukekmr 10:4f206e833249 165 fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan);
daisukekmr 10:4f206e833249 166 return(pin[chan & 0x07]);
daisukekmr 10:4f206e833249 167 }
daisukekmr 10:4f206e833249 168
daisukekmr 10:4f206e833249 169
daisukekmr 10:4f206e833249 170 uint32_t ADC::_data_of_pin(PinName pin) {
daisukekmr 10:4f206e833249 171 //If in burst mode and at least one interrupt enabled then
daisukekmr 10:4f206e833249 172 //take all values from _adc_data
daisukekmr 10:4f206e833249 173 if (burst() && (LPC_ADC->ADINTEN & 0x3F)) {
daisukekmr 10:4f206e833249 174 return(_adc_data[_pin_to_channel(pin)]);
daisukekmr 10:4f206e833249 175 } else {
daisukekmr 10:4f206e833249 176 //Return current register value or last value from interrupt
daisukekmr 10:4f206e833249 177 switch (pin) {
daisukekmr 10:4f206e833249 178 case p15://=p0.23 of LPC1768
daisukekmr 10:4f206e833249 179 default:
daisukekmr 10:4f206e833249 180 return(LPC_ADC->ADINTEN & 0x01?_adc_data[0]:LPC_ADC->ADDR0);
daisukekmr 10:4f206e833249 181 case p16://=p0.24 of LPC1768
daisukekmr 10:4f206e833249 182 return(LPC_ADC->ADINTEN & 0x02?_adc_data[1]:LPC_ADC->ADDR1);
daisukekmr 10:4f206e833249 183 case p17://=p0.25 of LPC1768
daisukekmr 10:4f206e833249 184 return(LPC_ADC->ADINTEN & 0x04?_adc_data[2]:LPC_ADC->ADDR2);
daisukekmr 10:4f206e833249 185 case p18://=p0.26 of LPC1768:
daisukekmr 10:4f206e833249 186 return(LPC_ADC->ADINTEN & 0x08?_adc_data[3]:LPC_ADC->ADDR3);
daisukekmr 10:4f206e833249 187 case p19://=p1.30 of LPC1768
daisukekmr 10:4f206e833249 188 return(LPC_ADC->ADINTEN & 0x10?_adc_data[4]:LPC_ADC->ADDR4);
daisukekmr 10:4f206e833249 189 case p20://=p1.31 of LPC1768
daisukekmr 10:4f206e833249 190 return(LPC_ADC->ADINTEN & 0x20?_adc_data[5]:LPC_ADC->ADDR5);
daisukekmr 10:4f206e833249 191 }
daisukekmr 10:4f206e833249 192 }
daisukekmr 10:4f206e833249 193 }
daisukekmr 10:4f206e833249 194
daisukekmr 10:4f206e833249 195 //Enable or disable an ADC pin
daisukekmr 10:4f206e833249 196 void ADC::setup(PinName pin, int state) {
daisukekmr 10:4f206e833249 197 int chan;
daisukekmr 10:4f206e833249 198 chan=_pin_to_channel(pin);
daisukekmr 10:4f206e833249 199 if ((state & 1) == 1) {
daisukekmr 10:4f206e833249 200 switch(pin) {
daisukekmr 10:4f206e833249 201 case p15://=p0.23 of LPC1768
daisukekmr 10:4f206e833249 202 default:
daisukekmr 10:4f206e833249 203 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14);
daisukekmr 10:4f206e833249 204 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 14;
daisukekmr 10:4f206e833249 205 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14);
daisukekmr 10:4f206e833249 206 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 14;
daisukekmr 10:4f206e833249 207 break;
daisukekmr 10:4f206e833249 208 case p16://=p0.24 of LPC1768
daisukekmr 10:4f206e833249 209 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16);
daisukekmr 10:4f206e833249 210 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 16;
daisukekmr 10:4f206e833249 211 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16);
daisukekmr 10:4f206e833249 212 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 16;
daisukekmr 10:4f206e833249 213 break;
daisukekmr 10:4f206e833249 214 case p17://=p0.25 of LPC1768
daisukekmr 10:4f206e833249 215 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18);
daisukekmr 10:4f206e833249 216 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 18;
daisukekmr 10:4f206e833249 217 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18);
daisukekmr 10:4f206e833249 218 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 18;
daisukekmr 10:4f206e833249 219 break;
daisukekmr 10:4f206e833249 220 case p18://=p0.26 of LPC1768:
daisukekmr 10:4f206e833249 221 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20);
daisukekmr 10:4f206e833249 222 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 20;
daisukekmr 10:4f206e833249 223 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20);
daisukekmr 10:4f206e833249 224 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 20;
daisukekmr 10:4f206e833249 225 break;
daisukekmr 10:4f206e833249 226 case p19://=p1.30 of LPC1768
daisukekmr 10:4f206e833249 227 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28);
daisukekmr 10:4f206e833249 228 LPC_PINCON->PINSEL3 |= (unsigned int)0x3 << 28;
daisukekmr 10:4f206e833249 229 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28);
daisukekmr 10:4f206e833249 230 LPC_PINCON->PINMODE3 |= (unsigned int)0x2 << 28;
daisukekmr 10:4f206e833249 231 break;
daisukekmr 10:4f206e833249 232 case p20://=p1.31 of LPC1768
daisukekmr 10:4f206e833249 233 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30);
daisukekmr 10:4f206e833249 234 LPC_PINCON->PINSEL3 |= (unsigned int)0x3 << 30;
daisukekmr 10:4f206e833249 235 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30);
daisukekmr 10:4f206e833249 236 LPC_PINCON->PINMODE3 |= (unsigned int)0x2 << 30;
daisukekmr 10:4f206e833249 237 break;
daisukekmr 10:4f206e833249 238 }
daisukekmr 10:4f206e833249 239 //Only one channel can be selected at a time if not in burst mode
daisukekmr 10:4f206e833249 240 if (!burst()) LPC_ADC->ADCR &= ~0xFF;
daisukekmr 10:4f206e833249 241 //Select channel
daisukekmr 10:4f206e833249 242 LPC_ADC->ADCR |= (1 << chan);
daisukekmr 10:4f206e833249 243 }
daisukekmr 10:4f206e833249 244 else {
daisukekmr 10:4f206e833249 245 switch(pin) {
daisukekmr 10:4f206e833249 246 case p15://=p0.23 of LPC1768
daisukekmr 10:4f206e833249 247 default:
daisukekmr 10:4f206e833249 248 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14);
daisukekmr 10:4f206e833249 249 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14);
daisukekmr 10:4f206e833249 250 break;
daisukekmr 10:4f206e833249 251 case p16://=p0.24 of LPC1768
daisukekmr 10:4f206e833249 252 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16);
daisukekmr 10:4f206e833249 253 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16);
daisukekmr 10:4f206e833249 254 break;
daisukekmr 10:4f206e833249 255 case p17://=p0.25 of LPC1768
daisukekmr 10:4f206e833249 256 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18);
daisukekmr 10:4f206e833249 257 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18);
daisukekmr 10:4f206e833249 258 break;
daisukekmr 10:4f206e833249 259 case p18://=p0.26 of LPC1768:
daisukekmr 10:4f206e833249 260 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20);
daisukekmr 10:4f206e833249 261 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20);
daisukekmr 10:4f206e833249 262 break;
daisukekmr 10:4f206e833249 263 case p19://=p1.30 of LPC1768
daisukekmr 10:4f206e833249 264 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28);
daisukekmr 10:4f206e833249 265 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28);
daisukekmr 10:4f206e833249 266 break;
daisukekmr 10:4f206e833249 267 case p20://=p1.31 of LPC1768
daisukekmr 10:4f206e833249 268 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30);
daisukekmr 10:4f206e833249 269 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30);
daisukekmr 10:4f206e833249 270 break;
daisukekmr 10:4f206e833249 271 }
daisukekmr 10:4f206e833249 272 LPC_ADC->ADCR &= ~(1 << chan);
daisukekmr 10:4f206e833249 273 }
daisukekmr 10:4f206e833249 274 }
daisukekmr 10:4f206e833249 275 //Return channel enabled/disabled state
daisukekmr 10:4f206e833249 276 int ADC::setup(PinName pin) {
daisukekmr 10:4f206e833249 277 int chan;
daisukekmr 10:4f206e833249 278
daisukekmr 10:4f206e833249 279 chan = _pin_to_channel(pin);
daisukekmr 10:4f206e833249 280 return((LPC_ADC->ADCR & (1 << chan)) >> chan);
daisukekmr 10:4f206e833249 281 }
daisukekmr 10:4f206e833249 282
daisukekmr 10:4f206e833249 283 //Select channel already setup
daisukekmr 10:4f206e833249 284 void ADC::select(PinName pin) {
daisukekmr 10:4f206e833249 285 int chan;
daisukekmr 10:4f206e833249 286
daisukekmr 10:4f206e833249 287 //Only one channel can be selected at a time if not in burst mode
daisukekmr 10:4f206e833249 288 if (!burst()) LPC_ADC->ADCR &= ~0xFF;
daisukekmr 10:4f206e833249 289 //Select channel
daisukekmr 10:4f206e833249 290 chan = _pin_to_channel(pin);
daisukekmr 10:4f206e833249 291 LPC_ADC->ADCR |= (1 << chan);
daisukekmr 10:4f206e833249 292 }
daisukekmr 10:4f206e833249 293
daisukekmr 10:4f206e833249 294 //Enable or disable burst mode
daisukekmr 10:4f206e833249 295 void ADC::burst(int state) {
daisukekmr 10:4f206e833249 296 if ((state & 1) == 1) {
daisukekmr 10:4f206e833249 297 if (startmode(0) != 0)
daisukekmr 10:4f206e833249 298 fprintf(stderr, "Warning. startmode is %u. Must be 0 for burst mode.\n", startmode(0));
daisukekmr 10:4f206e833249 299 LPC_ADC->ADCR |= (1 << 16);
daisukekmr 10:4f206e833249 300 }
daisukekmr 10:4f206e833249 301 else
daisukekmr 10:4f206e833249 302 LPC_ADC->ADCR &= ~(1 << 16);
daisukekmr 10:4f206e833249 303 }
daisukekmr 10:4f206e833249 304 //Return burst mode state
daisukekmr 10:4f206e833249 305 int ADC::burst(void) {
daisukekmr 10:4f206e833249 306 return((LPC_ADC->ADCR & (1 << 16)) >> 16);
daisukekmr 10:4f206e833249 307 }
daisukekmr 10:4f206e833249 308
daisukekmr 10:4f206e833249 309 //Set startmode and edge
daisukekmr 10:4f206e833249 310 void ADC::startmode(int mode, int edge) {
daisukekmr 10:4f206e833249 311 int lpc_adc_temp;
daisukekmr 10:4f206e833249 312
daisukekmr 10:4f206e833249 313 //Reset start mode and edge bit,
daisukekmr 10:4f206e833249 314 lpc_adc_temp = LPC_ADC->ADCR & ~(0x0F << 24);
daisukekmr 10:4f206e833249 315 //Write with new values
daisukekmr 10:4f206e833249 316 lpc_adc_temp |= ((mode & 7) << 24) | ((edge & 1) << 27);
daisukekmr 10:4f206e833249 317 LPC_ADC->ADCR = lpc_adc_temp;
daisukekmr 10:4f206e833249 318 }
daisukekmr 10:4f206e833249 319
daisukekmr 10:4f206e833249 320 //Return startmode state according to mode_edge=0: mode and mode_edge=1: edge
daisukekmr 10:4f206e833249 321 int ADC::startmode(int mode_edge){
daisukekmr 10:4f206e833249 322 switch (mode_edge) {
daisukekmr 10:4f206e833249 323 case 0:
daisukekmr 10:4f206e833249 324 default:
daisukekmr 10:4f206e833249 325 return((LPC_ADC->ADCR >> 24) & 0x07);
daisukekmr 10:4f206e833249 326 case 1:
daisukekmr 10:4f206e833249 327 return((LPC_ADC->ADCR >> 27) & 0x01);
daisukekmr 10:4f206e833249 328 }
daisukekmr 10:4f206e833249 329 }
daisukekmr 10:4f206e833249 330
daisukekmr 10:4f206e833249 331 //Start ADC conversion
daisukekmr 10:4f206e833249 332 void ADC::start(void) {
daisukekmr 10:4f206e833249 333 startmode(1,0);
daisukekmr 10:4f206e833249 334 }
daisukekmr 10:4f206e833249 335
daisukekmr 10:4f206e833249 336
daisukekmr 10:4f206e833249 337 //Set interrupt enable/disable for pin to state
daisukekmr 10:4f206e833249 338 void ADC::interrupt_state(PinName pin, int state) {
daisukekmr 10:4f206e833249 339 int chan;
daisukekmr 10:4f206e833249 340
daisukekmr 10:4f206e833249 341 chan = _pin_to_channel(pin);
daisukekmr 10:4f206e833249 342 if (state == 1) {
daisukekmr 10:4f206e833249 343 LPC_ADC->ADINTEN &= ~0x100;
daisukekmr 10:4f206e833249 344 LPC_ADC->ADINTEN |= 1 << chan;
daisukekmr 10:4f206e833249 345 /* Enable the ADC Interrupt */
daisukekmr 10:4f206e833249 346 NVIC_EnableIRQ(ADC_IRQn);
daisukekmr 10:4f206e833249 347 } else {
daisukekmr 10:4f206e833249 348 LPC_ADC->ADINTEN &= ~( 1 << chan );
daisukekmr 10:4f206e833249 349 //Disable interrrupt if no active pins left
daisukekmr 10:4f206e833249 350 if ((LPC_ADC->ADINTEN & 0xFF) == 0)
daisukekmr 10:4f206e833249 351 NVIC_DisableIRQ(ADC_IRQn);
daisukekmr 10:4f206e833249 352 }
daisukekmr 10:4f206e833249 353 }
daisukekmr 10:4f206e833249 354
daisukekmr 10:4f206e833249 355 //Return enable/disable state of interrupt for pin
daisukekmr 10:4f206e833249 356 int ADC::interrupt_state(PinName pin) {
daisukekmr 10:4f206e833249 357 int chan;
daisukekmr 10:4f206e833249 358
daisukekmr 10:4f206e833249 359 chan = _pin_to_channel(pin);
daisukekmr 10:4f206e833249 360 return((LPC_ADC->ADINTEN >> chan) & 0x01);
daisukekmr 10:4f206e833249 361 }
daisukekmr 10:4f206e833249 362
daisukekmr 10:4f206e833249 363
daisukekmr 10:4f206e833249 364 //Attach custom interrupt handler replacing default
daisukekmr 10:4f206e833249 365 void ADC::attach(void(*fptr)(void)) {
daisukekmr 10:4f206e833249 366 //* Attach IRQ
daisukekmr 10:4f206e833249 367 NVIC_SetVector(ADC_IRQn, (uint32_t)fptr);
daisukekmr 10:4f206e833249 368 }
daisukekmr 10:4f206e833249 369
daisukekmr 10:4f206e833249 370 //Restore default interrupt handler
daisukekmr 10:4f206e833249 371 void ADC::detach(void) {
daisukekmr 10:4f206e833249 372 //* Attach IRQ
daisukekmr 10:4f206e833249 373 instance = this;
daisukekmr 10:4f206e833249 374 NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr);
daisukekmr 10:4f206e833249 375 }
daisukekmr 10:4f206e833249 376
daisukekmr 10:4f206e833249 377
daisukekmr 10:4f206e833249 378 //Append interrupt handler for pin to function isr
daisukekmr 10:4f206e833249 379 void ADC::append(PinName pin, void(*fptr)(uint32_t value)) {
daisukekmr 10:4f206e833249 380 int chan;
daisukekmr 10:4f206e833249 381
daisukekmr 10:4f206e833249 382 chan = _pin_to_channel(pin);
daisukekmr 10:4f206e833249 383 _adc_isr[chan] = fptr;
daisukekmr 10:4f206e833249 384 }
daisukekmr 10:4f206e833249 385
daisukekmr 10:4f206e833249 386 //Append interrupt handler for pin to function isr
daisukekmr 10:4f206e833249 387 void ADC::unappend(PinName pin) {
daisukekmr 10:4f206e833249 388 int chan;
daisukekmr 10:4f206e833249 389
daisukekmr 10:4f206e833249 390 chan = _pin_to_channel(pin);
daisukekmr 10:4f206e833249 391 _adc_isr[chan] = NULL;
daisukekmr 10:4f206e833249 392 }
daisukekmr 10:4f206e833249 393
daisukekmr 10:4f206e833249 394 //Unappend global interrupt handler to function isr
daisukekmr 10:4f206e833249 395 void ADC::append(void(*fptr)(int chan, uint32_t value)) {
daisukekmr 10:4f206e833249 396 _adc_g_isr = fptr;
daisukekmr 10:4f206e833249 397 }
daisukekmr 10:4f206e833249 398
daisukekmr 10:4f206e833249 399 //Detach global interrupt handler to function isr
daisukekmr 10:4f206e833249 400 void ADC::unappend() {
daisukekmr 10:4f206e833249 401 _adc_g_isr = NULL;
daisukekmr 10:4f206e833249 402 }
daisukekmr 10:4f206e833249 403
daisukekmr 10:4f206e833249 404 //Set ADC offset
daisukekmr 10:4f206e833249 405 void offset(int offset) {
daisukekmr 10:4f206e833249 406 LPC_ADC->ADTRM &= ~(0x07 << 4);
daisukekmr 10:4f206e833249 407 LPC_ADC->ADTRM |= (offset & 0x07) << 4;
daisukekmr 10:4f206e833249 408 }
daisukekmr 10:4f206e833249 409
daisukekmr 10:4f206e833249 410 //Return current ADC offset
daisukekmr 10:4f206e833249 411 int offset(void) {
daisukekmr 10:4f206e833249 412 return((LPC_ADC->ADTRM >> 4) & 0x07);
daisukekmr 10:4f206e833249 413 }
daisukekmr 10:4f206e833249 414
daisukekmr 10:4f206e833249 415 //Return value of ADC on pin
daisukekmr 10:4f206e833249 416 int ADC::read(PinName pin) {
daisukekmr 10:4f206e833249 417 //Reset DONE and OVERRUN flags of interrupt handled ADC data
daisukekmr 10:4f206e833249 418 _adc_data[_pin_to_channel(pin)] &= ~(((uint32_t)0x01 << 31) | ((uint32_t)0x01 << 30));
daisukekmr 10:4f206e833249 419 //Return value
daisukekmr 10:4f206e833249 420 return((_data_of_pin(pin) >> 4) & 0xFFF);
daisukekmr 10:4f206e833249 421 }
daisukekmr 10:4f206e833249 422
daisukekmr 10:4f206e833249 423 //Return DONE flag of ADC on pin
daisukekmr 10:4f206e833249 424 int ADC::done(PinName pin) {
daisukekmr 10:4f206e833249 425 return((_data_of_pin(pin) >> 31) & 0x01);
daisukekmr 10:4f206e833249 426 }
daisukekmr 10:4f206e833249 427
daisukekmr 10:4f206e833249 428 //Return OVERRUN flag of ADC on pin
daisukekmr 10:4f206e833249 429 int ADC::overrun(PinName pin) {
daisukekmr 10:4f206e833249 430 return((_data_of_pin(pin) >> 30) & 0x01);
daisukekmr 10:4f206e833249 431 }
daisukekmr 10:4f206e833249 432
daisukekmr 10:4f206e833249 433 int ADC::actual_adc_clock(void) {
daisukekmr 10:4f206e833249 434 return(_adc_clk_freq);
daisukekmr 10:4f206e833249 435 }
daisukekmr 10:4f206e833249 436
daisukekmr 10:4f206e833249 437 int ADC::actual_sample_rate(void) {
daisukekmr 10:4f206e833249 438 return(_adc_clk_freq / CLKS_PER_SAMPLE);
daisukekmr 10:4f206e833249 439 }