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A7105.h
00001 #ifndef _A7105_TX_RX_H 00002 #define _A7105_TX_RX_H 00003 00004 #define _WRITE(a) ((a) & ~0x40) 00005 #define _READ(a) ((a) | 0x40) 00006 00007 /** 00008 * TXRX state 00009 */ 00010 enum TXRX_State { 00011 TXRX_OFF, 00012 TX_EN, 00013 RX_EN, 00014 }; 00015 00016 /** 00017 * A7105 states for strobe 00018 */ 00019 enum A7105_State { 00020 A7105_SLEEP = 0x80, 00021 A7105_IDLE = 0x90, 00022 A7105_STANDBY = 0xA0, 00023 A7105_PLL = 0xB0, 00024 A7105_RX = 0xC0, 00025 A7105_TX = 0xD0, 00026 A7105_RST_WRPTR = 0xE0, 00027 A7105_RST_RDPTR = 0xF0, 00028 }; 00029 00030 /** 00031 * Register addresses 00032 */ 00033 enum { 00034 A7105_00_MODE = 0x00, 00035 A7105_01_MODE_CONTROL = 0x01, 00036 A7105_02_CALC = 0x02, 00037 A7105_03_FIFOI = 0x03, 00038 A7105_04_FIFOII = 0x04, 00039 A7105_05_FIFO_DATA = 0x05, 00040 A7105_06_ID_DATA = 0x06, 00041 A7105_07_RC_OSC_I = 0x07, 00042 A7105_08_RC_OSC_II = 0x08, 00043 A7105_09_RC_OSC_III = 0x09, 00044 A7105_0A_CK0_PIN = 0x0A, 00045 A7105_0B_GPIO1_PIN_I = 0x0B, 00046 A7105_0C_GPIO2_PIN_II = 0x0C, 00047 A7105_0D_CLOCK = 0x0D, 00048 A7105_0E_DATA_RATE = 0x0E, 00049 A7105_0F_PLL_I = 0x0F, 00050 A7105_10_PLL_II = 0x10, 00051 A7105_11_PLL_III = 0x11, 00052 A7105_12_PLL_IV = 0x12, 00053 A7105_13_PLL_V = 0x13, 00054 A7105_14_TX_I = 0x14, 00055 A7105_15_TX_II = 0x15, 00056 A7105_16_DELAY_I = 0x16, 00057 A7105_17_DELAY_II = 0x17, 00058 A7105_18_RX = 0x18, 00059 A7105_19_RX_GAIN_I = 0x19, 00060 A7105_1A_RX_GAIN_II = 0x1A, 00061 A7105_1B_RX_GAIN_III = 0x1B, 00062 A7105_1C_RX_GAIN_IV = 0x1C, 00063 A7105_1D_RSSI_THOLD = 0x1D, 00064 A7105_1E_ADC = 0x1E, 00065 A7105_1F_CODE_I = 0x1F, 00066 A7105_20_CODE_II = 0x20, 00067 A7105_21_CODE_III = 0x21, 00068 A7105_22_IF_CALIB_I = 0x22, 00069 A7105_23_IF_CALIB_II = 0x23, 00070 A7105_24_VCO_CURCAL = 0x24, 00071 A7105_25_VCO_SBCAL_I = 0x25, 00072 A7105_26_VCO_SBCAL_II = 0x26, 00073 A7105_27_BATTERY_DET = 0x27, 00074 A7105_28_TX_TEST = 0x28, 00075 A7105_29_RX_DEM_TEST_I = 0x29, 00076 A7105_2A_RX_DEM_TEST_II = 0x2A, 00077 A7105_2B_CPC = 0x2B, 00078 A7105_2C_XTAL_TEST = 0x2C, 00079 A7105_2D_PLL_TEST = 0x2D, 00080 A7105_2E_VCO_TEST_I = 0x2E, 00081 A7105_2F_VCO_TEST_II = 0x2F, 00082 A7105_30_IFAT = 0x30, 00083 A7105_31_RSCALE = 0x31, 00084 A7105_32_FILTER_TEST = 0x32, 00085 }; 00086 #define A7105_0F_CHANNEL A7105_0F_PLL_I 00087 00088 enum A7105_MASK { 00089 A7105_MASK_FBCF = 1 << 4, 00090 A7105_MASK_VBCF = 1 << 3, 00091 }; 00092 00093 /** 00094 * Class for interfacing with the AMICCOM A7105 2.4G FSK/GFSK Transceiver 00095 * 00096 * See the A7105 datasheet for complete documentation on this part 00097 * http://www.avantcom.com.tw/AVANTCOM/TC/DATA/PRODUCT/SOLVE/18_3.pdf 00098 * 00099 * 00100 * Example: 00101 * @code 00102 * #include "mbed.h" 00103 * #include "A7105.h" 00104 * 00105 * #define A7105_SPI_FREQUENCY 10000000 // 10MHz 00106 * 00107 * A7105 txrx(D4, D5, D3, D6, A7105_SPI_FREQUENCY); 00108 * 00109 * int main() { 00110 * // reset 00111 * ret = txrx.reset(); 00112 * // use GPIO1 as miso 00113 * ret = txrx.writeRegister(A7105_0B_GPIO1_PIN_I, 0x19); 00114 * // set various radio options 00115 * ret = txrx.writeRegister(A7105_01_MODE_CONTROL, 0x63); 00116 * // set packet length (FIFO end pointer) to 0x0f + 1 == 16 00117 * ret = txrx.writeRegister(A7105_03_FIFOI, 0x0f); 00118 * // select crystal oscillator and system clock divider of 1/2 00119 * ret = txrx.writeRegister(A7105_0D_CLOCK, 0x05); 00120 * 00121 * // sanity check 00122 * ret = txrx.readRegister(A7105_0D_CLOCK); 00123 * if (ret != 0x05) { 00124 * // do something :) 00125 * } 00126 * } 00127 * @endcode 00128 */ 00129 class A7105 { 00130 public: 00131 /** 00132 * @param mosi Pin used to transmit data to the slave 00133 * @param miso Pin used to receive data from the slave 00134 * @param clk Pin used for the clock 00135 * @param cs Pin used for the chip select 00136 * @param freqHz Frequency used to clock data in and out 00137 */ 00138 A7105 (PinName mosi, PinName miso, PinName clk, PinName cs, uint32_t freqHz); 00139 ~A7105(); 00140 00141 /** 00142 * Writes a value to the given register 00143 * 00144 * @param regAddr Address of the register to write to 00145 * @param value Value to write into the register 00146 * @return Value returned from slave when writing the register 00147 */ 00148 uint8_t writeRegister(uint8_t regAddr, uint8_t value); 00149 00150 /** 00151 * Reads a value from the given register 00152 * 00153 * @param regAddr Address of the register to read 00154 * @return The value of the register 00155 */ 00156 uint8_t readRegister(uint8_t regAddr); 00157 00158 /** 00159 * Sends a strobe command to the A7105 00160 * 00161 * @param state Strobe command state 00162 */ 00163 uint8_t strobe(enum A7105_State state); 00164 00165 /** 00166 * Send a packet of data to the A7105 00167 * 00168 * @param data Byte array to send 00169 * @param len Length of the byte array 00170 * @param channel Channel to transmit data on 00171 */ 00172 void writeData(uint8_t* data, size_t len, uint8_t channel); 00173 00174 /** 00175 * Read a packet of date from the A7105 00176 * 00177 * @param buffer Byte array to hold the incoming data 00178 * @param len Length of the buffer, number of bytes to read in 00179 */ 00180 void readData(uint8_t* buffer, size_t len); 00181 00182 /** 00183 * Set the A7105's ID 00184 * 00185 * @param id 32-bit identifier 00186 */ 00187 void setId(uint32_t id); 00188 00189 /** 00190 * Set the TX power 00191 * 00192 * @param power Output power in dBm 00193 */ 00194 void setPower(int32_t power); 00195 00196 /** 00197 * Sets the TxRx mode 00198 * 00199 * @aparam mode TxRx mode 00200 */ 00201 void setTxRxMode(enum TXRX_State mode); 00202 00203 /** 00204 * Resets the A7105, putting it into standby mode. 00205 */ 00206 int8_t reset(); 00207 00208 private: 00209 SPI _spi; 00210 DigitalOut _cs; 00211 00212 inline void assertChipSelect() { _cs = 0; wait_us(1); } 00213 inline void deassertChipSelect() { wait_us(1); _cs = 1; } 00214 }; 00215 00216 #endif // #ifndef _A7105_TX_RX_H
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