spi_master_asynch.cpp

00001 /* mbed Microcontroller Library
00002  * Copyright (c) 2015 ARM Limited
00003  *
00004  * Licensed under the Apache License, Version 2.0 (the "License");
00005  * you may not use this file except in compliance with the License.
00006  * You may obtain a copy of the License at
00007  *
00008  *     http://www.apache.org/licenses/LICENSE-2.0
00009  *
00010  * Unless required by applicable law or agreed to in writing, software
00011  * distributed under the License is distributed on an "AS IS" BASIS,
00012  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00013  * See the License for the specific language governing permissions and
00014  * limitations under the License.
00015  */
00016 #include <stdio.h>
00017 #include "TestHarness.h"
00018 #include "mbed.h"
00019 
00020 #if !DEVICE_SPI || !DEVICE_SPI_ASYNCH
00021 #error spi_master_asynch requires asynch SPI
00022 #endif
00023 
00024 
00025 #define SHORT_XFR 3
00026 #define LONG_XFR 16
00027 #define TEST_BYTE0 0x00
00028 #define TEST_BYTE1 0x11
00029 #define TEST_BYTE2 0xFF
00030 #define TEST_BYTE3 0xAA
00031 #define TEST_BYTE4 0x55
00032 #define TEST_BYTE5 0x50
00033 
00034 #define TEST_BYTE_RX TEST_BYTE3
00035 #define TEST_BYTE_TX_BASE TEST_BYTE5
00036 
00037 #if defined(TARGET_K64F) || defined(TARGET_K66F)
00038 #define TEST_MOSI_PIN PTD2
00039 #define TEST_MISO_PIN PTD3
00040 #define TEST_SCLK_PIN PTD1
00041 #define TEST_CS_PIN   PTD0
00042 
00043 #elif defined(TARGET_EFM32LG_STK3600) || defined(TARGET_EFM32GG_STK3700) || defined(TARGET_EFM32WG_STK3800)
00044 #define TEST_MOSI_PIN PD0
00045 #define TEST_MISO_PIN PD1
00046 #define TEST_SCLK_PIN PD2
00047 #define TEST_CS_PIN   PD3
00048 
00049 #elif defined(TARGET_EFM32ZG_STK3200)
00050 #define TEST_MOSI_PIN PD7
00051 #define TEST_MISO_PIN PD6
00052 #define TEST_SCLK_PIN PC15
00053 #define TEST_CS_PIN   PC14
00054 
00055 #elif defined(TARGET_EFM32HG_STK3400)
00056 #define TEST_MOSI_PIN PE10
00057 #define TEST_MISO_PIN PE11
00058 #define TEST_SCLK_PIN PE12
00059 #define TEST_CS_PIN   PE13
00060 
00061 #elif defined(TARGET_RZ_A1H)
00062 #define TEST_MOSI_PIN P10_14
00063 #define TEST_MISO_PIN P10_15
00064 #define TEST_SCLK_PIN P10_12
00065 #define TEST_CS_PIN   P10_13
00066 
00067 #else
00068 #error Target not supported
00069 #endif
00070 
00071 volatile int why;
00072 volatile bool complete;
00073 void cbdone(int event) {
00074     complete = true;
00075     why = event;
00076 }
00077 
00078 
00079 TEST_GROUP(SPI_Master_Asynchronous)
00080 {
00081     uint8_t tx_buf[LONG_XFR];
00082     uint8_t rx_buf[LONG_XFR];
00083     SPI *obj;
00084     DigitalOut *cs;
00085     event_callback_t callback;
00086 
00087     void setup() {
00088         obj = new SPI(TEST_MOSI_PIN, TEST_MISO_PIN, TEST_SCLK_PIN);
00089         cs = new DigitalOut(TEST_CS_PIN);
00090         complete = false;
00091         why = 0;
00092         callback.attach(cbdone);
00093 
00094         // Set the default value of tx_buf
00095         for (uint32_t i = 0; i < sizeof(tx_buf); i++) {
00096             tx_buf[i] = i + TEST_BYTE_TX_BASE;
00097         }
00098         memset(rx_buf,TEST_BYTE_RX,sizeof(rx_buf));
00099     }
00100     void teardown() {
00101         delete obj;
00102         obj = NULL;
00103         delete cs;
00104         cs = NULL;
00105     }
00106     uint32_t cmpnbuf(uint8_t *expect, uint8_t *actual, uint32_t offset, uint32_t end, const char *file, uint32_t line)
00107     {
00108         uint32_t i;
00109         for (i = offset; i < end; i++){
00110             if (expect[i] != actual[i]) {
00111                 break;
00112             }
00113         }
00114         if (i < end) {
00115             CHECK_EQUAL_LOCATION((int)expect[i], (int)actual[i], file, line);
00116         }
00117         CHECK_EQUAL_LOCATION(end, i, file, line);
00118         return i;
00119     }
00120     uint32_t cmpnbufc(uint8_t expect, uint8_t *actual, uint32_t offset, uint32_t end, const char *file, uint32_t line)
00121     {
00122         uint32_t i;
00123         for (i = offset; i < end; i++){
00124             if (expect != actual[i]) {
00125                 break;
00126             }
00127         }
00128         if (i < end) {
00129             CHECK_EQUAL_LOCATION((int)expect, (int)actual[i], file, line);
00130         }
00131         CHECK_EQUAL_LOCATION(end, i, file, line);
00132         return i;
00133     }
00134     void dumpRXbuf() {
00135         uint32_t i;
00136         printf("\r\n");
00137         printf("RX Buffer Contents: [");
00138         //flushf(stdout);
00139         for (i = 0; i < sizeof(rx_buf); i++){
00140             printf("%02x",rx_buf[i]);
00141             if (i+1 < sizeof(rx_buf)){
00142                 printf(",");
00143             }
00144         }
00145         printf("]\r\n");
00146     }
00147 };
00148 
00149 // SPI write tx length: FIFO-1, read length: 0
00150 //   Checks: Null pointer exceptions, completion event
00151 TEST(SPI_Master_Asynchronous, short_tx_0_rx)
00152 {
00153     int rc;
00154     // Write a buffer of Short Transfer length.
00155     rc = obj->transfer( tx_buf,SHORT_XFR,NULL,0, callback, -1);
00156     CHECK_EQUAL(0, rc);
00157 
00158     while (!complete);
00159 
00160     // Make sure that the callback fires.
00161     CHECK_EQUAL(why, SPI_EVENT_COMPLETE);
00162 
00163     // TODO: Check for a null pointer exception
00164 }
00165 
00166 
00167 //
00168 // SPI write tx length: FIFO-1, read length: 0, non-null read pointer
00169 //   Checks: Null pointer exceptions, completion event, canary values in read buffer
00170 TEST(SPI_Master_Asynchronous, short_tx_0_rx_nn)
00171 {
00172     int rc;
00173     // Write a buffer of Short Transfer length.
00174     rc = obj->transfer( tx_buf,SHORT_XFR,rx_buf,0,callback, -1);
00175     CHECK_EQUAL(0, rc);
00176 
00177     while (!complete);
00178 
00179     // Make sure that the callback fires.
00180     CHECK_EQUAL(SPI_EVENT_COMPLETE, why);
00181 
00182     // Check that the rx buffer is untouched
00183     cmpnbufc(TEST_BYTE_RX,rx_buf,0,sizeof(rx_buf),__FILE__,__LINE__);
00184 }
00185 
00186 // SPI write tx length: 0, read length: FIFO-1
00187 //   Checks: Receive value==fill character, completion event
00188 TEST(SPI_Master_Asynchronous, 0_tx_short_rx)
00189 {
00190     int rc;
00191     // Read a buffer of Short Transfer length.
00192     rc = obj->transfer( NULL,0,rx_buf,SHORT_XFR,callback, -1);
00193     CHECK_EQUAL(0, rc);
00194 
00195     while (!complete);
00196 
00197     // Make sure that the callback fires.
00198     CHECK_EQUAL(SPI_EVENT_COMPLETE, why);
00199 
00200     // TODO: Check for null pointer exception
00201     // Check that the receive buffer contains the fill byte.
00202     cmpnbufc(SPI_FILL_WORD,rx_buf,0,SHORT_XFR,__FILE__,__LINE__);
00203     // Check that remaining portion of the receive buffer contains the rx test byte
00204     cmpnbufc(TEST_BYTE_RX,rx_buf,SHORT_XFR,sizeof(rx_buf),__FILE__,__LINE__);
00205 }
00206 
00207 // SPI write tx length: 0, read length: FIFO-1
00208 //   Checks: Receive value==fill character, completion event
00209 TEST(SPI_Master_Asynchronous, 0_tx_nn_short_rx)
00210 {
00211     int rc;
00212     // Read a buffer of Short Transfer length.
00213     rc = obj->transfer(tx_buf,0,rx_buf,SHORT_XFR,callback, -1);
00214     CHECK_EQUAL(0, rc);
00215 
00216     while (!complete);
00217 
00218     // Make sure that the callback fires.
00219     CHECK_EQUAL(SPI_EVENT_COMPLETE, why);
00220 
00221     // Check that the receive buffer contains the fill byte.
00222     cmpnbufc(SPI_FILL_WORD,rx_buf,0,SHORT_XFR,__FILE__,__LINE__);
00223     // Check that remaining portion of the receive buffer contains the rx test byte
00224     cmpnbufc(TEST_BYTE_RX,rx_buf,SHORT_XFR,sizeof(rx_buf),__FILE__,__LINE__);
00225 }
00226 
00227 // SPI write tx length: FIFO-1 ascending values, read length: FIFO-1
00228 //   Checks: Receive buffer == tx buffer, completion event
00229 TEST(SPI_Master_Asynchronous, short_tx_short_rx)
00230 {
00231     int rc;
00232     // Write/Read a buffer of Long Transfer length.
00233     rc = obj->transfer( tx_buf,SHORT_XFR,rx_buf,SHORT_XFR,callback, -1);
00234     CHECK_EQUAL(0, rc);
00235 
00236     while (!complete);
00237 
00238     // Make sure that the callback fires.
00239     CHECK_EQUAL(SPI_EVENT_COMPLETE, why);
00240 
00241     // Check that the rx buffer contains the tx bytes
00242     cmpnbuf(tx_buf,rx_buf,0,SHORT_XFR,__FILE__,__LINE__);
00243     // Check that remaining portion of the receive buffer contains the rx test byte
00244     cmpnbufc(TEST_BYTE_RX,rx_buf,SHORT_XFR,sizeof(rx_buf),__FILE__,__LINE__);
00245 }
00246 // SPI write tx length: 2xFIFO ascending values, read length: 2xFIFO
00247 //   Checks: Receive buffer == tx buffer, completion event
00248 TEST(SPI_Master_Asynchronous, long_tx_long_rx)
00249 {
00250     int rc;
00251     // Write/Read a buffer of Long Transfer length.
00252     rc = obj->transfer(tx_buf,LONG_XFR,rx_buf,LONG_XFR,callback, -1);
00253     CHECK_EQUAL(0, rc);
00254 
00255     while (!complete);
00256 
00257     // Make sure that the callback fires.
00258     CHECK_EQUAL(SPI_EVENT_COMPLETE, why);
00259 
00260     //dumpRXbuf();
00261     // Check that the rx buffer contains the tx bytes
00262     cmpnbuf(tx_buf,rx_buf,0,LONG_XFR,__FILE__,__LINE__);
00263     // Check that remaining portion of the receive buffer contains the rx test byte
00264     cmpnbufc(TEST_BYTE_RX,rx_buf,LONG_XFR,sizeof(rx_buf),__FILE__,__LINE__);
00265 }
00266 
00267 // SPI write tx length: 2xFIFO, ascending, read length: FIFO-1
00268 //   Checks: Receive buffer == tx buffer, completion event, read buffer overflow
00269 TEST(SPI_Master_Asynchronous, long_tx_short_rx)
00270 {
00271     int rc;
00272     // Write a buffer of Short Transfer length.
00273     rc = obj->transfer(tx_buf,LONG_XFR,rx_buf,SHORT_XFR,callback, -1);
00274     CHECK_EQUAL(0, rc);
00275 
00276     while (!complete);
00277 
00278     // Make sure that the callback fires.
00279     CHECK_EQUAL(SPI_EVENT_COMPLETE, why);
00280 
00281     // Check that the rx buffer contains the tx bytes
00282     cmpnbuf(tx_buf,rx_buf,0,SHORT_XFR,__FILE__,__LINE__);
00283     // Check that remaining portion of the receive buffer contains the rx test byte
00284     cmpnbufc(TEST_BYTE_RX,rx_buf,SHORT_XFR,sizeof(rx_buf),__FILE__,__LINE__);
00285 }
00286 
00287 // SPI write tx length: FIFO-1, ascending, read length: 2xFIFO
00288 //   Checks: Receive buffer == tx buffer, then fill, completion event
00289 TEST(SPI_Master_Asynchronous, short_tx_long_rx)
00290 {
00291     int rc;
00292     // Write a buffer of Short Transfer length.
00293     rc = obj->transfer(tx_buf,SHORT_XFR,rx_buf,LONG_XFR,callback, -1);
00294     CHECK_EQUAL(0, rc);
00295 
00296     while (!complete);
00297 
00298     // Make sure that the callback fires.
00299     CHECK_EQUAL(SPI_EVENT_COMPLETE, why);
00300 
00301     //dumpRXbuf();
00302     // Check that the rx buffer contains the tx bytes
00303     cmpnbuf(tx_buf,rx_buf,0,SHORT_XFR,__FILE__,__LINE__);
00304     // Check that the rx buffer contains the tx fill bytes
00305     cmpnbufc(SPI_FILL_WORD,rx_buf,SHORT_XFR,LONG_XFR,__FILE__,__LINE__);
00306     // Check that remaining portion of the receive buffer contains the rx test byte
00307     cmpnbufc(TEST_BYTE_RX,rx_buf,LONG_XFR,sizeof(rx_buf),__FILE__,__LINE__);
00308 }
00309 
00310 TEST(SPI_Master_Asynchronous, queue_test)
00311 {
00312     int rc;
00313     // Write/Read a buffer of Long Transfer length.
00314     rc = obj->transfer( tx_buf,4,rx_buf,4,callback, 0);
00315     CHECK_EQUAL(0, rc);
00316     rc = obj->transfer( &tx_buf[4],4, &rx_buf[4],4,callback, 0);
00317     CHECK_EQUAL(0, rc);
00318     rc = obj->transfer( &tx_buf[8],4, &rx_buf[8],4,callback, -1);
00319     CHECK_EQUAL(0, rc);
00320 
00321     while (!complete);
00322 
00323     // Make sure that the callback fires.
00324     CHECK_EQUAL(SPI_EVENT_COMPLETE, why);
00325 
00326     // Check that the rx buffer contains the tx bytes
00327     cmpnbuf(tx_buf,rx_buf,0,12,__FILE__,__LINE__);
00328     // Check that remaining portion of the receive buffer contains the rx test byte
00329     cmpnbufc(TEST_BYTE_RX,rx_buf,12,sizeof(rx_buf),__FILE__,__LINE__);
00330 }