Shengyuan Chu / Mbed 2 deprecated AngleMeter

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Dependencies:   MMA8452 mbed

PowerControl/PowerControl.h@0:2885d4453e88, 2015-05-11 (annotated)

Committer:
chushengyuan
Date:
Mon May 11 12:24:48 2015 +0000
Revision:
0:2885d4453e88
finish all

Who changed what in which revision?

UserRevisionLine numberNew contents of line
chushengyuan 0:2885d4453e88 1 /**
chushengyuan 0:2885d4453e88 2 @file PowerControl.h
chushengyuan 0:2885d4453e88 3 @brief Header file containing member functions and variables.
chushengyuan 0:2885d4453e88 4 @brief Acknowledgements to Michael Wei's Library.
chushengyuan 0:2885d4453e88 5 */
chushengyuan 0:2885d4453e88 6
chushengyuan 0:2885d4453e88 7 #ifndef MBED_POWERCONTROL_H
chushengyuan 0:2885d4453e88 8 #define MBED_POWERCONTROL_H
chushengyuan 0:2885d4453e88 9
chushengyuan 0:2885d4453e88 10 //System Control Register
chushengyuan 0:2885d4453e88 11 // bit 0: Reserved
chushengyuan 0:2885d4453e88 12 // bit 1: Sleep on Exit
chushengyuan 0:2885d4453e88 13 #define LPC1768_SCR_SLEEPONEXIT 0x2
chushengyuan 0:2885d4453e88 14 // bit 2: Deep Sleep
chushengyuan 0:2885d4453e88 15 #define LPC1768_SCR_SLEEPDEEP 0x4
chushengyuan 0:2885d4453e88 16 // bit 3: Resereved
chushengyuan 0:2885d4453e88 17 // bit 4: Send on Pending
chushengyuan 0:2885d4453e88 18 #define LPC1768_SCR_SEVONPEND 0x10
chushengyuan 0:2885d4453e88 19 // bit 5-31: Reserved
chushengyuan 0:2885d4453e88 20
chushengyuan 0:2885d4453e88 21 //Power Control Register
chushengyuan 0:2885d4453e88 22 // bit 0: Power mode control bit 0 (power-down mode)
chushengyuan 0:2885d4453e88 23 #define LPC1768_PCON_PM0 0x1
chushengyuan 0:2885d4453e88 24 // bit 1: Power mode control bit 1 (deep power-down mode)
chushengyuan 0:2885d4453e88 25 #define LPC1768_PCON_PM1 0x2
chushengyuan 0:2885d4453e88 26 // bit 2: Brown-out reduced power mode
chushengyuan 0:2885d4453e88 27 #define LPC1768_PCON_BODRPM 0x4
chushengyuan 0:2885d4453e88 28 // bit 3: Brown-out global disable
chushengyuan 0:2885d4453e88 29 #define LPC1768_PCON_BOGD 0x8
chushengyuan 0:2885d4453e88 30 // bit 4: Brown-out reset disable
chushengyuan 0:2885d4453e88 31 #define LPC1768_PCON_BORD 0x10
chushengyuan 0:2885d4453e88 32 // bit 5-7 : Reserved
chushengyuan 0:2885d4453e88 33 // bit 8: Sleep Mode Entry Flag
chushengyuan 0:2885d4453e88 34 #define LPC1768_PCON_SMFLAG 0x100
chushengyuan 0:2885d4453e88 35 // bit 9: Deep Sleep Entry Flag
chushengyuan 0:2885d4453e88 36 #define LPC1768_PCON_DSFLAG 0x200
chushengyuan 0:2885d4453e88 37 // bit 10: Power Down Entry Flag
chushengyuan 0:2885d4453e88 38 #define LPC1768_PCON_PDFLAG 0x400
chushengyuan 0:2885d4453e88 39 // bit 11: Deep Power Down Entry Flag
chushengyuan 0:2885d4453e88 40 #define LPC1768_PCON_DPDFLAG 0x800
chushengyuan 0:2885d4453e88 41 // bit 12-31: Reserved
chushengyuan 0:2885d4453e88 42
chushengyuan 0:2885d4453e88 43 //"Sleep Mode" (WFI).
chushengyuan 0:2885d4453e88 44 inline void Sleep(void)
chushengyuan 0:2885d4453e88 45 {
chushengyuan 0:2885d4453e88 46 __WFI();
chushengyuan 0:2885d4453e88 47 }
chushengyuan 0:2885d4453e88 48
chushengyuan 0:2885d4453e88 49 //"Deep Sleep" Mode
chushengyuan 0:2885d4453e88 50 inline void DeepSleep(void)
chushengyuan 0:2885d4453e88 51 {
chushengyuan 0:2885d4453e88 52 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
chushengyuan 0:2885d4453e88 53 __WFI();
chushengyuan 0:2885d4453e88 54 }
chushengyuan 0:2885d4453e88 55
chushengyuan 0:2885d4453e88 56 //"Power-Down" Mode
chushengyuan 0:2885d4453e88 57 inline void PowerDown(void)
chushengyuan 0:2885d4453e88 58 {
chushengyuan 0:2885d4453e88 59 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
chushengyuan 0:2885d4453e88 60 LPC_SC->PCON &= ~LPC1768_PCON_PM1;
chushengyuan 0:2885d4453e88 61 LPC_SC->PCON |= LPC1768_PCON_PM0;
chushengyuan 0:2885d4453e88 62 __WFI();
chushengyuan 0:2885d4453e88 63 //reset back to normal
chushengyuan 0:2885d4453e88 64 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
chushengyuan 0:2885d4453e88 65 }
chushengyuan 0:2885d4453e88 66
chushengyuan 0:2885d4453e88 67 //"Deep Power-Down" Mode
chushengyuan 0:2885d4453e88 68 inline void DeepPowerDown(void)
chushengyuan 0:2885d4453e88 69 {
chushengyuan 0:2885d4453e88 70 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
chushengyuan 0:2885d4453e88 71 LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
chushengyuan 0:2885d4453e88 72 __WFI();
chushengyuan 0:2885d4453e88 73 //reset back to normal
chushengyuan 0:2885d4453e88 74 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
chushengyuan 0:2885d4453e88 75 }
chushengyuan 0:2885d4453e88 76
chushengyuan 0:2885d4453e88 77 //shut down BOD during power-down/deep sleep
chushengyuan 0:2885d4453e88 78 inline void BrownOut_ReducedPowerMode_Enable(void)
chushengyuan 0:2885d4453e88 79 {
chushengyuan 0:2885d4453e88 80 LPC_SC->PCON |= LPC1768_PCON_BODRPM;
chushengyuan 0:2885d4453e88 81 }
chushengyuan 0:2885d4453e88 82
chushengyuan 0:2885d4453e88 83 //turn on BOD during power-down/deep sleep
chushengyuan 0:2885d4453e88 84 inline void BrownOut_ReducedPowerMode_Disable(void)
chushengyuan 0:2885d4453e88 85 {
chushengyuan 0:2885d4453e88 86 LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
chushengyuan 0:2885d4453e88 87 }
chushengyuan 0:2885d4453e88 88
chushengyuan 0:2885d4453e88 89 //turn off brown out circutry
chushengyuan 0:2885d4453e88 90 inline void BrownOut_Global_Disable(void)
chushengyuan 0:2885d4453e88 91 {
chushengyuan 0:2885d4453e88 92 LPC_SC->PCON |= LPC1768_PCON_BOGD;
chushengyuan 0:2885d4453e88 93 }
chushengyuan 0:2885d4453e88 94
chushengyuan 0:2885d4453e88 95 //turn on brown out circutry
chushengyuan 0:2885d4453e88 96 inline void BrownOut_Global_Enable(void)
chushengyuan 0:2885d4453e88 97 {
chushengyuan 0:2885d4453e88 98 LPC_SC->PCON &= !LPC1768_PCON_BOGD;
chushengyuan 0:2885d4453e88 99 }
chushengyuan 0:2885d4453e88 100
chushengyuan 0:2885d4453e88 101 //turn off brown out reset circutry
chushengyuan 0:2885d4453e88 102 inline void BrownOut_Reset_Disable(void)
chushengyuan 0:2885d4453e88 103 {
chushengyuan 0:2885d4453e88 104 LPC_SC->PCON |= LPC1768_PCON_BORD;
chushengyuan 0:2885d4453e88 105 }
chushengyuan 0:2885d4453e88 106
chushengyuan 0:2885d4453e88 107 //turn on brown outreset circutry
chushengyuan 0:2885d4453e88 108 inline void BrownOut_Reset_Enable(void)
chushengyuan 0:2885d4453e88 109 {
chushengyuan 0:2885d4453e88 110 LPC_SC->PCON &= ~LPC1768_PCON_BORD;
chushengyuan 0:2885d4453e88 111 }
chushengyuan 0:2885d4453e88 112 //Peripheral Control Register
chushengyuan 0:2885d4453e88 113 // bit 0: Reserved
chushengyuan 0:2885d4453e88 114 // bit 1: PCTIM0: Timer/Counter 0 power/clock enable
chushengyuan 0:2885d4453e88 115 #define LPC1768_PCONP_PCTIM0 0x2
chushengyuan 0:2885d4453e88 116 // bit 2: PCTIM1: Timer/Counter 1 power/clock enable
chushengyuan 0:2885d4453e88 117 #define LPC1768_PCONP_PCTIM1 0x4
chushengyuan 0:2885d4453e88 118 // bit 3: PCUART0: UART 0 power/clock enable
chushengyuan 0:2885d4453e88 119 #define LPC1768_PCONP_PCUART0 0x8
chushengyuan 0:2885d4453e88 120 // bit 4: PCUART1: UART 1 power/clock enable
chushengyuan 0:2885d4453e88 121 #define LPC1768_PCONP_PCUART1 0x10
chushengyuan 0:2885d4453e88 122 // bit 5: Reserved
chushengyuan 0:2885d4453e88 123 // bit 6: PCPWM1: PWM 1 power/clock enable
chushengyuan 0:2885d4453e88 124 #define LPC1768_PCONP_PCPWM1 0x40
chushengyuan 0:2885d4453e88 125 // bit 7: PCI2C0: I2C interface 0 power/clock enable
chushengyuan 0:2885d4453e88 126 #define LPC1768_PCONP_PCI2C0 0x80
chushengyuan 0:2885d4453e88 127 // bit 8: PCSPI: SPI interface power/clock enable
chushengyuan 0:2885d4453e88 128 #define LPC1768_PCONP_PCSPI 0x100
chushengyuan 0:2885d4453e88 129 // bit 9: PCRTC: RTC power/clock enable
chushengyuan 0:2885d4453e88 130 #define LPC1768_PCONP_PCRTC 0x200
chushengyuan 0:2885d4453e88 131 // bit 10: PCSSP1: SSP interface 1 power/clock enable
chushengyuan 0:2885d4453e88 132 #define LPC1768_PCONP_PCSSP1 0x400
chushengyuan 0:2885d4453e88 133 // bit 11: Reserved
chushengyuan 0:2885d4453e88 134 // bit 12: PCADC: A/D converter power/clock enable
chushengyuan 0:2885d4453e88 135 #define LPC1768_PCONP_PCADC 0x1000
chushengyuan 0:2885d4453e88 136 // bit 13: PCCAN1: CAN controller 1 power/clock enable
chushengyuan 0:2885d4453e88 137 #define LPC1768_PCONP_PCCAN1 0x2000
chushengyuan 0:2885d4453e88 138 // bit 14: PCCAN2: CAN controller 2 power/clock enable
chushengyuan 0:2885d4453e88 139 #define LPC1768_PCONP_PCCAN2 0x4000
chushengyuan 0:2885d4453e88 140 // bit 15: PCGPIO: GPIOs power/clock enable
chushengyuan 0:2885d4453e88 141 #define LPC1768_PCONP_PCGPIO 0x8000
chushengyuan 0:2885d4453e88 142 // bit 16: PCRIT: Repetitive interrupt timer power/clock enable
chushengyuan 0:2885d4453e88 143 #define LPC1768_PCONP_PCRIT 0x10000
chushengyuan 0:2885d4453e88 144 // bit 17: PCMCPWM: Motor control PWM power/clock enable
chushengyuan 0:2885d4453e88 145 #define LPC1768_PCONP_PCMCPWM 0x20000
chushengyuan 0:2885d4453e88 146 // bit 18: PCQEI: Quadrature encoder interface power/clock enable
chushengyuan 0:2885d4453e88 147 #define LPC1768_PCONP_PCQEI 0x40000
chushengyuan 0:2885d4453e88 148 // bit 19: PCI2C1: I2C interface 1 power/clock enable
chushengyuan 0:2885d4453e88 149 #define LPC1768_PCONP_PCI2C1 0x80000
chushengyuan 0:2885d4453e88 150 // bit 20: Reserved
chushengyuan 0:2885d4453e88 151 // bit 21: PCSSP0: SSP interface 0 power/clock enable
chushengyuan 0:2885d4453e88 152 #define LPC1768_PCONP_PCSSP0 0x200000
chushengyuan 0:2885d4453e88 153 // bit 22: PCTIM2: Timer 2 power/clock enable
chushengyuan 0:2885d4453e88 154 #define LPC1768_PCONP_PCTIM2 0x400000
chushengyuan 0:2885d4453e88 155 // bit 23: PCTIM3: Timer 3 power/clock enable
chushengyuan 0:2885d4453e88 156 #define LPC1768_PCONP_PCQTIM3 0x800000
chushengyuan 0:2885d4453e88 157 // bit 24: PCUART2: UART 2 power/clock enable
chushengyuan 0:2885d4453e88 158 #define LPC1768_PCONP_PCUART2 0x1000000
chushengyuan 0:2885d4453e88 159 // bit 25: PCUART3: UART 3 power/clock enable
chushengyuan 0:2885d4453e88 160 #define LPC1768_PCONP_PCUART3 0x2000000
chushengyuan 0:2885d4453e88 161 // bit 26: PCI2C2: I2C interface 2 power/clock enable
chushengyuan 0:2885d4453e88 162 #define LPC1768_PCONP_PCI2C2 0x4000000
chushengyuan 0:2885d4453e88 163 // bit 27: PCI2S: I2S interface power/clock enable
chushengyuan 0:2885d4453e88 164 #define LPC1768_PCONP_PCI2S 0x8000000
chushengyuan 0:2885d4453e88 165 // bit 28: Reserved
chushengyuan 0:2885d4453e88 166 // bit 29: PCGPDMA: GP DMA function power/clock enable
chushengyuan 0:2885d4453e88 167 #define LPC1768_PCONP_PCGPDMA 0x20000000
chushengyuan 0:2885d4453e88 168 // bit 30: PCENET: Ethernet block power/clock enable
chushengyuan 0:2885d4453e88 169 #define LPC1768_PCONP_PCENET 0x40000000
chushengyuan 0:2885d4453e88 170 // bit 31: PCUSB: USB interface power/clock enable
chushengyuan 0:2885d4453e88 171 #define LPC1768_PCONP_PCUSB 0x80000000
chushengyuan 0:2885d4453e88 172
chushengyuan 0:2885d4453e88 173 //Powers Up specified Peripheral(s)
chushengyuan 0:2885d4453e88 174 inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
chushengyuan 0:2885d4453e88 175 {
chushengyuan 0:2885d4453e88 176 return LPC_SC->PCONP |= bitMask;
chushengyuan 0:2885d4453e88 177 }
chushengyuan 0:2885d4453e88 178
chushengyuan 0:2885d4453e88 179 //Powers Down specified Peripheral(s)
chushengyuan 0:2885d4453e88 180 inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
chushengyuan 0:2885d4453e88 181 {
chushengyuan 0:2885d4453e88 182 return LPC_SC->PCONP &= ~bitMask;
chushengyuan 0:2885d4453e88 183 }
chushengyuan 0:2885d4453e88 184
chushengyuan 0:2885d4453e88 185 //returns if the peripheral is on or off
chushengyuan 0:2885d4453e88 186 inline bool Peripheral_GetStatus(unsigned int peripheral)
chushengyuan 0:2885d4453e88 187 {
chushengyuan 0:2885d4453e88 188 return (LPC_SC->PCONP & peripheral) ? true : false;
chushengyuan 0:2885d4453e88 189 }
chushengyuan 0:2885d4453e88 190
chushengyuan 0:2885d4453e88 191 #endif