MSCUsbHost - This is Igors USB Host Mass Storage Class example…

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This is Igors USB Host Mass Storage Class example with main.cpp removed. Import this as files, add your own main.cpp and have all the USB MSC fun you can!

Dependents: mbedDemoDisplay mbedDemoDisplay MMEx_Challenge

USBHostLite/usbhost_lpc17xx.h@0:cfb58054ab28, 2010-02-20 (annotated)

Committer:: chris
Date:: Sat Feb 20 08:06:12 2010 +0000
Revision:: 0:cfb58054ab28

Who changed what in which revision?

User	Revision	Line number	New contents of line
chris	0:cfb58054ab28	1	/*
chris	0:cfb58054ab28	2	**************************************************************************************************************
chris	0:cfb58054ab28	3	* NXP USB Host Stack
chris	0:cfb58054ab28	4	*
chris	0:cfb58054ab28	5	* (c) Copyright 2008, NXP SemiConductors
chris	0:cfb58054ab28	6	* (c) Copyright 2008, OnChip Technologies LLC
chris	0:cfb58054ab28	7	* All Rights Reserved
chris	0:cfb58054ab28	8	*
chris	0:cfb58054ab28	9	* www.nxp.com
chris	0:cfb58054ab28	10	* www.onchiptech.com
chris	0:cfb58054ab28	11	*
chris	0:cfb58054ab28	12	* File : usbhost_lpc17xx.h
chris	0:cfb58054ab28	13	* Programmer(s) : Ravikanth.P
chris	0:cfb58054ab28	14	* Version :
chris	0:cfb58054ab28	15	*
chris	0:cfb58054ab28	16	**************************************************************************************************************
chris	0:cfb58054ab28	17	*/
chris	0:cfb58054ab28	18
chris	0:cfb58054ab28	19	#ifndef USBHOST_LPC17xx_H
chris	0:cfb58054ab28	20	#define USBHOST_LPC17xx_H
chris	0:cfb58054ab28	21
chris	0:cfb58054ab28	22	/*
chris	0:cfb58054ab28	23	**************************************************************************************************************
chris	0:cfb58054ab28	24	* INCLUDE HEADER FILES
chris	0:cfb58054ab28	25	**************************************************************************************************************
chris	0:cfb58054ab28	26	*/
chris	0:cfb58054ab28	27
chris	0:cfb58054ab28	28	#include "usbhost_inc.h"
chris	0:cfb58054ab28	29
chris	0:cfb58054ab28	30	/*
chris	0:cfb58054ab28	31	**************************************************************************************************************
chris	0:cfb58054ab28	32	* PRINT CONFIGURATION
chris	0:cfb58054ab28	33	**************************************************************************************************************
chris	0:cfb58054ab28	34	*/
chris	0:cfb58054ab28	35
chris	0:cfb58054ab28	36	#define PRINT_ENABLE 1
chris	0:cfb58054ab28	37
chris	0:cfb58054ab28	38	#if PRINT_ENABLE
chris	0:cfb58054ab28	39	#define PRINT_Log(...) printf(__VA_ARGS__)
chris	0:cfb58054ab28	40	#define PRINT_Err(rc) printf("ERROR: In %s at Line %u - rc = %d\n", __FUNCTION__, __LINE__, rc)
chris	0:cfb58054ab28	41
chris	0:cfb58054ab28	42	#else
chris	0:cfb58054ab28	43	#define PRINT_Log(...) do {} while(0)
chris	0:cfb58054ab28	44	#define PRINT_Err(rc) do {} while(0)
chris	0:cfb58054ab28	45
chris	0:cfb58054ab28	46	#endif
chris	0:cfb58054ab28	47
chris	0:cfb58054ab28	48	/*
chris	0:cfb58054ab28	49	**************************************************************************************************************
chris	0:cfb58054ab28	50	* GENERAL DEFINITIONS
chris	0:cfb58054ab28	51	**************************************************************************************************************
chris	0:cfb58054ab28	52	*/
chris	0:cfb58054ab28	53
chris	0:cfb58054ab28	54	#define DESC_LENGTH(x) x[0]
chris	0:cfb58054ab28	55	#define DESC_TYPE(x) x[1]
chris	0:cfb58054ab28	56
chris	0:cfb58054ab28	57
chris	0:cfb58054ab28	58	#define HOST_GET_DESCRIPTOR(descType, descIndex, data, length) \
chris	0:cfb58054ab28	59	Host_CtrlRecv(USB_DEVICE_TO_HOST \| USB_RECIPIENT_DEVICE, GET_DESCRIPTOR, \
chris	0:cfb58054ab28	60	(descType << 8)\|(descIndex), 0, length, data)
chris	0:cfb58054ab28	61
chris	0:cfb58054ab28	62	#define HOST_SET_ADDRESS(new_addr) \
chris	0:cfb58054ab28	63	Host_CtrlSend(USB_HOST_TO_DEVICE \| USB_RECIPIENT_DEVICE, SET_ADDRESS, \
chris	0:cfb58054ab28	64	new_addr, 0, 0, NULL)
chris	0:cfb58054ab28	65
chris	0:cfb58054ab28	66	#define USBH_SET_CONFIGURATION(configNum) \
chris	0:cfb58054ab28	67	Host_CtrlSend(USB_HOST_TO_DEVICE \| USB_RECIPIENT_DEVICE, SET_CONFIGURATION, \
chris	0:cfb58054ab28	68	configNum, 0, 0, NULL)
chris	0:cfb58054ab28	69
chris	0:cfb58054ab28	70	#define USBH_SET_INTERFACE(ifNum, altNum) \
chris	0:cfb58054ab28	71	Host_CtrlSend(USB_HOST_TO_DEVICE \| USB_RECIPIENT_INTERFACE, SET_INTERFACE, \
chris	0:cfb58054ab28	72	altNum, ifNum, 0, NULL)
chris	0:cfb58054ab28	73
chris	0:cfb58054ab28	74	/*
chris	0:cfb58054ab28	75	**************************************************************************************************************
chris	0:cfb58054ab28	76	* OHCI OPERATIONAL REGISTER FIELD DEFINITIONS
chris	0:cfb58054ab28	77	**************************************************************************************************************
chris	0:cfb58054ab28	78	*/
chris	0:cfb58054ab28	79
chris	0:cfb58054ab28	80	/* ------------------ HcControl Register --------------------- */
chris	0:cfb58054ab28	81	#define OR_CONTROL_CLE 0x00000010
chris	0:cfb58054ab28	82	#define OR_CONTROL_BLE 0x00000020
chris	0:cfb58054ab28	83	#define OR_CONTROL_HCFS 0x000000C0
chris	0:cfb58054ab28	84	#define OR_CONTROL_HC_OPER 0x00000080
chris	0:cfb58054ab28	85	/* ----------------- HcCommandStatus Register ----------------- */
chris	0:cfb58054ab28	86	#define OR_CMD_STATUS_HCR 0x00000001
chris	0:cfb58054ab28	87	#define OR_CMD_STATUS_CLF 0x00000002
chris	0:cfb58054ab28	88	#define OR_CMD_STATUS_BLF 0x00000004
chris	0:cfb58054ab28	89	/* --------------- HcInterruptStatus Register ----------------- */
chris	0:cfb58054ab28	90	#define OR_INTR_STATUS_WDH 0x00000002
chris	0:cfb58054ab28	91	#define OR_INTR_STATUS_RHSC 0x00000040
chris	0:cfb58054ab28	92	/* --------------- HcInterruptEnable Register ----------------- */
chris	0:cfb58054ab28	93	#define OR_INTR_ENABLE_WDH 0x00000002
chris	0:cfb58054ab28	94	#define OR_INTR_ENABLE_RHSC 0x00000040
chris	0:cfb58054ab28	95	#define OR_INTR_ENABLE_MIE 0x80000000
chris	0:cfb58054ab28	96	/* ---------------- HcRhDescriptorA Register ------------------ */
chris	0:cfb58054ab28	97	#define OR_RH_STATUS_LPSC 0x00010000
chris	0:cfb58054ab28	98	#define OR_RH_STATUS_DRWE 0x00008000
chris	0:cfb58054ab28	99	/* -------------- HcRhPortStatus[1:NDP] Register -------------- */
chris	0:cfb58054ab28	100	#define OR_RH_PORT_CCS 0x00000001
chris	0:cfb58054ab28	101	#define OR_RH_PORT_PRS 0x00000010
chris	0:cfb58054ab28	102	#define OR_RH_PORT_CSC 0x00010000
chris	0:cfb58054ab28	103	#define OR_RH_PORT_PRSC 0x00100000
chris	0:cfb58054ab28	104
chris	0:cfb58054ab28	105
chris	0:cfb58054ab28	106	/*
chris	0:cfb58054ab28	107	**************************************************************************************************************
chris	0:cfb58054ab28	108	* FRAME INTERVAL
chris	0:cfb58054ab28	109	**************************************************************************************************************
chris	0:cfb58054ab28	110	*/
chris	0:cfb58054ab28	111
chris	0:cfb58054ab28	112	#define FI 0x2EDF /* 12000 bits per frame (-1) */
chris	0:cfb58054ab28	113	#define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) \| FI)
chris	0:cfb58054ab28	114
chris	0:cfb58054ab28	115	/*
chris	0:cfb58054ab28	116	**************************************************************************************************************
chris	0:cfb58054ab28	117	* TRANSFER DESCRIPTOR CONTROL FIELDS
chris	0:cfb58054ab28	118	**************************************************************************************************************
chris	0:cfb58054ab28	119	*/
chris	0:cfb58054ab28	120
chris	0:cfb58054ab28	121	#define TD_ROUNDING (USB_INT32U) (0x00040000) /* Buffer Rounding */
chris	0:cfb58054ab28	122	#define TD_SETUP (USB_INT32U)(0) /* Direction of Setup Packet */
chris	0:cfb58054ab28	123	#define TD_IN (USB_INT32U)(0x00100000) /* Direction In */
chris	0:cfb58054ab28	124	#define TD_OUT (USB_INT32U)(0x00080000) /* Direction Out */
chris	0:cfb58054ab28	125	#define TD_DELAY_INT(x) (USB_INT32U)((x) << 21) /* Delay Interrupt */
chris	0:cfb58054ab28	126	#define TD_TOGGLE_0 (USB_INT32U)(0x02000000) /* Toggle 0 */
chris	0:cfb58054ab28	127	#define TD_TOGGLE_1 (USB_INT32U)(0x03000000) /* Toggle 1 */
chris	0:cfb58054ab28	128	#define TD_CC (USB_INT32U)(0xF0000000) /* Completion Code */
chris	0:cfb58054ab28	129
chris	0:cfb58054ab28	130	/*
chris	0:cfb58054ab28	131	**************************************************************************************************************
chris	0:cfb58054ab28	132	* USB STANDARD REQUEST DEFINITIONS
chris	0:cfb58054ab28	133	**************************************************************************************************************
chris	0:cfb58054ab28	134	*/
chris	0:cfb58054ab28	135
chris	0:cfb58054ab28	136	#define USB_DESCRIPTOR_TYPE_DEVICE 1
chris	0:cfb58054ab28	137	#define USB_DESCRIPTOR_TYPE_CONFIGURATION 2
chris	0:cfb58054ab28	138	#define USB_DESCRIPTOR_TYPE_INTERFACE 4
chris	0:cfb58054ab28	139	#define USB_DESCRIPTOR_TYPE_ENDPOINT 5
chris	0:cfb58054ab28	140	/* ----------- Control RequestType Fields ----------- */
chris	0:cfb58054ab28	141	#define USB_DEVICE_TO_HOST 0x80
chris	0:cfb58054ab28	142	#define USB_HOST_TO_DEVICE 0x00
chris	0:cfb58054ab28	143	#define USB_REQUEST_TYPE_CLASS 0x20
chris	0:cfb58054ab28	144	#define USB_RECIPIENT_DEVICE 0x00
chris	0:cfb58054ab28	145	#define USB_RECIPIENT_INTERFACE 0x01
chris	0:cfb58054ab28	146	/* -------------- USB Standard Requests -------------- */
chris	0:cfb58054ab28	147	#define SET_ADDRESS 5
chris	0:cfb58054ab28	148	#define GET_DESCRIPTOR 6
chris	0:cfb58054ab28	149	#define SET_CONFIGURATION 9
chris	0:cfb58054ab28	150	#define SET_INTERFACE 11
chris	0:cfb58054ab28	151
chris	0:cfb58054ab28	152	/*
chris	0:cfb58054ab28	153	**************************************************************************************************************
chris	0:cfb58054ab28	154	* TYPE DEFINITIONS
chris	0:cfb58054ab28	155	**************************************************************************************************************
chris	0:cfb58054ab28	156	*/
chris	0:cfb58054ab28	157
chris	0:cfb58054ab28	158	typedef struct hcEd { /* ----------- HostController EndPoint Descriptor ------------- */
chris	0:cfb58054ab28	159	volatile USB_INT32U Control; /* Endpoint descriptor control */
chris	0:cfb58054ab28	160	volatile USB_INT32U TailTd; /* Physical address of tail in Transfer descriptor list */
chris	0:cfb58054ab28	161	volatile USB_INT32U HeadTd; /* Physcial address of head in Transfer descriptor list */
chris	0:cfb58054ab28	162	volatile USB_INT32U Next; /* Physical address of next Endpoint descriptor */
chris	0:cfb58054ab28	163	} HCED;
chris	0:cfb58054ab28	164
chris	0:cfb58054ab28	165	typedef struct hcTd { /* ------------ HostController Transfer Descriptor ------------ */
chris	0:cfb58054ab28	166	volatile USB_INT32U Control; /* Transfer descriptor control */
chris	0:cfb58054ab28	167	volatile USB_INT32U CurrBufPtr; /* Physical address of current buffer pointer */
chris	0:cfb58054ab28	168	volatile USB_INT32U Next; /* Physical pointer to next Transfer Descriptor */
chris	0:cfb58054ab28	169	volatile USB_INT32U BufEnd; /* Physical address of end of buffer */
chris	0:cfb58054ab28	170	} HCTD;
chris	0:cfb58054ab28	171
chris	0:cfb58054ab28	172	typedef struct hcca { /* ----------- Host Controller Communication Area ------------ */
chris	0:cfb58054ab28	173	volatile USB_INT32U IntTable[32]; /* Interrupt Table */
chris	0:cfb58054ab28	174	volatile USB_INT32U FrameNumber; /* Frame Number */
chris	0:cfb58054ab28	175	volatile USB_INT32U DoneHead; /* Done Head */
chris	0:cfb58054ab28	176	volatile USB_INT08U Reserved[116]; /* Reserved for future use */
chris	0:cfb58054ab28	177	volatile USB_INT08U Unknown[4]; /* Unused */
chris	0:cfb58054ab28	178	} HCCA;
chris	0:cfb58054ab28	179
chris	0:cfb58054ab28	180	/*
chris	0:cfb58054ab28	181	**************************************************************************************************************
chris	0:cfb58054ab28	182	* EXTERN DECLARATIONS
chris	0:cfb58054ab28	183	**************************************************************************************************************
chris	0:cfb58054ab28	184	*/
chris	0:cfb58054ab28	185
chris	0:cfb58054ab28	186	extern volatile HCED EDBulkIn; / BulkIn endpoint descriptor structure */
chris	0:cfb58054ab28	187	extern volatile HCED EDBulkOut; / BulkOut endpoint descriptor structure */
chris	0:cfb58054ab28	188	extern volatile HCTD TDHead; / Head transfer descriptor structure */
chris	0:cfb58054ab28	189	extern volatile HCTD TDTail; / Tail transfer descriptor structure */
chris	0:cfb58054ab28	190	extern volatile USB_INT08U TDBuffer; / Current Buffer Pointer of transfer descriptor */
chris	0:cfb58054ab28	191
chris	0:cfb58054ab28	192	/*
chris	0:cfb58054ab28	193	**************************************************************************************************************
chris	0:cfb58054ab28	194	* FUNCTION PROTOTYPES
chris	0:cfb58054ab28	195	**************************************************************************************************************
chris	0:cfb58054ab28	196	*/
chris	0:cfb58054ab28	197
chris	0:cfb58054ab28	198	void Host_Init (void);
chris	0:cfb58054ab28	199
chris	0:cfb58054ab28	200	extern "C" void USB_IRQHandler(void) __irq;
chris	0:cfb58054ab28	201
chris	0:cfb58054ab28	202	USB_INT32S Host_EnumDev (void);
chris	0:cfb58054ab28	203
chris	0:cfb58054ab28	204	USB_INT32S Host_ProcessTD(volatile HCED *ed,
chris	0:cfb58054ab28	205	volatile USB_INT32U token,
chris	0:cfb58054ab28	206	volatile USB_INT08U *buffer,
chris	0:cfb58054ab28	207	USB_INT32U buffer_len);
chris	0:cfb58054ab28	208
chris	0:cfb58054ab28	209	void Host_DelayUS ( USB_INT32U delay);
chris	0:cfb58054ab28	210	void Host_DelayMS ( USB_INT32U delay);
chris	0:cfb58054ab28	211
chris	0:cfb58054ab28	212
chris	0:cfb58054ab28	213	void Host_TDInit (volatile HCTD *td);
chris	0:cfb58054ab28	214	void Host_EDInit (volatile HCED *ed);
chris	0:cfb58054ab28	215	void Host_HCCAInit (volatile HCCA *hcca);
chris	0:cfb58054ab28	216
chris	0:cfb58054ab28	217	USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
chris	0:cfb58054ab28	218	USB_INT08U b_request,
chris	0:cfb58054ab28	219	USB_INT16U w_value,
chris	0:cfb58054ab28	220	USB_INT16U w_index,
chris	0:cfb58054ab28	221	USB_INT16U w_length,
chris	0:cfb58054ab28	222	volatile USB_INT08U *buffer);
chris	0:cfb58054ab28	223
chris	0:cfb58054ab28	224	USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
chris	0:cfb58054ab28	225	USB_INT08U b_request,
chris	0:cfb58054ab28	226	USB_INT16U w_value,
chris	0:cfb58054ab28	227	USB_INT16U w_index,
chris	0:cfb58054ab28	228	USB_INT16U w_length,
chris	0:cfb58054ab28	229	volatile USB_INT08U *buffer);
chris	0:cfb58054ab28	230
chris	0:cfb58054ab28	231	void Host_FillSetup( USB_INT08U bm_request_type,
chris	0:cfb58054ab28	232	USB_INT08U b_request,
chris	0:cfb58054ab28	233	USB_INT16U w_value,
chris	0:cfb58054ab28	234	USB_INT16U w_index,
chris	0:cfb58054ab28	235	USB_INT16U w_length);
chris	0:cfb58054ab28	236
chris	0:cfb58054ab28	237
chris	0:cfb58054ab28	238	void Host_WDHWait (void);
chris	0:cfb58054ab28	239
chris	0:cfb58054ab28	240
chris	0:cfb58054ab28	241	USB_INT32U ReadLE32U (volatile USB_INT08U *pmem);
chris	0:cfb58054ab28	242	void WriteLE32U (volatile USB_INT08U *pmem,
chris	0:cfb58054ab28	243	USB_INT32U val);
chris	0:cfb58054ab28	244	USB_INT16U ReadLE16U (volatile USB_INT08U *pmem);
chris	0:cfb58054ab28	245	void WriteLE16U (volatile USB_INT08U *pmem,
chris	0:cfb58054ab28	246	USB_INT16U val);
chris	0:cfb58054ab28	247	USB_INT32U ReadBE32U (volatile USB_INT08U *pmem);
chris	0:cfb58054ab28	248	void WriteBE32U (volatile USB_INT08U *pmem,
chris	0:cfb58054ab28	249	USB_INT32U val);
chris	0:cfb58054ab28	250	USB_INT16U ReadBE16U (volatile USB_INT08U *pmem);
chris	0:cfb58054ab28	251	void WriteBE16U (volatile USB_INT08U *pmem,
chris	0:cfb58054ab28	252	USB_INT16U val);
chris	0:cfb58054ab28	253
chris	0:cfb58054ab28	254	#endif

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Type:	Program
Created:	20 Feb 2010
Imports:	246
Forks:	0
Commits:	1
Dependents:	3
Dependencies:	0
Followers:	8

USBHostLite/usbhost_lpc17xx.h@0:cfb58054ab28, 2010-02-20 (annotated)

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