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vl53l1_register_settings.h

00001 
00002 /*******************************************************************************
00003  * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
00004 
00005  This file is part of VL53L1 Core and is dual licensed,
00006  either 'STMicroelectronics
00007  Proprietary license'
00008  or 'BSD 3-clause "New" or "Revised" License' , at your option.
00009 
00010 ********************************************************************************
00011 
00012  'STMicroelectronics Proprietary license'
00013 
00014 ********************************************************************************
00015 
00016  License terms: STMicroelectronics Proprietary in accordance with licensing
00017  terms at www.st.com/sla0081
00018 
00019  STMicroelectronics confidential
00020  Reproduction and Communication of this document is strictly prohibited unless
00021  specifically authorized in writing by STMicroelectronics.
00022 
00023 
00024 ********************************************************************************
00025 
00026  Alternatively, VL53L1 Core may be distributed under the terms of
00027  'BSD 3-clause "New" or "Revised" License', in which case the following
00028  provisions apply instead of the ones
00029  mentioned above :
00030 
00031 ********************************************************************************
00032 
00033  License terms: BSD 3-clause "New" or "Revised" License.
00034 
00035  Redistribution and use in source and binary forms, with or without
00036  modification, are permitted provided that the following conditions are met:
00037 
00038  1. Redistributions of source code must retain the above copyright notice, this
00039  list of conditions and the following disclaimer.
00040 
00041  2. Redistributions in binary form must reproduce the above copyright notice,
00042  this list of conditions and the following disclaimer in the documentation
00043  and/or other materials provided with the distribution.
00044 
00045  3. Neither the name of the copyright holder nor the names of its contributors
00046  may be used to endorse or promote products derived from this software
00047  without specific prior written permission.
00048 
00049  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00050  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00051  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00052  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00053  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00054  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00055  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00056  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00057  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00058  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00059 
00060 
00061 ********************************************************************************
00062 
00063 */
00064 
00065 
00066 
00067 
00068 #ifndef _VL53L1_REGISTER_SETTINGS_H_
00069 #define _VL53L1_REGISTER_SETTINGS_H_
00070 
00071 
00072 
00073 
00074 
00075 
00076 #define VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO  0x00
00077 #define VL53L1_DEVICESCHEDULERMODE_STREAMING    0x01
00078 #define VL53L1_DEVICESCHEDULERMODE_HISTOGRAM    0x02
00079 
00080 
00081 
00082 
00083 
00084 #define VL53L1_DEVICEREADOUTMODE_SINGLE_SD        (0x00 << 2)
00085 #define VL53L1_DEVICEREADOUTMODE_DUAL_SD          (0x01 << 2)
00086 #define VL53L1_DEVICEREADOUTMODE_SPLIT_READOUT    (0x02 << 2)
00087 #define VL53L1_DEVICEREADOUTMODE_SPLIT_MANUAL     (0x03 << 2)
00088 
00089 
00090 
00091 
00092 
00093 
00094 #define VL53L1_DEVICEMEASUREMENTMODE_MODE_MASK          0xF0
00095 #define VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK          0x0F
00096 
00097 #define VL53L1_GROUPEDPARAMETERHOLD_ID_MASK             0x02
00098 
00099 
00100 
00101 #define VL53L1_EWOK_I2C_DEV_ADDR_DEFAULT                0x29
00102 
00103 #define VL53L1_OSC_FREQUENCY                            0x00
00104 #define VL53L1_OSC_TRIM_DEFAULT                         0x00
00105 #define VL53L1_OSC_FREQ_SET_DEFAULT                     0x00
00106 
00107 #define VL53L1_RANGE_HISTOGRAM_REF                      0x08
00108 #define VL53L1_RANGE_HISTOGRAM_RET                      0x10
00109 #define VL53L1_RANGE_HISTOGRAM_BOTH                     0x18
00110 #define VL53L1_RANGE_HISTOGRAM_INIT                     0x20
00111 #define VL53L1_RANGE_VHV_INIT                           0x40
00112 
00113 
00114 #define VL53L1_RESULT_RANGE_STATUS                      0x1F
00115 
00116 
00117 #define VL53L1_SYSTEM__SEED_CONFIG__MANUAL              0x00
00118 #define VL53L1_SYSTEM__SEED_CONFIG__STANDARD            0x01
00119 #define VL53L1_SYSTEM__SEED_CONFIG__EVEN_UPDATE_ONLY    0x02
00120 
00121 
00122 #define VL53L1_INTERRUPT_CONFIG_LEVEL_LOW               0x00
00123 #define VL53L1_INTERRUPT_CONFIG_LEVEL_HIGH              0x01
00124 #define VL53L1_INTERRUPT_CONFIG_OUT_OF_WINDOW           0x02
00125 #define VL53L1_INTERRUPT_CONFIG_IN_WINDOW               0x03
00126 #define VL53L1_INTERRUPT_CONFIG_NEW_SAMPLE_READY        0x20
00127 
00128 
00129 #define VL53L1_CLEAR_RANGE_INT                          0x01
00130 #define VL53L1_CLEAR_ERROR_INT                          0x02
00131 
00132 
00133 #define VL53L1_SEQUENCE_VHV_EN                          0x01
00134 #define VL53L1_SEQUENCE_PHASECAL_EN                     0x02
00135 #define VL53L1_SEQUENCE_REFERENCE_PHASE_EN              0x04
00136 #define VL53L1_SEQUENCE_DSS1_EN                         0x08
00137 #define VL53L1_SEQUENCE_DSS2_EN                         0x10
00138 #define VL53L1_SEQUENCE_MM1_EN                          0x20
00139 #define VL53L1_SEQUENCE_MM2_EN                          0x40
00140 #define VL53L1_SEQUENCE_RANGE_EN                        0x80
00141 
00142 
00143 #define VL53L1_DSS_CONTROL__ROI_SUBTRACT                0x20
00144 #define VL53L1_DSS_CONTROL__ROI_INTERSECT               0x10
00145 
00146 #define VL53L1_DSS_CONTROL__MODE_DISABLED               0x00
00147 #define VL53L1_DSS_CONTROL__MODE_TARGET_RATE            0x01
00148 #define VL53L1_DSS_CONTROL__MODE_EFFSPADS               0x02
00149 #define VL53L1_DSS_CONTROL__MODE_BLOCKSELECT            0x03
00150 
00151 
00152 
00153 #define VL53L1_RANGING_CORE__SPAD_READOUT__STANDARD              0x45
00154 #define VL53L1_RANGING_CORE__SPAD_READOUT__RETURN_ARRAY_ONLY     0x05
00155 #define VL53L1_RANGING_CORE__SPAD_READOUT__REFERENCE_ARRAY_ONLY  0x55
00156 #define VL53L1_RANGING_CORE__SPAD_READOUT__RETURN_SPLIT_ARRAY    0x25
00157 #define VL53L1_RANGING_CORE__SPAD_READOUT__CALIB_PULSES          0xF5
00158 
00159 
00160 #define VL53L1_LASER_SAFETY__KEY_VALUE                  0x6C
00161 
00162 
00163 
00164 #define VL53L1_RANGE_STATUS__RANGE_STATUS_MASK          0x1F
00165 #define VL53L1_RANGE_STATUS__MAX_THRESHOLD_HIT_MASK     0x20
00166 #define VL53L1_RANGE_STATUS__MIN_THRESHOLD_HIT_MASK     0x40
00167 #define VL53L1_RANGE_STATUS__GPH_ID_RANGE_STATUS_MASK   0x80
00168 
00169 
00170 
00171 #define VL53L1_INTERRUPT_STATUS__INT_STATUS_MASK            0x07
00172 #define VL53L1_INTERRUPT_STATUS__INT_ERROR_STATUS_MASK      0x18
00173 #define VL53L1_INTERRUPT_STATUS__GPH_ID_INT_STATUS_MASK     0x20
00174 
00175 
00176 
00177 
00178 #endif
00179 
00180 
00181 
00182 
00183 
00184